This is the documentation for Version 1 (V1) of the Avatar API, originally released in September of 2019
The default response format is JSON
This is an open API, which means that no authentication is required to query the API for data. Therefore, there is only support for GET-ing data.
All routes must be prefixed with https://www.avatarapi/herokuapp.com
GET /characters
Returns all characters.
| Name | Type | Description |
|---|---|---|
| name | string | Name of character |
| gender | string | Gender of character |
| ethnicity | string | Ethnicity of character |
| nationality | string | Nationality of character |
| bending | array of strings | The bendings that the character can do. If character is a nonbender or undisclosed, then 'Nonbending' |
| year of birth | string | Character's date of birth |
| year of death | string | Character's date of death |
| roles | array of strings | Characters's role during their lifetime |
| aliases | array of strings | Aliases that the character has used |
| affiliations | array of strings | Affiliations that the character belongs to |
| weapons | array of strings | Weapons that the character uses |
| fighting styles | array of strings | Fighting styles that the character uses |
Example response:
[
{
"name": "Aang",
"ethnicity": "Air Nomad",
"nationality": "Southern Air Temple",
"bending": [
"Airbending",
"Waterbending",
"Earthbending",
"Firebending"
],
"gender": "Male",
"year of birth": "12 BG",
"year of death": "153 AG",
...
},
{
"name": "Zuko",
...
"aliases": [
"Lee",
"Zuzu",
"Blue Spirit"
],
"affiliations": [
"Fire Nation Royal Family",
"Team Avatar"
],
"weapons": [
"Dual Broadswords"
],
"fighting styles": [
"Firebending (Dancing Dragon)",
"Dual Dao Swordsmanship"
]
},
...
]
You can also include filter parameters in your request to the characters endpoint by the following url:
GET /characters/param/{value}
| Param | Value | Description |
|---|---|---|
benders |
string | Characters with the given bending skills are included in the response. |
gender |
string | Characters with the given gender are included in the response. |
ethnicity |
string | Characters with the given ethnicity are included in the response. |
nationality |
string | Characters with the given nationality are included in the response. |
affiliation |
string | Characters who are part of the given affiliation are included in the response. |
You can also get a specific character by the following url:
GET /characters/{name}
Example response:
{
"name": "Aang",
"ethnicity": "Air Nomad",
"nationality": "Southern Air Temple",
"bending": [
"Airbending",
"Waterbending",
"Earthbending",
"Firebending"
],
"gender": "Male",
"year of birth": "12 BG",
"year of death": "153 AG",
"roles": [
"Avatar",
"Co-founder of the United Republic of Nations",
"Air Nomad Culture Teacher",
"Airbending instructor"
],
"aliases": [
"Twinkle Toes",
"Kuzon"
],
"affiliations": [
"Air Nomads",
"Air Acolytes",
"Team Avatar"
],
"weapons": [
"Glider Staff"
],
"fighting styles": [
"Airbending",
"Waterbending (Northern Style)",
"Waterbending (Southern Style)",
"Earthbending (Chu Gar Praying Mantis Kung Fu)",
"Firebending (Dancing Dragon)",
"Energybending"
]
}
GET /locations
Returns all the locations.
| Name | Type | Description |
|---|---|---|
| name | string | Name of location |
| nation | string | Nation where location is located |
| location | string | General location of where in the nation the location is located |
| role | string | The main function of the location |
Example response:
[
{
"name": "Eastern Air Temple",
"nation": "Air Nomad Mountain Range",
"location": "Southeast of Earth Kingsdom",
"role": "Home to Female Air Acolytes and Air Nomads"
},
{
"name": "Ba Sing Se",
"nation": "Earth Kingdom",
"location": "Northeastern Earth Kingdom",
"role": "Capital of the Earth Kingdom"
},
....
]
You can also include filter parameters in your request to the locations endpoint by the following url:
GET /locations/param/{value}
| Param | Value | Description |
|---|---|---|
nations |
string | Locations in the given nation are included in the response. |
You can also get a specific location by the following url:
GET /locations/{name}
Example response:
{
"name": "Eastern Air Temple",
"nation": "Air Nomad Mountain Range",
"location": "Southeast of Earth Kingsdom",
"role": "Home to Female Air Acolytes and Air Nomads"
}
GET /bendings
Returns all bendings.
| Name | Type | Description |
|---|---|---|
| name | string | Name of bending |
| source | string | Source of bending |
| learned from | string | Object or animal in which benders learned bending from |
| alternative styles | array of strings | Alternative styles of bending |
| abilities | dictionary whose keys are string and values are an array of strings | Alternative styles of bending |
| weapons | array of strings | weapons that benders use |
| weaknesses | array of strings | weaknesses of bending |
Example response:
[
{
"name": "Waterbending",
"source": "Moon and Ocean Spirits",
"learned from": "Moon",
"alternative styles": [
"Bloodbending",
"Healing"
],
"abilities": {
"general": [
"Breath of Ice",
"Ice Blade",
"Ice Bullets",
"Ice Claw",
"Ice Creepers",
"Ice Disk",
"Ice Gauntlet",
"Ice Hook",
"Ice Line",
"Ice Shield",
"Ice Spear",
"Iceberg Spike",
"Phase Change",
"Streaming the Water",
"Water Bullets",
"Water Cloak",
"Water Filtering",
"Water Jet",
"Water Knife",
"Water Manipulation",
"Water Pressure Manipulation",
"Water Wall/Shield",
"Water Whip",
"Wave"
],
"advanced": [
"Bubble",
"Ice Dagger",
"Ice Dome",
"Ice Drill",
"Ice Floor",
"Ice Ladder",
"Ice Prison",
"Ice Ramp",
"Ice Sled",
"Ice Tunneling",
"Maelstorm",
"Mist-Stepping",
"Octopus Form",
"Partial Ice WHip",
"Razor Rings",
"Water Ball",
"Water Boxing",
"Water Dome",
"Water Drill",
"Water Gimbal",
"Water Pinwheel",
"Water Ring",
"Water Sprout/Water Vortex"
],
"avatar level": [
"Ice Fissure",
"Remote Waterbending",
"Tsunami",
"Water Compression"
],
"special techniques": [
"Armless Waterbending",
"Bloodbending",
"Cloud Manipulation",
"Condensation",
"Healing",
"Plantbending",
"Spiritbending",
"Steam Manipulation",
"Water Run"
]
},
"weapons": [
"Water Skins"
],
"weaknesses": [
"Reliance on External Water Source",
"Reliance on Movement of the Arms",
"Lunar Eclipse",
"Present Emotional State",
"Lightening"
]
},
...
]
You can also get a specific bending by the following url:
GET /bendings/{name}
Example response:
{
"name": "Waterbending",
"source": "Moon and Ocean Spirits",
"learned from": "Moon",
"alternative styles": [
"Bloodbending",
"Healing"
],
"abilities": {
"general": [
"Breath of Ice",
"Ice Blade",
"Ice Bullets",
"Ice Claw",
"Ice Creepers",
"Ice Disk",
"Ice Gauntlet",
"Ice Hook",
"Ice Line",
"Ice Shield",
"Ice Spear",
"Iceberg Spike",
"Phase Change",
"Streaming the Water",
"Water Bullets",
"Water Cloak",
"Water Filtering",
"Water Jet",
"Water Knife",
"Water Manipulation",
"Water Pressure Manipulation",
"Water Wall/Shield",
"Water Whip",
"Wave"
],
"advanced": [
"Bubble",
"Ice Dagger",
"Ice Dome",
"Ice Drill",
"Ice Floor",
"Ice Ladder",
"Ice Prison",
"Ice Ramp",
"Ice Sled",
"Ice Tunneling",
"Maelstorm",
"Mist-Stepping",
"Octopus Form",
"Partial Ice WHip",
"Razor Rings",
"Water Ball",
"Water Boxing",
"Water Dome",
"Water Drill",
"Water Gimbal",
"Water Pinwheel",
"Water Ring",
"Water Sprout/Water Vortex"
],
"avatar level": [
"Ice Fissure",
"Remote Waterbending",
"Tsunami",
"Water Compression"
],
"special techniques": [
"Armless Waterbending",
"Bloodbending",
"Cloud Manipulation",
"Condensation",
"Healing",
"Plantbending",
"Spiritbending",
"Steam Manipulation",
"Water Run"
]
},
"weapons": [
"Water Skins"
],
"weaknesses": [
"Reliance on External Water Source",
"Reliance on Movement of the Arms",
"Lunar Eclipse",
"Present Emotional State",
"Lightening"
]
}


ImageResolver
demo : feed reader
Feed URL:
Hacker News
|
Digg Top Stories
|
Youtube Most Popular
|
Design Sponge
|
Daring Fireball


Bio
My name is James Odell. I am a 33 year old male who was born and raised in Denver, Colorado. I have had the opportunity of working in multiple industries throughout my professional career. My first career was in the culinary arts as a chef. My second career has been in the Oil and Gas industry. I am naturally a creative person. So, working in Oil and Gas has not been fulfilling for my creative side. I would like to get back into an industry that can fulfill that creative desire of mine. I am currently attending Denver Universities, Coding Bootcamp. Some of the project you will see on this page are from my time in that Bootcamp program. I hope you enjoy my work and please feel free to contact me down below.
Projects
Below are some of the projects I have worked on.


#include <fcntl.h>
Go to the source code of this file.
Defines | |
| #define | L_SET 0 |
| #define | L_CURR 1 |
| #define | L_INCR 1 |
| #define | L_XTND 2 |
| #define | R_OK 4 |
| #define | W_OK 2 |
| #define | X_OK 1 |
| #define | F_OK 0 |
| #define R_OK 4 |
Definition at line 16 of file file.h.
Referenced by rb_file_readable_p(), and rb_file_readable_real_p().
| #define W_OK 2 |
Definition at line 17 of file file.h.
Referenced by path_check_0(), rb_file_writable_p(), and rb_file_writable_real_p().
| #define X_OK 1 |
Definition at line 18 of file file.h.
Referenced by dln_find_1(), eaccess(), rb_file_executable_p(), and rb_file_executable_real_p().


An English theoretical physicist, cosmologist, and author
Hawking contracted ALS in 1963 at the age of 21
Here's a time line of Stephen Hawking's life:
1942 - Born in Oxford
1959 to 1962 - Specialises in physics at University College Oxford
1970 - Discoveres a remarkable property: by using quantum theory and general relativity he is able to show that black holes can emit radiation.
1977 - Appointed professor of gravitational physics at Cambridge.
1979 - Appointed Lucasian professor of mathematics at Cambridge.
1982 - Awarded a CBE by the Queen.
1988 -Publishes A Brief History of Time: From the Big Bang to Black Holes, a classic introduction to today's most important scientific ideas about the cosmos.
1993 - Publishes Black Holes and Baby Universes, and other Essays, a collection of scientific articles exploring ways in which the universe may be governed.
1998 - Publishes Stephen Hawking's Universe: The Cosmos Explained, a book about the basis of our existence and of everything around us.
November 2001 - Releases Universe in a Nutshell in the UK, a book that unravels the mysteries of recent breakthroughs in physics.
September 2002 - Publishes The Theory of Everything: The Origin and Fate of the Universe, a book that presents the most complex theories of physics past and present.
July 2004 - Hawking announces that he has solved the Black Hole paradox, which has been a troubling scientists for years. He presents his most recent findings at the international conference on general relativity and gravitation in Dublin.


My To Do List
Hit the gym
Pay bylls
Meet John
Buy eggs
Read a book
Organize office
Eat dinner
Buy apples
Meet George
Feed the cat
Write a letter
Run 1 km


|
QuantLib: a free/open-source library for quantitative finance
Fully annotated sources - version 1.30
|
Files | |
| file | commodity.cpp [code] |
| file | commodity.hpp [code] |
| Commodity base class. | |
| file | commoditycashflow.cpp [code] |
| file | commoditycashflow.hpp [code] |
| Commodity cash flow. | |
| file | commoditycurve.cpp [code] |
| file | commoditycurve.hpp [code] |
| Commodity curve. | |
| file | commodityindex.cpp [code] |
| file | commodityindex.hpp [code] |
| Commodity index. | |
| file | commoditypricinghelpers.cpp [code] |
| file | commoditypricinghelpers.hpp [code] |
| Commodity pricing helpers. | |
| file | commoditysettings.cpp [code] |
| file | commoditysettings.hpp [code] |
| commodity settings | |
| file | commoditytype.cpp [code] |
| file | commoditytype.hpp [code] |
| file | commodityunitcost.cpp [code] |
| file | commodityunitcost.hpp [code] |
| Commodity unit cost. | |
| file | dateinterval.cpp [code] |
| file | dateinterval.hpp [code] |
| Date interval. | |
| file | energybasisswap.cpp [code] |
| file | energybasisswap.hpp [code] |
| Energy basis swap. | |
| file | energycommodity.cpp [code] |
| file | energycommodity.hpp [code] |
| Energy commodity. | |
| file | energyfuture.cpp [code] |
| file | energyfuture.hpp [code] |
| Energy future. | |
| file | energyswap.cpp [code] |
| file | energyswap.hpp [code] |
| Energy swap. | |
| file | energyvanillaswap.cpp [code] |
| file | energyvanillaswap.hpp [code] |
| Vanilla energy swap. | |
| file | exchangecontract.hpp [code] |
| Exchange contract. | |
| file | paymentterm.cpp [code] |
| file | paymentterm.hpp [code] |
| file | petroleumunitsofmeasure.hpp [code] |
| Petroleum units of measure. | |
| file | pricingperiod.hpp [code] |
| Pricing period. | |
| file | quantity.cpp [code] |
| file | quantity.hpp [code] |
| Amount of a commodity. | |
| file | unitofmeasure.cpp [code] |
| file | unitofmeasure.hpp [code] |
| Unit of measure. | |
| file | unitofmeasureconversion.cpp [code] |
| file | unitofmeasureconversion.hpp [code] |
| file | unitofmeasureconversionmanager.cpp [code] |
| file | unitofmeasureconversionmanager.hpp [code] |
| Unit-of-measure conversion manager. | |


We want to study the problem of voice verification. The typical setup is constituted by brief speech segments of different individuals. These individuals have voices that sound alike. This is common in subjects like twins. The system will learn the similarity metric between subjects that are in same class for a subsequent verification step. In this scenario the number of categories is very large and not known during training, and the number of training samples for a single category is very small. The learning process minimizes a discriminative loss function that drives the similarity metric to be small for pairs of features from similar subjects, and large for pairs from different persons. The proposed architecture is a Siamese network @Bromley93. A general Siamese framework for visual recognition comprises two identical networks and one cost module. The input to the system is a pair of images and a label. The images are passed through the sub-networks, yielding two outputs which are passed to the cost module which produces the scalar energy. In speech recognition we have a different type of signal. Usually the audio signal is 1-D, instead of 2-D as for the images. In this project we are going to use two representation of the audio signal: spectrogram, and MFCC.
A spectrogram is a very detailed, accurate image of your audio, displayed in either 2D or 3D. Audio is shown on a graph according to time and frequency, with brightness or height indicating amplitude. Whereas a waveform shows how your signal’s amplitude changes over time, the spectrogram shows this change for every frequency component in the signal.
The mel-frequency cepstrum MFC is a representation of the short-term power spectrum of a sound, based on a linear cosine transform of a log power spectrum on a nonlinear mel scale of frequency Mel-frequency cepstral coefficients MFCCs are coefficients that collectively make up an MFC. They are derived from a type of cepstral representation of the audio clip, a nonlinear “spectrum-of-a-spectrum”. The difference between the cepstrum and the mel-frequency cepstrum is that in the MFC, the frequency bands are equally spaced on the mel scale, which approximates the human auditory system’s response more closely than the linearly-spaced frequency bands used in the normal cepstrum. This frequency warping can allow for better representation of sound, for example, in audio compression.
The difference of these two representation is the dimensionality. A spectrogram is essentially an image, thus we can use the the well known convolutional neural network used for computer vision applications. MFCC constitute a 1-D vector that need to be analyzed by a neural network with a slightly different architecture.
One of the reasons training networks is difficult is that the errors computed in backpropagation are multiplied by each other once per timestep. If the errors are small, the error quickly dies out, becoming very small; if the errors are large, they quickly become very large due to repeated multiplication. An alternative architecture built with Long Short-Term Memory (LSTM) cells attempts to relieve from this issue.
Deep LSTM and Bidirectional LSTM @Graves2013 were recently introduced to speech recognition. These methods have several advantages: they do not require forced alignments to pre-segment the acoustic data, they directly optimise the probability of the target sequence conditioned on the input sequence, and especially in the case of Sequence Transduction, they are able to learn an implicit language model from the acoustic training data.
Unfortunately, given the nature of this task, not so many dataset are available with the required characteristic. For this project we use two dataset. A detaset composed of a small number of subjects (24) uttering digits, and a more large dataset composed of similar subjects voices in a dialog. In this project we use two basic features: spectrogram, and the “raw” soundwave. We focus on these basic representations because we want to explore the studied architectures with very basic representation and limited pre processing. More complex features can be used, however we believe that convolutional layers with temporal based units like the LSTM can achieve the state of the art performance.
The larger dataset, that we call Speech dataset, is composed of 2057 files coming from roughly 300 subjects. Each recording is composed of a brief dialog of 40 seconds acquired with different devices.
Pre-processing
An initial pre-processing stage has been applied to each recording to eliminate the void spaces, to normalize the signal, and to resample at a more lower common sample rate. Finally a conversion of the 16 bit signal to the [-1,1] range has been applied due to better performance in the network training.
For the digit dataset we mainly used the spectrograms, obtained by a Short Fourier Transform and the subsequent visualization of the spectrum.
The siamese network @Bromley93 is composed of a feed forward network and a siamese replica that shares the same weights. A downside of the siamese framework is the higher number of samples require. In fact, each sample is composed of a pair that can be from the same class ( label ) or from different classes ( label ). To avoid the unbalance between negative samples and positive we limit the number of total pairs by the numbers of pairs that we can obtain from the same class. Since our object is the subject verification, we divide the dataset in training and testing sets by subjects. We select 400 subjects for training and 101 subjects for testing with the ratio $60.20 \%$. This division has been done such that we have at lest a couple of sample for each subject. Unfortunately there are subject with just one sample! Alternative will be to use different temporal segments of the same sample as multiple samples.
We tested different architectures with the common feature to be a siamese architecture. This feature is ideal to create a verification scheme. We tested some naive configurations composed of a fully connected structure working on spectrogram data. However the main focus has been on a siamese LSTM.
The learning of the siamese architecture can be quite challenging. We refer to the work of Chopra et al @ChopraS2005 that present a similar objective on face verification. The idea is to learn a function that maps input patterns into a target space such that the $L_1$ norm in the target space approximates the “semantic” distance in the input space. The learning process minimizes a discriminative loss function that drives the similarity metric to be small for pairs of faces from the same person, and large for pairs from different persons.
\begin{equation} \mathcal{L}(W) = \sum_{i=1}^P L(W,(Y,X_1,X_2)^i) \end{equation}
\begin{equation} L(W,(Y,X_1,X_2)^i) = (1-Y) L_G (E_W(X_1,X_2)^i) + Y L_I (E_W(X_1,X_2)^i) \end{equation}
with \begin{equation} E_W(X_1,X_2) = ||G_W(X_1) - G_W(X_2)|| \end{equation} is the i-th sample which is composed of a pair of images and a label (genuine or impostor), $L_G$ is the partial loss function for a genuine pair, $L_I$ the partial loss function for an impostor pair, and $P$ the number of training samples. $L_I$ and $L_G$ should be designed in such a way that the minimization of $L$ will decrease the energy of genuine pairs and increase the energy of impostor pairs.
Since the proposed architecture (Siamese LSTM) is untested for audio signals on the tested dataset, we used a fully connected architecture (Figure [fig:net1]) as baseline method.
For this configuration we use the digit dataset with spectrogram representation. Since the input layer is composed of fully connected Relu units we vectorize the spectrogram images. For this experiment we have 24 total subjects, with 19 used for training and the remaining for testing.
The average accuracy on the test set after 100 epochs is 54.79 %, and 56.87 % on the training set. For this configuration we use the contrastive loss with L2 metric.
To understand if a more deeper structure will be beneficial for the siamese network we combine the feature extracted by the SoundNet @Aytar2016 architecture with a dense siamese structure. In this case the SoundNet is pretrained with a different dataset for a different classification task as in @Aytar2016. We use this offline model to extract the features. Although, the network is not finetuned for our dataset we believe that the deeper structure can extract feature good enough for the verification process. As we can see from the Figure [fig:3] the performance outperform the baseline siamese network. The average accuracy on the test set is 62.87 % and 65.38 % on the training set.
The performance of this
The proposed architecture combine different structure in siamese fashion. We want to take advantage of the Long-Short-Term-Memory unit for its extraordinary performance on temporal data. LSTM is ideal for time series data like sounds, because it can retain the important information of the signal and forget pauses or unimportant data. Unfortunately the raw audio signal can be too heavy to be directly analyzed by the LSTM. Typical audio signals are sampled at 44100 Hz for cd quality, and 16000 Hz for audio. LSTM are trainable with good performance when the sequence is less than 300 sample. Unfortunately 300 samples at 16000 Hz is equivalent to 18 ms, that is quite short for phoneme recognition. To create a low dimensional representation we process the raw signal with one dimensional convolution, and one dimensional MaxPooling. We show the network in Figure [fig:net3], and the footprint on memory on Tables [tab:1],[tab:2]. The convolution block preceding the LSTM will compress the long signal in a more concise and richer feature set. There are two LSTM in cascade working differently. The first one is letting the sequence pass to the second LSTM but working like an accumulator, and memory storage. The second LSTM instead will convert the sequence in a unique vector.
One Leg Siamese configuration
| Layer type | Output shape | # Param | Connected to |
|---|---|---|---|
| Input | (6400,1) | - | - |
| L1 Conv1D 16 x 64 | (6337,16) | 1040 | input |
| L1 MaxPool1D 4 | (1584,16) | 0 | L1 Conv1D |
| L2 Conv1D 32 x 32 | (1553,32) | 16416 | L1 MaxPool1D |
| L2 MaxPool1D 4 | (338,32) | 0 | L2 Conv1D |
| L3 Conv1D 64 x 16 | (373,64) | 32832 | L2 MaxPool1D |
| L3 MaxPool1D 2 | (186,64) | 0 | L3 Conv1D |
| L4 Conv1D 128 x 8 | (179,128) | 65664 | L3 MaxPool1D |
| L5 LSTM 128 x 179 | (179,128) | 131584 | L4 Conv1D |
| L6 Dropout 0.5 | (179,128) | 0 | L5 LSTM |
| L7 LSTM 128 x 1 | (1,128) | 131584 | L6 Dropout |
| L8 FC 128 x 1 | (1, 128) | 16512 | L7 LSTM |
Siamese network configuration.
| Layer type | Output shape | # Param | Connected to |
|---|---|---|---|
| Input 1 | (6400,1) | 0 | - |
| Input 2 | (6400,1) | 0 | - |
| Conv Lstm | (1,128) | 395632 | input 1, input 2 |
| L1 metric | (1,1) | 0 | Conv Lstm 1, Conv Lstm |
| FC | (1,128) | 129 | L1 metric |
| Total # params: | 395761 |
The network has been trained with the raw signal from the speech dataset, as described above. In Figure [fig:5] we show the training loss and accuracy on the train and validation data. We use rmsprop as algorithm for training the network obtaining the accuracy of $~77 \%$ on the validation set, and $98 \%$ on the training set.
We proved a slightly different architecture eliminating the fully connected stage after the second LSTM obtaining the average accuracy of roughly 84 % in the test set.


An interesting variation on a regular Bar chart. It's actually two Bar charts - the first is drawn without axes or a background grid and then lines are drawn over the bars. This gives us the segmented effect. Then another Bar chart is drawn on top of this with the bars zeroed out so it just has the grid and the axes that you see.
 Put this where you want the chart to show up:

This is the code that generates the chart - it should be placed AFTER the

tag:


The information on this page is NOT an official record. Do not rely on the correctness or completeness of this information. Verify all information with the official record keeper. The information contained in this report is provided in compliance with the Oklahoma Open Records Act, 51 O.S. 24A.1. Use of this information is governed by this act, as well as other applicable state and federal laws.
| STATE OF OKLAHOMA V. JOSEFA ADRIANA RODRIGUEZ |
No. CF-2018-00025 (Criminal Felony) Filed: 01/30/2018 Judge: SIGLER, JARED P |
RODRIGUEZ, JOSEFA ADRIANA,
Defendant
| Attorney | Represented Parties |
|---|---|
| SANDERS, KRISTI K 415 S DEWEY, STE 302 BARTLESVILLE , OK 74003-3550 |
| Event | Party | Docket | Reporter |
|---|---|---|---|
|
Wednesday, January 31, 2018 WARRANT, ISSUED |
|||
|
Friday, March 16, 2018 at 9:00AM STATUS |
|||
|
Tuesday, May 1, 2018 at 8:30AM PRELIMINARY HEARING (CRIMINAL) |
|||
|
Wednesday, May 23, 2018 at 9:00AM PLEA |
|||
|
Wednesday, June 20, 2018 at 9:00AM PLEA |
| Date | Code | Description | Count | Party | Amount |
|---|---|---|---|---|---|
|
|
FILE ENTER & RECORD INFORMATION (CT I) (SB) |
$ 103.00 | |||
|
|
AFFIDAVIT (SB) |
||||
|
|
(Entry with fee only) | $ 6.00 | |||
|
|
(Entry with fee only) | $ 5.00 | |||
|
|
CLEET |
$ 10.00 | |||
|
|
AFIS |
$ 10.00 | |||
|
|
FORENSIC |
$ 10.00 | |||
|
|
10% OF CLEET, AFIS AND FORENSIC |
$ 1.90 | |||
|
|
MEDICAL EXPENSE LIABILITY FUND |
$ 10.00 | |||
|
|
10% OF MLRF |
$ 1.00 | |||
|
|
DA REVOLVING FUND |
$ 50.00 | |||
|
|
10% OF DARF |
$ 5.00 | |||
|
|
OKLAHOMA COURT INFORMATION SYSTEM ASSESSMENT |
$ 25.00 | |||
|
|
SHERIFF'S SERVICE FEE-COURTHOUSE SECURITY SUB ACCOUNT |
$ 10.00 | |||
|
|
10% OF COURTHOUSE SECURITY FEE |
$ 1.00 | |||
|
|
ATTORNEY GENERAL VICTIM SERVICES UNIT |
$ 3.00 | |||
|
|
10% OF AG VICTIM SERVICES FEE |
$ 0.30 | |||
|
|
CHILD ABUSE MULTIDISCIPLINARY ACCOUNT |
$ 3.00 | |||
|
|
10% OF CAMA FEE |
$ 0.30 | |||
|
|
15% TO DISTRICT COURT REVOLVING FUND |
$ 15.90 | |||
|
|
ADDITIONAL RV FOR CLEET (AUGUST, 2017) |
$ 0.10 | |||
|
|
ADDITIONAL RV FOR FORENSIC (NOV, 2017) |
$ 0.50 | |||
|
|
ADDITIONAL RV FOR AFIS (NOV, 2017) |
$ 0.50 | |||
|
|
FILE INFORMATION (CT II) |
$ 83.00 | |||
|
|
(Entry with fee only) | $ 6.00 | |||
|
|
(Entry with fee only) | $ 5.00 | |||
|
|
CLEET |
$ 10.00 | |||
|
|
AFIS |
$ 10.00 | |||
|
|
FORENSIC |
$ 10.00 | |||
|
|
10% OF CLEET, AFIS AND FORE |
$ 1.90 | |||
|
|
TRAUMA CARE REVOLVING FUND |
$ 10.00 | |||
|
|
10% OF TCRF |
$ 1.00 | |||
|
|
MEDICAL EXPENSE LIABILITY REVOLVING FUND |
$ 10.00 | |||
|
|
10% OF MLRF |
$ 1.00 | |||
|
|
DA REVOLVING FUND |
$ 30.00 | |||
|
|
10% OF DARF |
$ 3.00 | |||
|
|
OKLAHOMA COURT INFORMATION SYSTEM ASSESSMENT |
$ 25.00 | |||
|
|
SHERIFF'S SERVICE FEE-COURTHOUSE SECURITY SUB ACCOUNT |
$ 10.00 | |||
|
|
10% OF COURTHOUSE SECURITY FEE |
$ 1.00 | |||
|
|
ATTORNEY GENERAL VICTIM SERVICES UNIT |
$ 3.00 | |||
|
|
10% OF AG VICTIM SERVICES FEE |
$ 0.30 | |||
|
|
CHILD ABUSE MULTIDISCIPLINARY ACCOUNT |
$ 3.00 | |||
|
|
10% OF CAMA FEE |
$ 0.30 | |||
|
|
15% TO DISTRICT COURT REVOLVING FUND |
$ 14.40 | |||
|
|
ADDITIONAL RV FOR CLEET (AUGUST, 2017) |
$ 0.10 | |||
|
|
ADDITIONAL RV FOR FORENSIC (NOV, 2017) |
$ 0.50 | |||
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AFFIDAVIT (SB) Document Available at Court Clerk's Office |
||||
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WARRANT, ISSUED Document Available at Court Clerk's Office |
$ 50.00 | |||
|
|
ADDITIONAL RV FOR AFIS (NOV, 2017) |
$ 0.50 | |||
|
|
OKLAHOMA COURT INFORMATION SYSTEM FEE |
$ 25.00 | |||
|
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ENTRY OF APPEARANCE (KRISTI SANDERS) (SB) |
||||
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DISCOVERY REQUEST (SB) |
||||
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APPEARANCE BOND (FAXED FROM JAIL) |
||||
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WARRANT RET'D EXECUTED; 2/15/18 (SB) |
||||
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APPEARANCE BOND - DENISE BOWLINE (SB) |
$ 35.00 | |||
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POWER NUMBER: PR |
||||
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BOND AMOUNT: 10,000 |
||||
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CM:VACLAW-MIZE-DEFT W/ATTY K SANDERS. DEFT REQUESTS |
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PRELIMINARY HEARING. DEFT ORDERED BACK 5/1/18 @ 8:30AM |
||||
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W/JUDGE SIGLER FOR PRELIMINARY HEARING. (KW) |
||||
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SUBPOENA, ISSUED (1 NAME TO SHF) |
$ 50.00 | |||
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OKLAHOMA COURT INFORMATION SYSTEM FEE |
$ 25.00 | |||
|
|
SUBPOENA, ISSUED (2 NAMES TO SHF) |
$ 100.00 | |||
|
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OKLAHOMA COURT INFORMATION SYSTEM FEE |
$ 25.00 | |||
|
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SUBPOENA RET'D SERVED;TANNER HENRY 3-28-18(JAD) |
||||
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CM:SIGLER-MIZE-DEFT WITH ATTY K SANDERS. DEFT IS |
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ORDERED BACK 06/20/18 AT 9:00 AM FOR PLEA. (GS) |


Frozen 2's After-Credits Scene, Explained
by Brandon ZacharyWARNING: The following contains spoilers for Frozen 2, in theaters now.
In Disney's Frozen 2, Elsa and her loved ones go on a quest to the edge of the known world after the awakening forces of elemental magic threaten to destroy the kingdom of Arendelle. Along the way, Elsa confronts the mysteries of her own powers as well as the history of her family and their impact on the world around them.
As dramatic and dangerous as the events are, it's not all serious twists and turns. The film finds plenty of laughs, largely through the more lighthearted adventures of Kristoff and the goofy observations of Olaf as he learns more about life. In fact, the film's single post-credits sequence leans into that sense of humor.
Click the button below to start this article in quick view.
Neither Elsa nor Anna makes an appearance in the sequence, which doesn't expand on the larger story or character arcs. Instead, the scene follows up on a solid running gag.
After making their way into the enchanted forest, Elsa and the rest of the group encounter Mattias and other Arendelle soldiers, still alive after all these years. The soldiers have an uneasy peace with the Northerners, all of whom have spent the past few decades trapped in the forest by a mysterious mist. Because of their circumstances, they've been completely out of the loop when it comes to the outside world. To catch everyone up on the events that led Elsa and the others to enter the forest, Olaf performs a quick reenactment of the original Frozen, complete with musical numbers. The entire time, Matthias is completely absorbed, reacting with excitement and tears. He even gasps in shock when Hans betrays Anna.
The post-credits sequence is a similar comedy beat, featuring Olaf recapping the events of Frozen 2. In the caves on the island where Elsa fully connected with magic, Olaf recounts everything that happened from his perspective to a collection of other sentient snowmen (including Marshmallow, the hulking guardian Elsa created for her castle in the previous film).
This means, however, that Olaf misses some key details because he wasn't there for Elsa's biggest moments of self-discovery. He wasn't even there when Anna got the Earth Giants to destroy the structure keeping everyone trapped in the forest. During his recap, he skips that entire section of the story and jumps to the happy ending. The sequence ends with the group cheering for the story, glad that it all worked out. While it's not a crucial scene, it is a cute button on the film and worth checking out.
Disney's Frozen 2 reunites directors Jennifer Lee and Chris Buck and producer Del Vecho with voice actors Idina Menzel, Kristen Bell, Jonathan Groff and Josh Gad. Returning musical talents include Kristen Anderson-Lopez and Robert Lopez.
https://schema.orgBreadcrumbListListItem1Homehttps://www.cbr.com/ListItem2Movieshttps://www.cbr.com/category/movies/ListItem3Movie Newshttps://www.cbr.com/category/movies/news-movies/ListItem4Frozen 2's After-Credits Scene, Explainedhttps://www.cbr.com/frozen-2-after-credits-scene-explained/


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Figure 1
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Snapshot of the configurations in the plane xy of a system o ... |
|
Figure 2
|
Cluster size as a function of U 0 for two different values o ... |
|
Figure 3
|
A single ABP particle in a harmonic trap. Panel (a): radial ... |
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Figure 4
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Panels (a–f): Long-time snapshot for N = 2 × 10 3 particles ... |


how not to be a
data bomb
by Ashley Wu | @ashhwu
data bomb?
- impatient
- multitasker
- overwhelmed
- stressed
- only human!
7 ways I learned
how not to be a data bomb.
Here we go!
#1:
Take notes.
Extensive notes.
To-do lists, annotations on data, steps for cleaning
#2:
Spot check.
Constantly.
To assume makes...
#3:
Automate if possible.
Your human-ness can ruin everything.
#4:
Comment your code and your files.
Dates, descriptions, the whole shebang
#5:
Refrain from randomly clicking around.
#6:
Be patient.
Go slow as mud if you have to.
Keep your eye on the numbers.
#7:
Always question
your data.
And strive to answer
those questions.
Even/especially when you feel really confident about it.


Basic
Add class .table
.
| # | First Name | Last Name | Username | Role |
|---|---|---|---|---|
| 1 | Teagan | Prohaska | @Elijah | admin |
| 2 | Andy | Gaylord | @Ramiro | member |
| 3 | Veronica | Gusikowski | @Maxime | developer |
| 4 | Bruce | Rogahn | @Maggio | supporter |
| 5 | Carolina | Hickle | @Hammes | member |
| 6 | Madaline | Eichmann | @Amaya | supporter |
Hover Table
Add.table-hover
to enable a hover state on table
rows within a<tbody>
| # | Products | Popularity | Sales |
|---|---|---|---|
| 1 | Milk Powder | 5,3,2,-1,-3,-2,2,3,4,1 | 28.76% |
| 2 | Air Conditioner | 1,-1,-2,1,2,1,0,1,3,2 | 8.55% |
| 3 | RC Cars | 3,2,3,-1,-3,-1,0,2,4,5 | 58.56% |
| 4 | Down Coat | 1,-2,0,2,4,5,3,2,3,5 | 35.76% |
| 5 | SLR Camera | 1,-1,0,2,3,1,-1,1,4,2 | 21.13% |
| 6 | Jacket | 4,2,-1,-3,-2,1,3,5,2,4 | 26.88% |
Bordered Table
Add.table-bordered
for borders on all sides of the
table and cells.
| Task | Progress | Deadline | Action |
|---|---|---|---|
| Lunar probe project |
|
May 15, 2017 | |
| Dream successful plan |
|
July 1, 2017 | |
| Office automatization |
|
Apr 12, 2017 | |
| The sun climbing plan |
|
Aug 9, 2017 | |
| Open strategy |
|
Apr 2, 2017 | |
| Tantas earum numeris |
|
July 11, 2017 |
Striped Rows
Use.table-striped
to add zebra-striping to any table
row within the<tbody>
.Striped tables are
styled via the:nth-child
CSS selector, which is
not available in Internet Explorer 8.
| Order ID | Username | Payment | Amount |
|---|---|---|---|
| 2569 | @Jessica | Credit Card | $256.10 |
| 4582 | @William | Paypal | $96.75 |
| 2563 | @Jennifer | Credit Card | $458.00 |
| 4378 | @Rolando | Paypal | $30.25 |
| 8465 | @Katelin | Credit Card | $158.50 |
| 1526 | @Richard | Paypal | $58.80 |
Condensed Table
Add.table-sm
to make tables more compact by cutting
cell padding in half.
| Invoice | Username | Amount | Date |
|---|---|---|---|
| Order #53451 | Mary Adams | $24.98 | 2017/7/26 |
| Order #53452 | Caleb Richards | $564.00 | 2017/7/15 |
| Order #53453 | June Lane | $58.87 | 2017/7/01 |
| Order #53454 | Crystal Bates | $97.50 | 2017/6/26 |
| Order #53455 | Heather Harper | $249.99 | 2017/6/09 |
| Order #53456 | Willard Wood | $24.98 | 2017/6/01 |
Table Section
| Project | Progress | Date | |
|---|---|---|---|
| Project #25369 | Canceled | July 10, 2017 | |
| ##MODULE-1111 | Done | July 27, 2017 | |
| ##MODULE-723 | Done | July 7, 2017 | |
| ##MODULE-4200c | Done | July 12, 2017 | |
| Project #28686 | Testing | July 12, 2017 | |
| ##MODULE-3100c | Doing | July 25, 2017 | |
| ##MODULE-6400 | Done | July 24, 2017 | |
| ##MODULE-2210 | Done | July 22, 2017 | |
| Project #29587 | Developing | July 15, 2017 | |
| ##MODULE-7400 | Done | July 2, 2017 | |
| ##MODULE-510c | Done | July 3, 2017 | |
| ##MODULE-3a00 | Done | July 17, 2017 |
Table Selectable
| Id | Project | Status | Progress | |
|---|---|---|---|---|
| 619 | The sun climbing plan | Developing | 5,3,2,-1,-3,-2,2,3,5,2 | |
| 620 | Lunar probe project | Design | 1,-1,0,2,3,1,-1,1,4,2 | |
| 621 | Dream successful plan | Testing | 2,3,-1,-3,-1,0,2,4,5,3 | |
| 622 | Office automatization | Canceled | 1,-2,0,2,4,5,3,2,4,2 | |
| 623 | Open strategy | Reply waiting | 4,2,-1,-3,-2,1,3,5,2,4 |
Responsive
Create responsive tables by wrapping any .table
in .table-responsive
to make them scroll horizontally on small devices (under 768px).
When viewing on anything larger than 768px wide, you will not see
any difference in these tables.
| Invoice | User | Date | Amount | Status | Country |
|---|---|---|---|---|---|
| Order #26589 | Herman Beck | Oct 16, 2017 | $45.00 |
Paid
|
EN |
| Order #58746 | Mary Adams | Oct 12, 2017 | $245.30 |
Shipped
|
CN |
| Order #98458 | Caleb Richards | May 18, 2017 | $38.00 |
Shipped
|
AU |
| Order #32658 | June Lane | Apr 28, 2017 | $77.99 |
Paid
|
FR |
Contextual Classes
Use classes( .table-active
, .table-success
,
.table-info
, .table-warning
, .table-danger
) to color table rows or individual cells.
| Order ID | Order note | Product | Buyer | payment | Date |
|---|---|---|---|---|---|
| # 259648 | As we got further and further away, it [the Earth] diminished in size. | Kode Gaming Laptop | Crystal Bates | Credit Card | 5/10/2017 |
| # 486524 | Tantas earum numeris, scribi innumerabiles quietae clariora. | New Season Jacket | Nathan Watts | Paypal | 5/11/2017 |
| # 985632 | Metum quieti agatur ut sequitur delectatio accusamus. | IO Mouse | Ronnie Ellis | Credit Card | 5/16/2017 |
| # 159853 | Incorrupte torquatum animi nudus, pendet fugiamus pariter. | Doe Bike | Daniel Russell | Paypal | 5/22/2017 |
| # 753698 | Opes oculis forte omnisque virtute caecilii ceterorum. | Zets Baseball Bat | Sarah Graves | Credit Card | 5/28/2017 |
| # 154789 | Supplicii nominavi studiose sequimur vidisse. | Air Condition | Camila Lynch | Paypal | 6/10/2017 |
| # 321489 | Amentur pellat sinat commemorandis Vivatur. | DSLR | Ramon Dunn | Credit Card | 6/19/2017 |
| # 568741 | Applies the hover color to a particular row or cell. | Camping Bag | Scott Sanders | Paypal | 6/23/2017 |
| # 369852 | Indicates a dangerous or potentially negative action. | Jogging Shoes | Nina Wells | Credit Card | 6/25/2017 |
Bootstrap Table Examples
Bootstrap Table Example
| State | Text |
|
$45.00 | 5,3,9,6,5,9,7,3,5,2,5,3,2,-1,-3,-2,2,3,5,2,0,-3,-6,-4,-5,-4,-7,-3,-5,-2 | Florida (50%) | |
| Value | Revene for last quarter in state America. |
|
$245.30 | 0,-2,5,-4,-5,-4,-3,-6,-7,-2,3,3,6,9,5,2,5,3,5,7,8,5,4,8,2,-2,2,5,7,4 | NULL(0%) | |
| Assignee | Text example here lorem ipsum |
|
$38.00 | 5,3,2,-1,-3,-2,2,3,5,2,5,3,9,6,5,9,7,3,5,2,0,-3,-6,-4,-5,-4,-7,-3,-5,-2 | Florida (70%) | |
| Data Create | Lorem ipsum dolor sit amet |
|
$77.99 | 8,5,4,8,2,-2,2,5,7,4,3,3,6,9,5,2,5,3,5,7,0,-2,5,-4,-5,-4,-3,-6,-7,-2 | Florida (13%) | |
| In Progress | Caleb Richards |
|
$77.99 | 0,-3,-6,-4,-5,-4,-7,-3,-5,-2,5,3,9,6,5,9,7,3,5,2,5,3,2,-1,-3,-2,2,3,5,2 | NULL(60%) | |
| state | Applies the hover color |
|
$77.99 | 3,3,6,9,5,2,5,3,5,7,8,5,4,8,2,-2,2,5,7,4,0,-2,5,-4,-5,-4,-3,-6,-7,-2 | NULL(0%) | |
| Value | Office automatization |
|
$77.99 | 5,3,2,-1,-3,-2,2,3,5,2,5,3,9,6,5,9,7,3,5,2,0,-3,-6,-4,-5,-4,-7,-3,-5,-2 | Florida (40%) | |
| In Progress | Caleb Richards |
|
$77.99 | 5,3,9,6,5,9,7,3,5,2,5,3,2,-1,-3,-2,2,3,5,2,0,-3,-6,-4,-5,-4,-7,-3,-5,-2 | NULL(0%) |
| Name | Description | Date Created | ||||
|---|---|---|---|---|---|---|
| Last quarter revene | Revene for last quarter in state America for year 2013, whith... | 5 | 22 | 6 minets ago | ||
| Expenses in 2013 | Revene for last quarter in state America. | 8 | 15 | 2 hourss ago | ||
| Accounting | Text example here lorem ipsum | 2 | 36 | 5 hours ago | ||
| Srtarbucks orders | Lorem ipsum dolor sit amet | 4 | 31 | 12 hours ago | ||
| In Progress | Lorem ipsum dolor sit amet | 5 | 18 | 3 days ago |


Important! Always have a back-up available of this seed, your device might delete your seed in various situations. If you lose it, you won't be able to access your wallet again.


{% extends "base.html" %}
If you own a property then now could be the best time to reap the profits of your smart investment. If you currently own real estate in Colorado then you have undoubtedly seen amazing appreciation in the value of your property. With real estate inventory as low as it is, now's your time to sell and cash out. Remember, the market is always changing so take your opportunity to sell now while prices are still high. This is a perfect idea for anyone going through a change in their life or trying to make things simpler. List your property with NorCo HomeBuyers and we'll get you the best offer on your property.
At NorCo Homebuyers we understand that the "ins and outs" of real estate can intimidate some. Fortunately, we also understand that sharing our knowledge helps others make more confident decisions regarding their real estate transaction. Click below to learn what the pro's know.
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Symbolic AI, return of the prodigal son
What is Symbolic AI ?
As humans, we represent the world around us through high level concepts. For example, words like 'Trees', 'Flowers', 'Skyscrapers' are symbols that stand for something or someone. The essence of symbolic AI is reasoning through relationships among high level concepts, such as “All men are mortal; Caius is a man; therefore Caius is mortal – associating mortality with all men. However, it is quite labour intensive, as a human has to encode these high level concepts and their relationship into rules. These rules are encoded as if then statements.
A bit about its history
Symbolic AI was the dominant form of AI until the 1980s when statistical methods took over. The term artificial intelligence was coined at the seminal conference in 1956 at Dartmouth, organized by John McCarthy. The pioneers of the field John McCarthy and Marvin Minsky believed a rule-based system will ultimately lead to human level intelligence (Artificial General Intelligence) and beyond. Symbolic AI is also often referred as 'Good Old Fashioned AI' because of this historical context. There is an ongoing project called 'Cyc' is-, one of the longest running. It aims to codify all of the 'common sense knowledge' a human possesses. The hypothesis is that an artificial system should eventually be able to reason like a human once this system has access to all common sense knowledge.
Why it failed to deliver on its promise ?
The approach was overtaken by statistical methods for basically two reasons.
- Hard coding a chain of rules for sufficiently complex tasks can be overwhelming and requires domain expertise. Imagine defining a set of rules to recognize dogs in images- they are furry (but not always), have got two eyes and four legs, and have different shapes, sizes and colours. Defining rules to identify every possible species of dogs can soon become overwhelmingly complex and impractical.
- Rule based reasoning systems are not robust against noisy data. The real world is noisy, peppered with counter examples. Going back to earlier examples of defining rules for identifying dogs. Dogs are four legged animals, but some might be born with three due to a genetic defect or might lose one due to an accident. A system based on rigid set or chain of rules is very difficult to modify and accommodate for all the variations found in nature.
Finally, its resurgence or why do we need it again ?
Statistical machine learning and its modern avatar deep learning (including deep reinforcement learning) has had a profound impact on our society. Autonomous cars, super human performance in the game of GO and near perfect speech recognition is the result of deep learning and specialized hardware. However, these systems are notorious for being data intensive.
When DeepMind achieved super human results in the Atari game of Pong and Breakout using deep reinforcement learning it had to play millions of games with itself, while humans can understand the game mechanics and become decent players with just few examples. The deep network has no concept of a ball, pedal or that the ball needs to be struck with the pedal. The system learns everything from scratch (just pixels).
This is where a hybrid system (Symbolic AI + Deep learning) could potentially be revolutionary as they complement each other quite well. If the system can learn to represent high level concepts like ball, pedal and their relationships as step 1 that would speed up learning to play the game quite significantly. Higher level concepts and relationships also makes it re-usable and easy to transfer knowledge.
Summary
Symbolic AI is set of powerful tools to build intelligent systems that humans can understand and reason about. The tedious nature of building these systems eventually resulted in statistical methods becoming dominant for AI, however it issreturningmaking a comeback . Shortcomings of deep learning align well with strengths of Symbolic systems, hence its poised to take the field of AI to the next level.
To learn more
What was Good Old Fashioned AI and why did it fail


hello
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|
M480 BSP V3.05.005
The Board Support Package for M480 Series
|
#include <hsusbh_reg.h>
Data Fields | |
| __I uint32_t | EHCVNR |
| __I uint32_t | EHCSPR |
| __I uint32_t | EHCCPR |
| __IO uint32_t | UCMDR |
| __IO uint32_t | USTSR |
| __IO uint32_t | UIENR |
| __IO uint32_t | UFINDR |
| __IO uint32_t | UPFLBAR |
| __IO uint32_t | UCALAR |
| __IO uint32_t | UASSTR |
| __IO uint32_t | UCFGR |
| __IO uint32_t | UPSCR [2] |
| __IO uint32_t | USBPCR0 |
| __IO uint32_t | USBPCR1 |
@addtogroup HSUSBH High Speed USB Host Controller (HSUSBH) Memory Mapped Structure for HSUSBH Controller
Definition at line 26 of file hsusbh_reg.h.
| HSUSBH_T::EHCCPR |
[0x0008] EHCI Capability Parameters Register
| Bits | Field | Descriptions |
| [0] | AC64 | 64-bit Addressing Capability
0 = Data structure using 32-bit address memory pointers. |
| [1] | PFLF | Programmable Frame List Flag
0 = System software must use a frame list length of 1024 elements with this EHCI host controller. |
| [2] | ASPC | Asynchronous Schedule Park Capability
0 = This EHCI host controller doesn't support park feature of high-speed queue heads in the Asynchronous Schedule. |
| [7:4] | IST | Isochronous Scheduling Threshold
This field indicates, relative to the current position of the executing host controller, where software can reliably update the isochronous schedule. When bit [7] is zero, the value of the least significant 3 bits indicates the number of micro-frames a host controller can hold a set of isochronous data structures (one or more) before flushing the state. |
| [15:8] | EECP | EHCI Extended Capabilities Pointer (EECP)
0 = No extended capabilities are implemented. |
Definition at line 960 of file hsusbh_reg.h.
| HSUSBH_T::EHCSPR |
[0x0004] EHCI Structural Parameters Register
| Bits | Field | Descriptions |
| [3:0] | N_PORTS | Number of Physical Downstream Ports
This field specifies the number of physical downstream ports implemented on this host controller The value of this field determines how many port registers are addressable in the Operational Register Space (see Table 2-8) Valid values are in the range of 1H to FH. A zero in this field is undefined. |
| [4] | PPC | Port Power Control
This field indicates whether the host controller implementation includes port power control A one in this bit indicates the ports have port power switches A zero in this bit indicates the port do not have port power stitches The value of this field affects the functionality of the Port Power field in each port status and control register. |
| [11:8] | N_PCC | Number of Ports Per Companion Controller
This field indicates the number of ports supported per companion host controller It is used to indicate the port routing configuration to system software. For example, if N_PORTS has a value of 6 and N_CC has a value of 2 then N_PCC could have a value of 3 The convention is that the first N_PCC ports are assumed to be routed to companion controller 1, the next N_PCC ports to companion controller 2, etc In the previous example, the N_PCC could have been 4, where the first 4 are routed to companion controller 1 and the last two are routed to companion controller 2. The number in this field must be consistent with N_PORTS and N_CC. |
| [15:12] | N_CC | Number of Companion Controller
This field indicates the number of companion controllers associated with this USB 2.0 host controller. A zero in this field indicates there are no companion host controllers Port-ownership hand-off is not supported Only high-speed devices are supported on the host controller root ports. A value larger than zero in this field indicates there are companion USB 1.1 host controller(s) Port-ownership hand-offs are supported High, Full- and Low-speed devices are supported on the host controller root ports. |
Definition at line 959 of file hsusbh_reg.h.
| HSUSBH_T::EHCVNR |
[0x0000] EHCI Version Number Register
| Bits | Field | Descriptions |
| [7:0] | CRLEN | Capability Registers Length
This register is used as an offset to add to register base to find the beginning of the Operational Register Space. |
| [31:16] | VERSION | Host Controller Interface Version Number
This is a two-byte register containing a BCD encoding of the EHCI revision number supported by this host controller The most significant byte of this register represents a major revision and the least significant byte is the minor revision. |
Definition at line 958 of file hsusbh_reg.h.
| HSUSBH_T::UASSTR |
[0x003c] USB Asynchronous Schedule Sleep Timer Register
| Bits | Field | Descriptions |
| [11:0] | ASSTMR | Asynchronous Schedule Sleep Timer
This field defines the AsyncSchedSleepTime of EHCI spec. The asynchronous schedule sleep timer is used to control how often the host controller fetches asynchronous schedule list from system memory while the asynchronous schedule is empty. The default value of this timer is 12'hBD6 Because this timer is implemented in UTMI clock (30MHz) domain, the default sleeping time will be about 100us. |
Definition at line 973 of file hsusbh_reg.h.
| HSUSBH_T::UCALAR |
[0x0038] USB Current Asynchronous List Address Register
| Bits | Field | Descriptions |
| [31:5] | LPL | Link Pointer Low (LPL)
These bits correspond to memory address signals [31:5], respectively This field may only reference a Queue Head (QH). |
Definition at line 972 of file hsusbh_reg.h.
| HSUSBH_T::UCFGR |
[0x0060] USB Configure Flag Register
| Bits | Field | Descriptions |
| [0] | CF | Configure Flag (CF)
Host software sets this bit as the last action in its process of configuring the Host Controller This bit controls the default port-routing control logic Bit values and side-effects are listed below. 0 = Port routing control logic default-routes each port to an implementation dependent classic host controller. 1 = Port routing control logic default-routes all ports to this host controller. |
Definition at line 977 of file hsusbh_reg.h.
| HSUSBH_T::UCMDR |
[0x0020] USB Command Register
| Bits | Field | Descriptions |
| [0] | RUN | Run/Stop (R/W)
When set to a 1, the Host Controller proceeds with execution of the schedule The Host Controller continues execution as long as this bit is set to a 1 When this bit is set to 0, the Host Controller completes the current and any actively pipelined transactions on the USB and then halts The Host Controller must halt within 16 micro-frames after software clears the Run bit The HC Halted bit in the status register indicates when the Host Controller has finished its pending pipelined transactions and has entered the stopped state Software must not write a one to this field unless the host controller is in the Halted state (i.e. HCHalted in the USBSTS register is a one) Doing so will yield undefined results. 0 = Stop. 1 = Run. |
| [1] | HCRST | Host Controller Reset (HCRESET) (R/W)
This control bit is used by software to reset the host controller The effects of this on Root Hub registers are similar to a Chip Hardware Reset. When software writes a one to this bit, the Host Controller resets its internal pipelines, timers, counters, state machines, etc to their initial value Any transaction currently in progress on USB is immediately terminated A USB reset is not driven on downstream ports. All operational registers, including port registers and port state machines are set to their initial values Port ownership reverts to the companion host controller(s), with the side effects Software must reinitialize the host controller in order to return the host controller to an operational state. This bit is set to zero by the Host Controller when the reset process is complete Software cannot terminate the reset process early by writing a zero to this register. Software should not set this bit to a one when the HCHalted bit in the USBSTS register is a zero Attempting to reset an actively running host controller will result in undefined behavior. |
| [3:2] | FLSZ | Frame List Size (R/W or RO)
This field is R/W only if Programmable Frame List Flag in the HCCPARAMS registers is set to a one This field specifies the size of the frame list The size the frame list controls which bits in the Frame Index Register should be used for the Frame List Current index Values mean: 00 = 1024 elements (4096 bytes) Default value. 01 = 512 elements (2048 bytes). 10 = 256 elements (1024 bytes) u2013 for resource-constrained environment. 11 = Reserved. |
| [4] | PSEN | Periodic Schedule Enable (R/W)
This bit controls whether the host controller skips processing the Periodic Schedule. Values mean: 0 = Do not process the Periodic Schedule. 1 = Use the PERIODICLISTBASE register to access the Periodic Schedule. |
| [5] | ASEN | Asynchronous Schedule Enable (R/W)
This bit controls whether the host controller skips processing the Asynchronous Schedule. Values mean: 0 = Do not process the Asynchronous Schedule. 1 = Use the ASYNCLISTADDR register to access the Asynchronous Schedule. |
| [6] | IAAD | Interrupt on Asynchronous Advance Doorbell (R/W)
This bit is used as a doorbell by software to tell the host controller to issue an interrupt the next time it advances asynchronous schedule Software must write a 1 to this bit to ring the doorbell. When the host controller has evicted all appropriate cached schedule state, it sets the Interrupt on Asynchronous Advance status bit in the USBSTS register If the Interrupt on Asynchronous Advance Enable bit in the USBINTR register is a one then the host controller will assert an interrupt at the next interrupt threshold. The host controller sets this bit to a zero after it has set the Interrupt on Asynchronous Advance status bit in the USBSTS register to a one. Software should not write a one to this bit when the asynchronous schedule is disabled Doing so will yield undefined results. |
| [23:16] | ITC | Interrupt Threshold Control (R/W)
This field is used by system software to select the maximum rate at which the host controller will issue interrupts The only valid values are defined below If software writes an invalid value to this register, the results are undefined Value Maximum Interrupt Interval 0x00 = Reserved. 0x01 = 1 micro-frame. 0x02 = 2 micro-frames. 0x04 = 4 micro-frames. 0x08 = 8 micro-frames (default, equates to 1 ms). 0x10 = 16 micro-frames (2 ms). 0x20 = 32 micro-frames (4 ms). 0x40 = 64 micro-frames (8 ms). Any other value in this register yields undefined results. Software modifications to this bit while HCHalted bit is equal to zero results in undefined behavior. |
Definition at line 964 of file hsusbh_reg.h.
| HSUSBH_T::UFINDR |
[0x002c] USB Frame Index Register
| Bits | Field | Descriptions |
| [13:0] | FI | Frame Index
The value in this register increment at the end of each time frame (e.g. micro-frame) Bits [N:3] are used for the Frame List current index This means that each location of the frame list is accessed 8 times (frames or micro-frames) before moving to the next index The following illustrates values of N based on the value of the Frame List Size field in the USBCMD register. FLSZ (UCMDR[3:2] Number Elements N 0x0 1024 12 0x1 512 11 0x2 256 10 0x3 Reserved |
Definition at line 967 of file hsusbh_reg.h.
| HSUSBH_T::UIENR |
[0x0028] USB Interrupt Enable Register
| Bits | Field | Descriptions |
| [0] | USBIEN | USB Interrupt Enable or Disable Bit
When this bit is a one, and the USBINT bit in the USBSTS register is a one, the host controller will issue an interrupt at the next interrupt threshold The interrupt is acknowledged by software clearing the USBINT bit. 0 = USB interrupt Disabled. 1 = USB interrupt Enabled. |
| [1] | UERRIEN | USB Error Interrupt Enable or Disable Bit
When this bit is a one, and the USBERRINT bit in the USBSTS register is a one, the host t controller will issue an interrupt at the next interrupt threshold The interrupt is acknowledged by software clearing the USBERRINT bit. 0 = USB Error interrupt Disabled. 1 = USB Error interrupt Enabled. |
| [2] | PCIEN | Port Change Interrupt Enable or Disable Bit
When this bit is a one, and the Port Change Detect bit in the USBSTS register is a one, the host controller will issue an interrupt The interrupt is acknowledged by software clearing the Port Change Detect bit. 0 = Port Change interrupt Disabled. 1 = Port Change interrupt Enabled. |
| [3] | FLREN | Frame List Rollover Enable or Disable Bit
When this bit is a one, and the Frame List Rollover bit in the USBSTS register is a one, the host controller will issue an interrupt The interrupt is acknowledged by software clearing the Frame List Rollover bit. 0 = Frame List Rollover interrupt Disabled. 1 = Frame List Rollover interrupt Enabled. |
| [4] | HSERREN | Host System Error Enable or Disable Bit
When this bit is a one, and the Host System Error Status bit in the USBSTS register is a one, the host controller will issue an interrupt The interrupt is acknowledged by software clearing the Host System Error bit. 0 = Host System Error interrupt Disabled. 1 = Host System Error interrupt Enabled. |
| [5] | IAAEN | Interrupt on Asynchronous Advance Enable or Disable Bit
When this bit is a one, and the Interrupt on Asynchronous Advance bit in the USBSTS register is a one, the host controller will issue an interrupt at the next interrupt threshold The interrupt is acknowledged by software clearing the Interrupt on Asynchronous Advance bit. 0 = Interrupt on Asynchronous Advance Disabled. 1 = Interrupt on Asynchronous Advance Enabled. |
Definition at line 966 of file hsusbh_reg.h.
| HSUSBH_T::UPFLBAR |
[0x0034] USB Periodic Frame List Base Address Register
| Bits | Field | Descriptions |
| [31:12] | BADDR | Base Address
These bits correspond to memory address signals [31:12], respectively. |
Definition at line 971 of file hsusbh_reg.h.
| HSUSBH_T::UPSCR[2] |
[0x0064] ~ [0x0068] USB Port 0 & 1 Status and Control Register
| Bits | Field | Descriptions |
| [0] | CCS | Current Connect Status (RO)
This value reflects the current state of the port, and may not correspond directly to the event that caused the Connect Status Change bit (Bit 1) to be set. This field is zero if Port Power is zero. 0 = No device is present. 1 = Device is present on port. |
| [1] | CSC | Connect Status Change (R/W)
Indicates a change has occurred in the port's Current Connect Status The host controller sets this bit for all changes to the port device connect status, even if system software has not cleared an existing connect status change For example, the insertion status changes twice before system software has cleared the changed condition, hub hardware will be "setting" an already-set bit (i.e., the bit will remain set).Software sets this bit to 0 by writing a 1 to it. This field is zero if Port Power is zero. 0 = No change. 1 = Change in Current Connect Status. |
| [2] | PE | Port Enabled/Disabled (R/W)
Ports can only be enabled by the host controller as a part of the reset and enable Software cannot enable a port by writing a one to this field The host controller will only set this bit to a one when the reset sequence determines that the attached device is a high-speed device. Ports can be disabled by either a fault condition (disconnect event or other fault condition) or by host software Note that the bit status does not change until the port state actually changes There may be a delay in disabling or enabling a port due to other host controller and bus events. When the port is disabled (0b) downstream propagation of data is blocked on this port, except for reset. This field is zero if Port Power is zero. 0 = Port Disabled. 1 = Port Enabled. |
| [3] | PEC | Port Enable/Disable Change (R/WC)
For the root hub, this bit gets set to a one only when a port is disabled due to the appropriate conditions existing at the EOF2 point (See Chapter 11 of the USB Specification for the definition of a Port Error) Software clears this bit by writing a 1 to it. This field is zero if Port Power is zero. 0 = No change. 1 = Port enabled/disabled status has changed. |
| [4] | OCA | Over-current Active (RO)
This bit will automatically transition from a one to a zero when the over current condition is removed. 0 = This port does not have an over-current condition. 1 = This port currently has an over-current condition. |
| [5] | OCC | Over-current Change (R/WC)
1 = This bit gets set to a one when there is a change to Over-current Active Software clears this bit by writing a one to this bit position. |
| [6] | FPR | Force Port Resume (R/W)
This functionality defined for manipulating this bit depends on the value of the Suspend bit For example, if the port is not suspended (Suspend and Enabled bits are a one) and software transitions this bit to a one, then the effects on the bus are undefined. Software sets this bit to a 1 to drive resume signaling The Host Controller sets this bit to a 1 if a J-to-K transition is detected while the port is in the Suspend state When this bit transitions to a one because a J-to-K transition is detected, the Port Change Detect bit in the USBSTS register is also set to a one If software sets this bit to a one, the host controller must not set the Port Change Detect bit. Note that when the EHCI controller owns the port, the resume sequence follows the defined sequence documented in the USB Specification Revision 2.0 The resume signaling (Full-speed 'K') is driven on the port as long as this bit remains a one Software must appropriately time the Resume and set this bit to a zero when the appropriate amount of time has elapsed Writing a zero (from one) causes the port to return to high-speed mode (forcing the bus below the port into a high-speed idle) This bit will remain a one until the port has switched to the high-speed idle The host controller must complete this transition within 2 milliseconds of software setting this bit to a zero. This field is zero if Port Power is zero. 0 = No resume (K-state) detected/driven on port. 1 = Resume detected/driven on port. |
| [7] | SUSPEND | Suspend (R/W)
Port Enabled Bit and Suspend bit of this register define the port states as follows: Port enable is 0 and suspend is 0 = Disable. Port enable is 0 and suspend is 1 = Disable. Port enable is 1 and suspend is 0 = Enable. Port enable is 1 and suspend is 1 = Suspend. When in suspend state, downstream propagation of data is blocked on this port, except for port reset The blocking occurs at the end of the current transaction, if a transaction was in progress when this bit was written to 1 In the suspend state, the port is sensitive to resume detection Note that the bit status does not change until the port is suspended and that there may be a delay in suspending a port if there is a transaction currently in progress on the USB. A write of zero to this bit is ignored by the host controller The host controller will unconditionally set this bit to a zero when: Software sets the Force Port Resume bit to a zero (from a one). Software sets the Port Reset bit to a one (from a zero). If host software sets this bit to a one when the port is not enabled (i.e. Port enabled bit is a zero) the results are undefined. This field is zero if Port Power is zero. 0 = Port not in suspend state. 1 = Port in suspend state. |
| [8] | PRST | Port Reset (R/W)
When software writes a one to this bit (from a zero), the bus reset sequence as defined in the USB Specification Revision 2.0 is started Software writes a zero to this bit to terminate the bus reset sequence Software must keep this bit at a one long enough to ensure the reset sequence, as specified in the USB Specification Revision 2.0, completes Note: when software writes this bit to a one, it must also write a zero to the Port Enable bit. Note that when software writes a zero to this bit there may be a delay before the bit status changes to a zero The bit status will not read as a zero until after the reset has completed If the port is in high-speed mode after reset is complete, the host controller will automatically enable this port (e.g. set the Port Enable bit to a one) A host controller must terminate the reset and stabilize the state of the port within 2 milliseconds of software transitioning this bit from a one to a zero For example: if the port detects that the attached device is high-speed during reset, then the host controller must have the port in the enabled state within 2ms of software writing this bit to a zero. The HCHalted bit in the USBSTS register should be a zero before software attempts to use this bit The host controller may hold Port Reset asserted to a one when the HCHalted bit is a one. This field is zero if Port Power is zero. 0 = Port is not in Reset. 1 = Port is in Reset. |
| [11:10] | LSTS | Line Status (RO)
These bits reflect the current logical levels of the D+ (bit 11) and D- (bit 10) signal lines These bits are used for detection of low-speed USB devices prior to the port reset and enable sequence This field is valid only when the port enable bit is zero and the current connect status bit is set to a one. The encoding of the bits are: Bits[11:10] USB State Interpretation 00 = SE0 Not Low-speed device, perform EHCI reset. 01 = K-state Low-speed device, release ownership of port. 10 = J-state Not Low-speed device, perform EHCI reset. 11 = Undefined Not Low-speed device, perform EHCI reset. This value of this field is undefined if Port Power is zero. |
| [12] | PP | Port Power (PP)
Host controller has port power control switches This bit represents the Current setting of the switch (0 = off, 1 = on) When power is not available on a port (i.e. PP equals a 0), the port is nonfunctional and will not report attaches, detaches, etc. When an over-current condition is detected on a powered port and PPC is a one, the PP bit in each affected port may be transitioned by the host controller from a 1 to 0 (removing power from the port). |
| [13] | PO | Port Owner (R/W)
This bit unconditionally goes to a 0b when the Configured bit in the CONFIGFLAG register makes a 0 to 1 transition This bit unconditionally goes to 1 whenever the Configured bit is zero. System software uses this field to release ownership of the port to a selected host controller (in the event that the attached device is not a high-speed device) Software writes a one to this bit when the attached device is not a high-speed device A one in this bit means that a companion host controller owns and controls the port. |
| [19:16] | PTC | Port Test Control (R/W)
When this field is zero, the port is NOT operating in a test mode A non-zero value indicates that it is operating in test mode and the specific test mode is indicated by the specific value The encoding of the test mode bits are (0x6 ~ 0xF are reserved): Bits Test Mode 0x0 = Test mode not enabled. 0x1 = Test J_STATE. 0x2 = Test K_STATE. 0x3 = Test SE0_NAK. 0x4 = Test Packet. 0x5 = Test FORCE_ENABLE. |
Definition at line 978 of file hsusbh_reg.h.
| HSUSBH_T::USBPCR0 |
[0x00c4] USB PHY 0 Control Register
| Bits | Field | Descriptions |
| [8] | SUSPEND | Suspend Assertion
This bit controls the suspend mode of USB PHY 0. While PHY was suspended, all circuits of PHY were powered down and outputs are tri-state. This bit is 1'b0 in default This means the USB PHY 0 is suspended in default It is necessary to set this bit 1'b1 to make USB PHY 0 leave suspend mode before doing configuration of USB host. 0 = USB PHY 0 was suspended. 1 = USB PHY 0 was not suspended. |
| [11] | CLKVALID | UTMI Clock Valid
This bit is a flag to indicate if the UTMI clock from USB 2.0 PHY is ready S/W program must prevent to write other control registers before this UTMI clock valid flag is active. 0 = UTMI clock is not valid. 1 = UTMI clock is valid. |
Definition at line 982 of file hsusbh_reg.h.
| HSUSBH_T::USBPCR1 |
[0x00c8] USB PHY 1 Control Register
| Bits | Field | Descriptions |
| [8] | SUSPEND | Suspend Assertion
This bit controls the suspend mode of USB PHY 1. While PHY was suspended, all circuits of PHY were powered down and outputs are tri-state. This bit is 1'b0 in default This means the USB PHY 0 is suspended in default It is necessary to set this bit 1'b1 to make USB PHY 0 leave suspend mode before doing configuration of USB host. 0 = USB PHY 1 was suspended. 1 = USB PHY 1 was not suspended. |
Definition at line 983 of file hsusbh_reg.h.
| HSUSBH_T::USTSR |
[0x0024] USB Status Register
| Bits | Field | Descriptions |
| [0] | USBINT | USB Interrupt (USBINT) (R/WC)
The Host Controller sets this bit to 1 on the completion of a USB transaction, which results in the retirement of a Transfer Descriptor that had its IOC bit set. The Host Controller also sets this bit to 1 when a short packet is detected (actual number of bytes received was less than the expected number of bytes). |
| [1] | UERRINT | USB Error Interrupt (USBERRINT) (R/WC)
The Host Controller sets this bit to 1 when completion of a USB transaction results in an error condition (e.g., error counter underflow) If the TD on which the error interrupt occurred also had its IOC bit set, both this bit and USBINT bit are set. |
| [2] | PCD | Port Change Detect (R/WC)
The Host Controller sets this bit to a one when any port for which the Port Owner bit is set to zero has a change bit transition from a zero to a one or a Force Port Resume bit transition from a zero to a one as a result of a J-K transition detected on a suspended port This bit will also be set as a result of the Connect Status Change being set to a one after system software has relinquished ownership of a connected port by writing a one to a port's Port Owner bit. This bit is allowed to be maintained in the Auxiliary power well Alternatively, it is also acceptable that on a D3 to D0 transition of the EHCI HC device, this bit is loaded with the OR of all of the PORTSC change bits (including: Force port resume, over-current change, enable/disable change and connect status change). |
| [3] | FLR | Frame List Rollover (R/WC)
The Host Controller sets this bit to a one when the Frame List Index rolls over from its maximum value to zero The exact value at which the rollover occurs depends on the frame list size For example, if the frame list size (as programmed in the Frame List Size field of the USBCMD register) is 1024, the Frame Index Register rolls over every time FRINDEX[13] toggles Similarly, if the size is 512, the Host Controller sets this bit to a one every time FRINDEX[12] toggles. |
| [4] | HSERR | Host System Error (R/WC)
The Host Controller sets this bit to 1 when a serious error occurs during a host system access involving the Host Controller module. |
| [5] | IAA | Interrupt on Asynchronous Advance (R/WC)
System software can force the host controller to issue an interrupt the next time the host controller advances the asynchronous schedule by writing a one to the Interrupt on Asynchronous Advance Doorbell bit in the USBCMD register This status bit indicates the assertion of that interrupt source. |
| [12] | HCHalted | HCHalted (RO)
This bit is a zero whenever the Run/Stop bit is a one The Host Controller sets this bit to one after it has stopped executing as a result of the Run/Stop bit being set to 0, either by software or by the Host Controller hardware (e.g. internal error). |
| [13] | RECLA | Reclamation (RO)
This is a read-only status bit, which is used to detect an empty asynchronous schedule. |
| [14] | PSS | Periodic Schedule Status (RO)
The bit reports the current real status of the Periodic Schedule If this bit is a zero then the status of the Periodic Schedule is disabled If this bit is a one then the status of the Periodic Schedule is enabled The Host Controller is not required to immediately disable or enable the Periodic Schedule when software transitions the Periodic Schedule Enable bit in the USBCMD register When this bit and the Periodic Schedule Enable bit are the same value, the Periodic Schedule is either enabled (1) or disabled (0). |
| [15] | ASS | Asynchronous Schedule Status (RO)
The bit reports the current real status of the Asynchronous Schedule If this bit is a zero then the status of them Asynchronous Schedule is disabled If this bit is a one then the status of the Asynchronous Schedule is enabled The Host Controller is not required to immediately disable or enable the Asynchronous Schedule when software transitions the Asynchronous Schedule Enable bit in the USBCMD register When this bit and the Asynchronous Schedule Enable bit are the same value, the Asynchronous Schedule is either enabled (1) or disabled (0). |
Definition at line 965 of file hsusbh_reg.h.


Associate Professor, SWUFE
PhD Candidate, UCL
PhD Candidate, Rice University
PhD Candidate, Tsinghua


val supportedAspectRatios: Set<AspectRatio>
Gets all the aspect ratios supported by the current camera.
Getter


Abusing Cleanup Utilities in finalize()
Constructors aren’t the only source of side effects we can use to affect change.
 Developers use this method to clean up any non-JVM resources that may not have been cleaned up correctly. Because it’s called automatically, it’s possible to abuse any side effects that may occur in this method, without the app acting on your malicious object at all! In fact, their throwing it away is a necessary step in the exploitation process.
Here are a few types you can use to do some funny stuff.
Attack #1: Delete Arbitrary Files (org.jpedal.io.ObjectStore)
By far, the most commonly abusable tactic in finalize() is messing with files. It makes sense; a type is somehow “backed” by a temp file, and the finalize() is a clear message that the file can be cleaned up.
The first type I found with this capability also happened to be in ColdFusion 10: org.jpedal.io.ObjectStore. When analyzing classes to determine potential Kryo finalize() exploit gadgets, you only need to look at two things: the zero-argument constructor and the finalize() method. Those are the only things that will happen. You can control the fields, as long as they are also objects that can be created with zero-argument constructors. Here’s the constructor:
public ObjectStore() {
init();
}
Doesn’t do much. Anything it does is undone anyway, because Kryo copies our state over the top of their state, once the constructor is finished executing. And next, the finalize():
protected void finalize() {
...
flush();
...
}
protected void flush() {
...
/**
* flush any image data serialized as bytes
*/ Iterator filesTodelete = imagesOnDiskAsBytes.keySet().iterator();
while(filesTodelete.hasNext()) {
final Object file = filesTodelete.next();
if(file! = null){
final File delete_file = new File((String)imagesOnDiskAsBytes.get(file));
if(delete_file.exists()) {
delete_file.delete();
}
}
}
...
}
This means all you do is provide a java.util.Map that contains String file paths as values in the imagesonDiskAsBytes field, and the JVM will delete them for you! Cheers!
Attack #2: Memory Corruption (multiple types)
I’m definitely not the best person to chase this lead down, but we can use the following gadgets to create memory corruption bug primitives. They all call free() on a user-controlled memory address:
com.sun.jna.Memory, packaged with Vert.x
com.sun.medialib.codec.jpeg.Encoder (no source available), part of ColdFusion 10
com.sun.medialib.codec.png.Decoder (no source available), part of ColdFusion 10
com.xuggle.ferry.AtomicInteger, part of Liferay (also the xuggle library)
I’m sure there are more out there, but these few are already available on a lot of popular platforms. Let’s take a look at the com.sun.jna.Memory#finalize() call:
That free() is indeed delegated to the stdlib.h::free() function. For the uninitiated, this is incredibly dangerous. The test case that proves memory corruption is here. The test is disabled, but you can enable it by changing it to public from private. When enabled, the test case crashes the JVM.
Attack #3: Close Any File Descriptors (java.net.DatagramSocket)
There are a couple of these, and much like the other attack types, I haven’t fully explored them all. However, the most obvious one is in java.net.PlainDatagramSocketImpl, packaged with the JRE.
There is no explicit constructor in the type, nor any superclass up until java.lang.Object. There is, however, a java.io.FileDescriptor field called fd in its grandparent, java.net.DatagramSocketImpl.
The FileDescriptor type has a zero-argument constructor, and contains nothing but a simple integer to represent the file descriptor at the OS level. The finalize() kicks off the fun:
protected void finalize() {
close();
}
/**
* Close the socket.
*/
protected void close() {
if (fd != null) {
datagramSocketClose();
…
}
This method is native, and as shown in this code from the HotSpot native layer, is just a plain old kill-this-file-descriptor-I-don’t-care-what-it-is close() from unistd.h.
int os::close(int fd) {
return ::close(fd);
}
int os::socket_close(int fd) {
return ::close(fd);
}
See the testDatagramSocket() test case to verify this gadget. An attacker could submit many gadget instances and close every possible file descriptor. This would prevent socket communications with users, file reading or writing, or any IPC.


Warehouse Freightman Kluck:
That's a good adventurer... Heh heh... This free trade zone will benefit us all!


Columns need to be nested within a "row" and a direct child of a "container". All columns start off at equal-widths by defining the class of "col" and auto-collapse at the mobile portrait breakpoint if no responsive classes are defined.
col
col
col
col
col
col
col
col
col
col
Remove Gutters
To remove all padding from columns, use the "no-gutters" class preceded by the initial class of "col".
no-gutters
no-gutters
no-gutters
no-gutters
Full Width Container
Define your div with a class of "container-fluid" for full width.
col
col
col
col
Responsive Grid
Grid - Desktop
To define our 12 column grid, all classes must precede with the initial class of "col"
col-1
col-11
col-2
col-10
col-3
col-9
col-4
col-8
col-5
col-7
col-6
col-6
col-12
Grid - Tablet (Breakpoint)
Defining our tablet breakpoints, all classes must precede with the class of "col" and if defined, your desktop class of "col-(1-12)"
col-m-1
col-m-11
col-m-2
col-m-10
col-m-3
col-m-9
col-m-4
col-m-8
col-m-5
col-m-7
col-m-6
col-m-6
col-m-12
Grid - Mobile Landscape (Breakpoint)
Defining our tablet breakpoints, all classes must precede with the class of "col" and if defined, your desktop and tablet classes of "col-(1-12)"
col-sm-1
col-sm-11
col-sm-2
col-sm-10
col-sm-3
col-sm-9
col-sm-4
col-sm-8
col-sm-5
col-sm-7
col-sm-6
col-sm-6
col-sm-12
Grid - Mobile Portrait (Breakpoint)
Defining our tablet breakpoints, all classes must precede with the class of "col" and if defined, your desktop, tablet and mobile landscape classes of "col-(1-12)"
col-xs-1
col-xs-11
col-xs-2
col-xs-10
col-xs-3
col-xs-9
col-xs-4
col-xs-8
col-xs-5
col-xs-7
col-xs-6
col-xs-6
col-xs-12
Column Wrapping
If responsive columns are placed within a single row and which the total result in greater then 12, they will automatically wrap onto a new line.
col-4
col-8
col-6
col-6
col-3
col-2
col-7
Vertical Alignment
Align-Start
To align columns from the top, combine a class of "align-start" preceded by the class of "row"
align-start
align-start
align-start
Align-Center
To align columns from the center, combine a class of "align-center" preceded by the class of "row"
align-center
align-center
align-center
Align-End
To align columns from the bottom, combine a class of "align-end" preceded by the class of "row"
align-end
align-end
align-end
Horizontal Alignment
Justify-Start
To align columns from the left, combine a class of "justify-start" preceded by the by class of "row"
justify-start
justify-start
Justify-Center
To align columns from the right, combine a class of "justify-center" preceded by the class of "row"
justify-center
justify-center
Justify-End
To align columns from the right, combine a class of "justify-end" preceded by the class of "row"
justify-end
justify-end
Justify-Between
To evenly space columns between each-other, combine a class of "justify-between" preceded by the class of "row"
justify-between
justify-between
Justify-Around
To evenly space columns around each-other, combine a class of "justify-around" preceded by the class of "row"
justify-around
justify-around
Self-Align Columns
To individually self-align columns, combine a class of "self-start", "self-center", "self-end" preceded by the by class of "col"
self-start
self-center
self-end
Column Reordering
To individually reorder columns, combine a class of either "order-first", "order-last", preceded by the by class of "col"


3.0.1 / 2017-04-27¶ ↑
-
[Fix] deep extending should work with a non-object (#46)
-
[Dev Deps] update
tape
,eslint
,@ljharb/eslint-config
-
[Tests] up to
node
v7.9
,v6.10
,v4.8
; improve matrix -
[Docs] Switch from vb.teelaun.ch to versionbadg.es for the npm version badge SVG.
-
[Docs] Add example to readme (#34)
3.0.0 / 2015-07-01¶ ↑
-
[Possible breaking change] Use global “strict” directive (#32)
-
[Tests]
int
is an ES3 reserved word -
[Tests] Test up to
io.js
v2.3
-
[Tests] Add
npm run eslint
-
[Dev Deps] Update
covert
,jscs
2.0.1 / 2015-04-25¶ ↑
-
Use an inline
isArray
check, for ES3 browsers. (#27) -
Some old browsers fail when an identifier is
toString
-
Test latest
node
andio.js
versions ontravis-ci
; speed up builds -
Add license info to package.json (#25)
-
Update
tape
,jscs
-
Adding a CHANGELOG
2.0.0 / 2014-10-01¶ ↑
-
Increase code coverage to 100%; run code coverage as part of tests
-
Add
npm run lint
; Run linter as part of tests -
Remove nodeType and setInterval checks in isPlainObject
-
Updating
tape
,jscs
,covert
-
General style and README cleanup
1.3.0 / 2014-06-20¶ ↑
-
Add component.json for browser support (#18)
-
Use SVG for badges in README (#16)
-
Updating
tape
,covert
-
Updating travis-ci to work with multiple node versions
-
Fix
deep === false
bug (returning target as {}) (#14) -
Fixing constructor checks in isPlainObject
-
Adding additional test coverage
-
Adding
npm run coverage
-
Add LICENSE (#13)
-
Adding a warning about
false
, per #11 -
General style and whitespace cleanup
1.2.1 / 2013-09-14¶ ↑
-
Fixing hasOwnProperty bugs that would only have shown up in specific browsers. Fixes #8
-
Updating
tape
1.2.0 / 2013-09-02¶ ↑
-
Updating the README: add badges
-
Adding a missing variable reference.
-
Using
tape
instead ofbuster
for tests; add more tests (#7) -
Adding node 0.10 to Travis CI (#6)
-
Enabling “npm test” and cleaning up package.json (#5)
-
Add Travis CI.
1.1.3 / 2012-12-06¶ ↑
-
Added unit tests.
-
Ensure extend function is named. (Looks nicer in a stack trace.)
-
README cleanup.
1.1.1 / 2012-11-07¶ ↑
-
README cleanup.
-
Added installation instructions.
-
Added a missing semicolon
1.0.0 / 2012-04-08¶ ↑
-
Initial commit


{% load staticfiles %}
MovieGEEKs
Lda model ( {{ number_of_topics }} topics)
Great thanks to for this execellent tool
cpsievert
{% for topic in topics %}
{{ topic.0 }}
{{ topic.1 }} {% endfor %}


EPA Center for Corporate Climate Leadership
EPA's Center for Corporate Climate Leadership serves as a resource center for all organizations looking to expand their work in the area of greenhouse gas (GHG) measurement and management.
EPA's Center for Corporate Climate Leadership serves as a resource center for all organizations looking to expand their work in the area of greenhouse gas (GHG) measurement and management.