B
����4.1.13 Ladder diagram
Table 4.1.13 Coding for Fig. 4.1.13
Coding sheet Status of operating result
Step Number Instruction Address No. Bit No. Remarks ST2 ST1 ST0
1 RD R0 . 0 A A C
2 OR X0 . 0 B A+B C
3 SET Y0 . 0 Y0.0
output – – (A+B) +C
4.1.13 SET
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(4) Remarks
(a) Restriction of using Do not use SET/RST like the following example 1, use them alone like the following example 2.
(S)
Y0.0R0.0
X0.0
�
END2
(S)
Y0.0R0.0
X0.0
END2
� � � � � �
�
R0.0
X0.0
Y0.1
Example 1 Example 2
Y0.1
� �
� The relation between COM and COME. The operation of SET/RST in the section of COM/COME is as follows. COM condition ON (ACT=1) : It operates usually. COM condition OFF (ACT=0) : SET does not operate.
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4. PMC BASIC INSTRUCTIONS B–61863E/10PMC SEQUENCE PROGRAM
96
(1) Format
(Address)
Address No.
Bit No.
(2) Logical product of inverted logical operation result ST0 with the content of the specified address is outputted to the same address.
(3) Refer to the figure below for an example of using the RST instruction.
(R)
Y0.0
C
R0.0
A
X0.0
B
����4.1.14 Ladder diagram
Table 4.1.14 Coding for Fig. 4.1.14
Coding sheet Status of operating result
Step Number Instruction Address No. Bit No. Remarks ST2 ST1 ST0
1 RD R0 . 0 A A C
2 OR X0 . 0 B A+B C
3 SET Y0 . 0 Y0.0
output – (A+B) +C
4.1.14 RST
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(4) Remarks
(a) Restriction of using Do not use SET/RST like the following example 1, use them alone like the following example 2.

Example 1 Example 2
Y0.1
� The relation between COM and COME.
The operation of SET/RST in the section of COM/COME is as follows. COM condition ON (ACT=1) : It operates usually. COM condition OFF (ACT=0) : RST does not operate.
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5. FUNCTIONAL INSTRUCTIONS B–61863E/10PMC SEQUENCE PROGRAM
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5 FUNCTIONAL INSTRUCTIONS In preparing a sequence program, some functions such as the function for controlling rotation via the shorter path, are difficult to program with basic instructions, which perform only one-bit logical operations. Therefore, functional instructions are available to facilitate programming. See Table 5 (a).
Table 5 (a) Types and processing of functional instructions (1)
Instruction Model
Format 1 (Ladder)
Format 2 (paper tape
punch program)
Format 3 (program input)
Processing PMC- PA1
PMC- PA3
END1 SUB1 S1 End of a first-level ladder program � �
END2 SUB2 S2 End of a second-level ladder program � �
END3 SUB48 S48 End of a third-level ladder program � �
TMR TMR S3 or TMR Timer processing � �
TMRB SUB24 S24 Fixed timer processing � �
TMRC SUB54 S54 Timer processing � �
DEC DEC S4 or DEC Decoding � �
DECB SUB25 S25 Binary decoding � �
CTR SUB5 S5 Counter processing � �
CTRC SUB55 S55 Counter processing � �
ROT SUB6 S6 Rotation control � �
ROTB SUB26 S26 Binary rotation control � �
COD SUB7 S7 Code conversion � �
CODB SUB27 S27 Binary code conversion � �
MOVE SUB8 S8 Data transfer after logical AND � �
MOVOR SUB28 S28 Data transfer after logical OR � �
MOVB SUB43 S43 Transfer of 1 byte � �
MOVW SUB44 S44 Transfer of 2 bytes � �
MOVN SUB45 S45 Transfer of an arbitrary number of bytes � �
COM SUB9 S9 Common line control � �
� : Cannot be used � : Can be used
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Table 5 (a) Types and processing of functional instructions (2)
Instruction Model
Format 1 (Ladder)
Format 2 (paper tape
punch program)
Format 3 (program input)
Processing PMC- PA1
PMC- PA3
COME SUB29 S29 End of common line control � �
JMP SUB10 S10 Jump � �
JMPE SUB30 S30 End of a jump � �
JMPB SUB68 S68 Label jump 1 � �
JMPC SUB73 S73 Label jump 2 � �
LBL SUB69 S69 Label � �
PARI SUB11 S11 Parity check � �
DCNV SUB14 S14 Data conversion � �
DCNVB SUB31 S31 Extended data conversion � �
COMP SUB15 S15 Comparison � �
COMPB SUB32 S32 Binary comparison � �
COIN SUB16 S16 Coincidence check � �
SFT SUB33 S33 Shift register � �
DSCH SUB17 S17 Data search � �
DSCHB SUB34 S34 Binary data search � �
XMOV SUB18 S18 Indexed data transfer � �
XMOVB SUB35 S35 Binary indexed data transfer � �
ADD SUB19 S19 Addition � �
ADDB SUB36 S36 Binary addition � �
SUB SUB20 S20 Subtraction � �
SUBB SUB37 S37 Binary subtraction � �
MUL SUB21 S21 Multiplication � �
MULB SUB38 S38 Binary multiplication � �
DIV SUB22 S22 Division � �
DIVB SUB39 S39 Binary division � �
NUME SUB23 S23 Constant definition � �
NUMEB SUB40 S40 Binary constant definition � �
DISP SUB49 S49 Message display � �
DISPB SUB41 S41 Extended message display � �
EXIN SUB42 S42 External data input � �
WINDR SUB51 S51 Window data read � �
WINDW SUB52 S52 Window data write � �
� : Cannot be used � : Can be used
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100
Table 5 (a) Types and processing of functional instructions (3)
Instruction Model
Format 1 (Ladder)
Format 2 (paper tape
punch program)
Format 3 (program input)
Processing PMC- PA1
PMC- PA3
PSGNL SUB50 S50 Position signal output � �
PSGN2 SUB63 S63 Position signal output 2 � �
DIFU SUB57 S57 Rising edge detection � �
DIFD SUB58 S58 Falling edge detection � �
EOR SUB59 S59 Exclusive OR � �
AND SUB60 S60 Logical AND � �
OR SUB61 S61 Logical OR � �
NOT SUB62 S62 Logical NOT � �
END SUB64 S64 End of a subprogram � �
CALL SUB65 S65 Conditional subprogram call � �
CALLU SUB66 S66 Unconditional subprogram call � �
SP SUB71 S71 Subprogram � �
SPE SUB72 S72 End of a subprogram � �
AXCTL SUB53 S53 PMC axes control � �
� : Cannot be used � : Can be used
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Table 5 (a) Types and processing of functional instructions (4)
Instr c SUB Model
Instruc- tion
SUB number Processing ���
��� ��� ���
��� ���
��� ��
��� ���
��� ���
��� ��
��� ���
��� �� ��
END1 1 End of a first-level ladder program � � � � � � � � �
END2 2 End of a second-level ladder program � � � � � � � � �
END3 48 End of a third-level ladder program � � � � � � � � �
TMR 3 Timer processing � � � � � � � � �
TMRB 24 Fixed timer processing � � � � � � � � �
TMRC 54 Timer processing � � � � � � � � �
DEC 4 Decoding � � � � � � � � �
DECB 25 Binary decoding � � � � � � � � �
CTR 5 Counter processing � � � � � � � � �
CTRC 55 Counter processing � � � � � � � � �
ROT 6 Rotation control � � � � � � � � �
ROTB 26 Binary rotation control � � � � � � � � �
COD 7 Code conversion � � � � � � � � �
CODB 27 Binary code conversion � � � � � � � � �
MOVE 8 Data transfer after Logical AND � � � � � � � � �
MOVOR 28 Data transfer after logical OR � � � � � � � � �
MOVB 43 Transfer of 1 byte � � � � � � � � �
MOVW 44 Transfer of 2 bytes � � � � � � � � �
MOVN 45 Transfer of an arbitrary number of bytes � � � � � � � � �
COM 9 Common line control � � � � � � � � �
COME 29 End of common line control � � � � � � � � �
JMP 10 Jump � � � � � � � � �
JMPE 30 End of a jump � � � � � � � � �
JMPB 68 Label jump 1 � � � � � � � � �
JMPC 73 Label jump 2 � � � � � � � � �
LBL 69 Label � � � � � � � � �
PARI 11 Parity check � � � � � � � � �
DCNV 14 Data conversion � � � � � � � � �
DCNVB 31 Binary data conversion � � � � � � � � �
COMP 15 Comparison � � � � � � � � �
COMPB 32 Binary comparison � � � � � � � � �
COIN 16 Coincidence check � � � � � � � � �
SFT 33 Shift register � � � � � � � � �
DSCH 17 Data search � � � � � � � � �
DSCHB 34 Binary data search � � � � � � � � �
� : Cannot be used � : Can be used
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5.  FUNCTIONAL INSTRUCTIONSPMC SEQUENCE PROGRAM
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Table 5 (a) Types and processing of functional instructions (6)
Model
Name SUB
number Processing ������ ��������� � ������ ��������� �
�� ������ ��� ��� �
����� � ����� � ������� ������� ����� �
END1 1 First level program end � � � � �
END2 2 Second level program end � � � � �
END3 48 Third level program end � � � � �
TMR 3 Timer processing � � � � �
TMRB 24 Fixed timer processing � � � � �
TMRC 54 Timer processing � � � � �
DEC 4 Decoding � � � � �
DECB 25 Binary decoding � � � � �
CTR 5 Counter processing � � � � �
CTRC 55 Counter processing � � � � �
ROT 6 Rotation control � � � � �
ROTB 26 Binary rotation control � � � � �
COD 7 Code conversion � � � � �
CODB 27 Binary code conversion � � � � �
MOVE 8 ANDed data transfer � � � � �
MOVOR 28 ORed data transfer � � � � �
MOVB 43 Byte data transfer � � � � �
MOVW 44 Word data transfer � � � � �
MOVN 45 Block data transfer � � � � �
COM 9 Common line control � � � � �
COME 29 Common line control end � � � � �
JMP 10 Jump � � � � �
JMPE 30 Jump end � � � � �
JMPB 68 Label jump 1 � � � � �
JMPC 73 Label jump 2 � � � � �
LBL 69 Label � � � � �
PARI 11 Parity check � � � � �
DCNV 14 Data conversion � � � � �
DCNVB 31 Extended data conversion � � � � �
COMP 15 Comparison � � � � �
COMPB 32 Binary comparison � � � � �
COIN 16 Coincidence check � � � � �
SFT 33 Shift register � � � � �
DSCH 17 Data search � � � � �
DSCHB 34 Binary data search � � � � �
XMOV 18 Indexed data transfer � � � � �
XMOVB 35 Binary indexed data transfer � � � � �
ADD 19 Addition � � � � �
� : Cannot be used � : Can be used
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5. FUNCTIONAL INSTRUCTIONS B–61863E/10PMC SEQUENCE PROGRAM
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Table 5 (a) Types and processing of functional instructions (7)
Model
Name SUB
number Processing ������ ��������� � ������ ��������� �
�� ������ ��� ��� �
����� � ����� � ������� ������� ����� �
ADDB 36 Binary Addition � � � � �
SUB 20 Subtraction � � � � �
SUBB 37 Binary subtraction � � � � �
MUL 21 Multiplication � � � � �
MULB 38 Binary multiplication � � � � �
DIV 22 Division � � � � �
DIVB 39 Binary division � � � � �
NUME 23 Definition of constant � � � � �
NUMEB 40 Definition of binary constant � � � � �
DISP 49 Message display � � � � �
DISPB 41 Extended message display � � � � �
EXIN 42 External data input � � � � �
AXCTL 53 PMC axis control � � � � �
WINDR 51 Window data read � � � � �
WINDW 52 Window data write � � � � �
FNC9X 9X Arbitrary functional ins. � � � � �
MMC3R 88 MMC3 window data read � � � � �
MMC3W 89 MMC3 window data write � � � � �
MMCWR 98 MMC2 window data read � � � � �
MMCWW 99 MMC2 window data write � � � � �
DIFU 57 Rising edge detection � � � � �
DIFD 58 Falling edge detection � � � � �
EOR 59 Exclusive OR � � � � �
AND 60 Logical production � � � � �
OR 61 Logical Add � � � � �
NOT 62 Logical Negation � � � � �
END 64 End of subprograms � � � � �
CALL 65 Conditional subprogram call � � � � �
CALLU 66 Unconditional subprogram call � � � � �
SP 71 Subprogram � � � � �
SPE 72 End of a subprogram � � � � �
� : Cannot be used � : Can be used � : Can be used (with some restrictions)
NOTE On the PMC-RB3/RB4/RC3/RC4, DISP is provided only for the compatibility with Series 16/18 MODEL A. On the Series 16/18 MODEL B, it is recommended to use DISPB instead of DISP because some extended functions such as high speed display and display of double sized character are available only with DISPB. On the Series 16/18 MODEL B, if both DISP and DISPB are used in the same sequence program, double sized character can not be displayed by DISPB.
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B–61863E/10 5. FUNCTIONAL INSTRUCTIONSPMC SEQUENCE PROGRAM
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Table 5 (a) Types and processing of functional instructions (8)
SUB Model
Name SUB
number Processing ������ ��� � �� ������� ��� � ��
� ���� � ����
END1 1 First level program end � �
END2 2 Second level program end � �
END3 48 Third level program end � �
TMR 3 Timer processing � �
TMRB 24 Fixed timer processing � �
TMRC 54 Timer processing � �
DEC 4 Decoding � �
DECB 25 Binary decoding � �
CTR 5 Counter processing � �
CTRC 55 Counter processing � �
ROT 6 Rotation control � �
ROTB 26 Binary rotation control � �
COD 7 Code conversion � �
CODB 27 Binary code conversion � �
MOVE 8 ANDed data transfer � �
MOVOR 28 ORed data transfer � �
MOVB 43 Byte data transfer � �
MOVW 44 Word data transfer � �
MOVN 45 Block data transfer � �
COM 9 Common line control � �
COME 29 Common line control end � �
JMP 10 Jump � �
JMPE 30 Jump end � �
JMPB 68 Label jump 1 � �
JMPC 73 Label jump 2 � �
LBL 69 Label � �
PARI 11 Parity check � �
DCNV 14 Data conversion � �
DCNVB 31 Extended data conversion � �
COMP 15 Comparison � �
COMPB 32 Binary comparison � �
COIN 16 Coincidence check � �
SFT 33 Shift register � �
DSCH 17 Data search � �
DSCHB 34 Binary data search � �
XMOV 18 Indexed data transfer � �
XMOVB 35 Binary indexed data transfer � �
ADD 19 Addition � �
� : Cannot be used � : Can be used
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5. FUNCTIONAL INSTRUCTIONS B–61863E/10PMC SEQUENCE PROGRAM
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Table 5 (a) Types and processing of functional instructions (9)
SUB Model
Name SUB
number Processing ������ ��� � �� ������� ��� � ��
� ���� � ����
ADDB 36 Binary Addition � �
SUB 20 Subtraction � �
SUBB 37 Binary subtraction � �
MUL 21 Multiplication � �
MULB 38 Binary multiplication � �
DIV 22 Division � �
DIVB 39 Binary division � �
NUME 23 Definition of constant � �
NUMEB 40 Definition of binary constant � �
DISP 49 Message display (Note) � �
DISPB 41 Extended message display � �
EXIN 42 External data input � �
AXCTL 53 PMC axis control � �
WINDR 51 Window data read � �
WINDW 52 Window data write � �
FNC9X 9X Arbitrary functional ins. � �
MMC3R 88 MMC3 window data read � �
MMC3W 89 MMC3 window data write � �
MMCWR 98 MMC2 window data read � �
MMCWW 99 MMC2 window data write � �
DIFU 57 Rising edge detection � �
DIFD 58 Falling edge detection � �
EOR 59 Exclusive OR � �
AND 60 Logical production � �
OR 61 Logical Add � �
NOT 62 Logical Negation � �
END 64 End of subprograms � �
CALL 65 Conditional subprogram call � �
CALLU 66 Unconditional subprogram call � �
SP 71 Subprogram � �
SPE 72 End of a subprogram � �
� : Cannot be used � : Can be used � : Can be used (with some restrictions)
NOTE On the PMC-RB5/RB6, DISP is provided only for the compatibility with Series 16 MODEL A/B. On the Series 16/18 MODEL C, it is recommended to use DISPB instead of DISP because some extended functions such as high speed display and display of double sized character are available only with DISPB. On the Series 16/18 MODEL C, if both DISP and DISPB are used in the same sequence program, double sized character can not be displayed by DISPB.
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B–61863E/10 5. FUNCTIONAL INSTRUCTIONSPMC SEQUENCE PROGRAM
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Table 5 (a) Types and processing of functional instructions (10)
SUB Model
Name SUB
number Processing ������ ���� � �
������� �������
END1 1 First level program end � �
END2 2 Second level program end � �
END3 48 Third level program end � �
TMR 3 Timer processing � �
TMRB 24 Fixed timer processing � �
TMRC 54 Timer processing � �
DEC 4 Decoding � �
DECB 25 Binary decoding � �
CTR 5 Counter processing � �
CTRC 55 Counter processing � �
ROT 6 Rotation control � �
ROTB 26 Binary rotation control � �
COD 7 Code conversion � �
CODB 27 Binary code conversion � �
MOVE 8 ANDed data transfer � �
MOVOR 28 ORed data transfer � �
MOVB 43 Byte data transfer � �
MOVW 44 Word data transfer � �
MOVN 45 Block data transfer � �
COM 9 Common line control � �
COME 29 Common line control end � �
JMP 10 Jump � �
JMPE 30 Jump end � �
JMPB 68 Label jump 1 � �
JMPC 73 Label jump 2 � �
LBL 69 Label � �
PARI 11 Parity check � �
DCNV 14 Data conversion � �
DCNVB 31 Extended data conversion � �
COMP 15 Comparison � �
COMPB 32 Binary comparison � �
COIN 16 Coincidence check � �
SFT 33 Shift register � �
DSCH 17 Data search � �
DSCHB 34 Binary data search � �
XMOV 18 Indexed data transfer � �
XMOVB 35 Binary indexed data transfer � �
ADD 19 Addition � �
� : Cannot be used � : Can be used
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5. FUNCTIONAL INSTRUCTIONS B–61863E/10PMC SEQUENCE PROGRAM
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Table 5 (a) Types and processing of functional instructions (11)
SUB Model
Name SUB
number Processing ������ ���� � �
������� �������
ADDB 36 Binary Addition � �
SUB 20 Subtraction � �
SUBB 37 Binary subtraction � �
MUL 21 Multiplication � �
MULB 38 Binary multiplication � �
DIV 22 Division � �
DIVB 39 Binary division � �
NUME 23 Definition of constant � �
NUMEB 40 Definition of binary constant � �
DISP 49 Message display � �
DISPB 41 Extended message display � �
EXIN 42 External data input � �
AXCTL 53 PMC axis control � �
WINDR 51 Window data read � �
WINDW 52 Window data write � �
FNC9X 9X Arbitrary functional ins. � �
MMC3R 88 MMC3 window data read � �
MMC3W 89 MMC3 window data write � �
MMCWR 98 MMC2 window data read � �
MMCWW 99 MMC2 window data write � �
DIFU 57 Rising edge detection � �
DIFD 58 Falling edge detection � �
EOR 59 Exclusive OR � �
AND 60 Logical production � �
OR 61 Logical Add � �
NOT 62 Logical Negation � �
END 64 End of subprograms � �
CALL 65 Conditional subprogram call � �
CALLU 66 Unconditional subprogram call � �
SP 71 Subprogram � �
SPE 72 End of a subprogram � �
� : Cannot be used � : Can be used
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B–61863E/10 5. FUNCTIONAL INSTRUCTIONSPMC SEQUENCE PROGRAM
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Table 5 (a) Types and Processing of Functional Instructions (6) Part 1
SUB Model
Name SUBnumber Processing Series 16 � MODEL ��Series 18 � MODEL �number PMC-RB5 PMC-RB6
END1 1 First level program end � �
END2 2 Second level program end � �
END3 48 Third level program end � �
TMR 3 Timer processing � �
TMRB 24 Fixed timer processing � �
TMRC 54 Timer processing � �
DEC 4 Decoding � �
DECB 25 Binary decoding � �
CTR 5 Counter processing � �
CTRC 55 Counter processing � �
ROT 6 Rotation control � �
ROTB 26 Binary rotation control � �
COD 7 Code conversion � �
CODB 27 Binary code conversion � �
MOVE 8 ANDed data transfer � �
MOVOR 28 ORed data transfer � �
MOVB 43 Transfer of one byte � �
MOVW 44 Transfer of two bytes � �
MOVN 45 Transfer of arbitrary bytes � �
COM 9 Common line control � �
COME 29 Common line control end � �
JMP 10 Jump � �
JMPE 30 Jump end � �
JMPB 68 Label jump 1 � �
JMPC 73 Label jump 2 � �
LBL 69 Label specification � �
PARI 11 Parity check � �
DCNV 14 Data conversion � �
DCNVB 31 Binary data conversion � �
COMP 15 Comparison � �
COMPB 32 Binary comparison � �
COIN 16 Coincidence check � �
SFT 33 Shift register � �
DSCH 17 Data search � �
DSCHB 34 Binary data search � �
XMOV 18 Indexed data transfer � �
XMOVB 35 Binary indexed data transfer � �
ADD 19 BCD addition � �
� : Cannot be used � : Can be used
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5. FUNCTIONAL INSTRUCTIONS B–61863E/10PMC SEQUENCE PROGRAM
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Table 5 (a) Types and Processing of Functional Instructions (6) Part 2
SUB Model
Name SUBnumber Processing Series 16 � MODEL ��Series 18 � MODEL �number PMC-RB5 PMC-RB6
ADDB 36 Binary addition � �
SUB 20 BCD subtraction � �
SUBB 37 Binary subtraction � �
MUL 21 BCD multiplication � �
MULB 38 Binary multiplication � �
DIV 22 BCD division � �
DIVB 39 Binary division � �
NUME 23 Definition of constant � �
NUMEB 40 Definition of binary constant � �
DISP 49 Message display (Note) � �
DISPB 41 Extended message display � �
EXIN 42 External data input � �
AXCTL 53 PMC axis control � �
WINDR 51 Window data read � �
WINDW 52 Window data write � �
FNC9X 9X Arbitrary functional instruction � �
MMC3R 88 MMC3 window data read � �
MMC3W 89 MMC3 window data write � �
MMCWR 98 MMC2 window data read � �
MMCWW 99 MMC2 window data write � �
DIFU 57 Rising edge detection � �
DIFD 58 Falling edge detection � �
EOR 59 Exclusive OR � �
AND 60 Logical product � �
OR 61 Logical add � �
NOT 62 Logical negation � �
END 64 End of subprograms � �
CALL 65 Conditional subprogram call � �
CALLU 66 Unconditional subprogram call � �
SP 71 Subprogram � �
SPE 72 End of a subprogram � �
� : Cannot be used � : Can be used � : Can be used (with some restrictions)
NOTE With PMC–RB5/RB6 of the Series 16i/18i MODEL A, the DISP instruction can be used only to ensure compatibility with the Series 16 MODEL A/B. With the Series 16i/18i MODEL A, FANUC recommends the use of the DISPB instruction that provides extended functions such as high–speed display and kanji character display. With the Series 16i/18i MODEL A, if both the DISP instruction and DISPB instruction are used in the same sequence program, the kanji display function of the DISPB instruction cannot be used.
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Table 5 (a) Types and Processing of Functional Instructions (7) Part 1
SUB Model
Name SUBnumber Processing Series 21 � MODEL �number PMC-RA1 PMC-RA�
END1 1 First level program end � �
END2 2 Second level program end � �
END3 48 Third level program end � �
TMR 3 Timer processing � �
TMRB 24 Fixed timer processing � �
TMRC 54 Timer processing � �
DEC 4 Decoding � �
DECB 25 Binary decoding � �
CTR 5 Counter processing � �
CTRC 55 Counter processing � �
ROT 6 Rotation control � �
ROTB 26 Binary rotation control � �
COD 7 Code conversion � �
CODB 27 Binary code conversion � �
MOVE 8 ANDed data transfer � �
MOVOR 28 ORed data transfer � �
MOVB 43 Transfer of one byte � �
MOVW 44 Transfer of two bytes � �
MOVN 45 Transfer of arbitrary bytes � �
COM 9 Common line control � �
COME 29 Common line control end � �
JMP 10 Jump � �
JMPE 30 Jump end � �
JMPB 68 Label jump 1 � �
JMPC 73 Label jump 2 � �
LBL 69 Label specification � �
PARI 11 Parity check � �
DCNV 14 Data conversion � �
DCNVB 31 Binary data conversion � �
COMP 15 Comparison � �
COMPB 32 Binary comparison � �
COIN 16 Coincidence check � �
SFT 33 Shift register � �
DSCH 17 Data search � �
DSCHB 34 Binary data search � �
XMOV 18 Indexed data transfer � �
XMOVB 35 Binary indexed data transfer � �
ADD 19 BCD addition � �
� : Cannot be used � : Can be used
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Table 5 (a) Types and Processing of Functional Instructions (7) Part 2
SUB Model
Name SUBnumber Processing Series 21 � MODEL �number PMC-RA1 PMC-RA�
ADDB 36 Binary addition � �
SUB 20 BCD subtraction � �
SUBB 37 Binary subtraction � �
MUL 21 BCD multiplication � �
MULB 38 Binary multiplication � �
DIV 22 BCD division � �
DIVB 39 Binary division � �
NUME 23 Definition of constant � �
NUMEB 40 Definition of binary constant � �
DISP 49 Message display � �
DISPB 41 Extended message display � �
EXIN 42 External data input � �
AXCTL 53 PMC axis control � �
WINDR 51 Window data read � �
WINDW 52 Window data write � �
FNC9X 9X Arbitrary functional instruction � �
MMC3R 88 MMC3 window data read � �
MMC3W 89 MMC3 window data write � �
MMCWR 98 MMC2 window data read � �
MMCWW 99 MMC2 window data write � �
DIFU 57 Rising edge detection � �
DIFD 58 Falling edge detection � �
EOR 59 Exclusive OR � �
AND 60 Logical product � �
OR 61 Logical add � �
NOT 62 Logical negation � �
END 64 End of subprograms � �
CALL 65 Conditional subprogram call � �
CALLU 66 Unconditional subprogram call � �
SP 71 Subprogram � �
SPE 72 End of a subprogram � �
� : Cannot be used � : Can be usedww w.
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The execution time constant is a ratio of the execution time of a functional instruction to the execution time of 10 basic instruction steps (1.5 µs). Execution time constants are used when a ladder program is executed in the separate mode.
��� � 5 (b) Execution Time Constants of Functional Instructions (1)
Instruc- ��� Processing Model
tion Number Processing PMC-RB PMC-RC
END1 1 End of a first-level ladder program 171 1033
END2 2 End of a second-level ladder program 26 45
END3 48 End of a third-level ladder program � 0
TMR 3 Timer processing 19 33
TMRB 24 Fixed timer processing 19 34
TMRC 54 Timer processing 17 29
DEC 4 Decoding 21 28
DECB 25 Binary decoding 16 23
CTR 5 Counter processing 21 35
CTRC 55 Counter processing 18 26
ROT 6 Rotation control 37 53
ROTB 26 Binary rotation control 27 39
COD 7 Code conversion 20 29
CODB 27 Binary code conversion 19 29
MOVE 8 Data transfer after Logical AND 19 27
MOVOR 28 Data transfer after logical OR 13 19
COM 9 Common line control 11 14
COME 29 End of common line control 0.1 0.1
JMP 10 Jump 12 16
JMPE 30 End of a jump 9 11
PARI 11 Parity check 13 19
DCNV 14 Data conversion 25 37
DCNVB 31 Binary data conversion 132 233
COMP 15 Comparison 22 36
COMPB 32 Binary comparison 20 31
COIN 16 Coincidence check 21 36
SFT 33 Shift register 15 22
DSCH 17 Data search 237 287
DSCHB 34 Binary data search 351 596
XMOV 18 Indexed data transfer 26 38
XMOVB 35 Binary indexed data transfer 27 37
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��� � 5 (b) Execution Time Constants of Functional Instructions (2)
Instruc- ��� Processing Model
tion Number Processing PMC-RB PMC-RC
ADD 19 Addition 22 33
ADDB 36 Binary addition 25 39
SUB 20 Subtraction 21 32
SUBB 37 Binary subtraction 25 39
MUL 21 Multiplication 42 63
MULB 38 Binary multiplication 28 45
DIV 22 Division 44 66
DIVB 39 Binary division 33 53
NUME 23 Constant definition 18 25
NUMEB 40 Binary constant definition 13 20
DISP 49 Message display 51 93
DISPB 41 Extended message display 177 297
EXIN 42 External data input 29 49
WINDR 51 NC window data read 101 293
WINDW 52 NC window data write 101 293
FNC9X 9X Arbitrary functional instruction (X=0 to 7) � 21
MMC3R 88 MMC3 window data read 342 375
MMC3W 89 MMC3 window data write 385 421
MMCWR 98 MMC window data read 100 293
MMCWW 99 MMC window data write 100 293
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This constant represents how many times the execution time of a functional instruction corresponds to the execution time of 10 basic instructions (about 1.5µs) . The execution time of a basic instruction is about 0.15 µs.
The general format and restrictions common to each functional instruction are given below, details on each instructions will follow later. Refer to this paragraph without fail, since it covers the provisions on using a functional instruction and other important items.
(1) Format Since the functional instructions cannot be represented with relay symbols, the format shown in Fig. 5 (a) must be used. The format includes control conditions, an instruction, parameters, W1, R9000 to R9005 (Functional instruction operation result register).
7 6 5 4 3 2 1 0
A
W1
B
R 10.1
L0 L1 C D
R 2.4 R 3.1 RST
R 5.7 ACT
R 7.1
I n s t r u c t i o n
Para- meter
(1)
(2)
(3)
(4)
(3)
(2)
(1)
(0)
(E1)
Control conditions Parameter (Note)
R9000
R9001
R9002
R9003
R9004
R9005
����5 (a) Function instruction format
Execution time constant:
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Table 5 (c) Coding of function instruction
Coding sheet Status of operating result
Step Number Instruction
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD R1 . 0 A A
2 AND R1 . 1 B A�B
3 RD. STK R2 . 4 C A�B C
4 AND. NOT R3 . 1 D A�B C�D
5 RD. STK R5 . 7 RST A�B C�D RST
6 RD. STK R7 . 1 ACT A�B C�D RST ACT
7 SUB �� Instruction A�B C�D RST ACT
8 (PRM) (Note 2) ���� Parameter 1 A�B C�D RST ACT
9 (PRM) ���� Parameter 2 A�B C�D RST ACT
10 (PRM) ���� Parameter 3 A�B C�D RST ACT
11 (PRM) ���� Parameter 4 A�B C�D RST ACT
12 WRT R10 . 1 W1 output A�B C�D RST W1
NOTE 1 Numbers in parentheses under control conditions indicate
the position of the stored register. 2 (PRM) of steps 8 to 11 under Instruction means that P must
be input when a parameter is input from the programmer, and PRM is not required to be input when a parameter is input from a paper tape.
(2) Control condition The number and meaning of control conditions vary with each functional instruction. The control conditions are entered in the stick register as shown in Table 5 (b). The sequence is fixed and cannot be changed or omitted.
NOTE For the functional instructions, with a RST as a control condition, the RST has the highest priority. Accordingly when RST=1, the RST processing is done even when ACT=0.
(3) Instruction The types of instructions are shown in Table 5 (a). The Programmer has exclusive keys for functional instructions TMR and DEC. They are input by T and D keys, respectively. The other functional instructions are given by “S” key and a following number. When instructions are input by relay symbols, software keys are used to input them. Refer to chapter III or IV for details.
(4) Parameter Unlike basic instructions, functional instructions can handle numeric values. Thus the reference data or addresses containing data are entered under Parameter. The number and meaning vary with each functional instruction. The P key is used to enter parameters in the Programmer.
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(5) W1 The operation results of a functional instruction, when represented with one bit of 1 or 0, is output to W1 whose address can be determined freely by the programmer. Its meaning varies with each functional instruction. Note that some functional instructions have no W1.
(6) Data to be processed Data handled by functional instructions are of binary coded decimal (BCD) code and binary code. In the conventional PMCs, the numeric data is processed mainly based on the BCD code. However, in the PMC-RB/RC, it is recommended to handle all pieces of numeric data with the binary code. The reasons for this are:
(a) In the Series 16, the numeric data (M, S, T, B code) between the CNC and the PMC should be of the binary code.
(b) Numeric data on which the CPU performs processing must be in binary format. When numeric data is always processed in binary format, therefore, neither BCD–to–binary nor binary–to–BCD conversion is necessary, thus enabling faster PMC processing.
(c) When the data is of the binary code, the range of the numeric data processable becomes wide. Also, negative numeric data can be processed easily, and the arithmetic operation functions are strengthened. The binary numeric data is handled, as a rule, on the basis of 1 byte (–128 to+127), 2 bytes (–32768 to +32767), and 4 bytes (–99999999 to +99999999).
(d) When various numeric data items are entered or displayed using the keys on the CRT/MDI panel, all the numeric data items in binary are conveniently specified or displayed in decimal. Therefore, no problem arises, though the data stored in the internal memory is of the binary code. Pay attention to this only when referring to the memory by the sequence program. See (7). In the functional instructions, binary data is mainly handled.
(7) Example of numeric data
(a) BCD code data The basic data handled with the BCD code is of 1 byte (0 to 99) or 2 bytes (0 to 9999). The BCD 4-digit data is entered into two bytes of continuous addresses as shown below. Example: When BCD data 1234 is stored to addresses R250
and R251.
0 0 1 1 0 1
7 6 5 4 3 2
0
1
0
0
3 4
R250
0 0 0 1 0 0
7 6 5 4 3 2
1
1
0
0
1 2
R251
Specify smaller address R250 by a functional instruction. (Note) The low order digits are entered to the smaller address.
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(b) Binary code data The basic data handled with the binary code is of 1 byte (–128 to +127), 2 bytes (–32,768 to +32,767) and 4 bytes (–99,999,999 to +99,999,999). The data is stored at addresses R200, R201, R202 and R203 as shown below.
1 byte data (–128 to +127)
�
7 6 5 4 3 2 1 0
R200 26 25 24 23 22 21 20
27
7 6 5 4 3 2 1 0
R200 26 25 24 23 22 21 20
0 : Positive
1 : Negative
�R201 214 213 212 211 210 29 28
2 byte data (–32,768 to + 32,767)
27
7 6 5 4 3 2 1 0
R200 26 25 24 23 22 21 20
215R201 214 213 212 211 210 29 28
4 byte data (–99999999 to +99999999)
223R202 222 221 220 219 218 217 216
�R203 230 229 228 227 226 225 224
By a functional instruction, specify smaller address R200. A negative value is set by the two’s complement code.
0 0 0 0 0 0
7 6 5 4 3
0 1 (+1)
1 1 1 1 1 1 1 1 (–1)
0 1 1 1 1 1 1 1 (+127)
1 0 0 0 0 0 0 1 (–127)
2 1 0
Example: 1 byte data
(8) Addresses of numerical data handled in the function instructions When numerical data handled in the function instructions are 2 bytes or 4 bytes, addresses of numerical data specified by parameters of function instructions are better to take even numbers. The use of even addresses slightly reduces the execution time of functional instructions. These parameters of the functional instructions mainly handling binary data are marked with an asterisk as follows.
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Error output
RST
W1
ACT
ADDB
(SUB36)
����
Specifying a format
* ����
Address for an
augend
* ����
Address for an
addend
* ����
Address for outputting the sum
* When 2-byte or 4-byte data is handled, assigning even addresses to addresses marked with * reduces the time required to execute functional instructions.
A + B = C
����5 (b)
In even addresses, the number after R is even with internal relays, and the number after D is even in data tables.
(9) Functional instruction calculation result register (R9000 to R9005) (See Fig. 5 (c)) The result of calculation of the functional instruction is set in the register. This register is used commonly to the functional instructions. Therefore, refer to the information in the register immediately after the functional instruction is executed. Otherwise, the previous information disappears when the next functional instruction is executed. The calculation information in the register cannot be transferred between different levels of the sequence program. For example, it is impossible to read the set information by referring to registers R9000’s by the 2nd level program. When the subtraction instruction (SUBB) is executed by the 1st level program. The calculation information set in the register is guaranteed up to the point just before the functional instruction for setting the next calculation information is executed between the same level of programs. The calculation information set in this register differs according to the functional instruction. It can be read out by the sequence program, but cannot be written.
7 6 5 4 3 2 1 0
R9000
R9001
R9002
R9003
R9004
R9005
����5 (c)
This register is a 6 byte register (R9000 to R9005), and the data of 1 bit unit or 1 byte unit can be referred to. When reading the data of bit 1 of R9000, specify RD R9000.1.
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Must be specifies once in a sequence program, either at the end of the 1st level sequence, or at the beginning of the 2nd level sequence when there is no 1st level sequence.
Fig. 5.1.2 shows the format of END.1 and Table 5.1.2 shows the coding.
END1 (SUB 1)
� ��5.1.2 Format of END.1
��� � 5.1.2 Coding of END.1
Coding sheet
Step Number Instruction
Address Number
Bit Number Remarks
0 0 8 2 SUB 1 End of 1st level
5.1 END1 (1ST LEVEL SEQUENCE PROGRAM END)
5.1.1 Function
5.1.2 Format
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Specify at the end of the 2nd level sequence.
Fig.5.2.2 shows the expression format and Table 5.2.2 shows the coding format.
END2 (SUB 2)
� ��5.2.2 Format of END.2
��� � 5.2.2 Coding of END.2
Coding sheet
Step Number Instruction
Address Number
Bit Number Remarks
1 3 6 2 SUB 2 2nd level sequence program end
5.2 END2 (2ND LEVEL SEQUENCE PROGRAM END)
5.2.1 Function
5.2.2 Format
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Specify this command at the end of the 3rd level sequence program, i.e. it indicates the end of the sequence program. If there is no 3rd level sequence program, specify this command immediately after END.2 command.
Fig.5.3.2 shows description format and Table 5.3.2 shows coding format.
END3 (SUB 48)
� ��5.3.2 END.3 description format
��� � 5.3.2 END.3 coding format
Coding sheet
Step Number Instruction
Address Number
Bit Number Remarks
2 1 2 2 SUB 48 End of 3rd level program
5.3 END3 (END OF 3RD LEVEL SEQUENCE) (PMC-RC/RC3/RC4/ NB/NB2 ONLY)
5.3.1 Function
5.3.2 Format
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This is an on-delay timer.
Fig.5.4.4 (a) shows description format and Table 5.4.4 shows coding format.
ACT=0: Turns off the timer relay (TM��). ACT=1: Initiates the timer.
When the time preset is reached with ACT=1 as shown in Fig.5.4.4 (b), the timer relay turns on. The address of the timer relay is determined by designer.
ACT
TMR �� TM��
Timer relay
���.�
Control condition Instruction
Timer number
���.�
� ��5.4.4 (a) Format of TMR
��� � 5.4.4 Coding of TMR
Step Number Instruction
Address Number
Bit Number Remarks
1 RD ����. � ACT
2 TMR ��
3 WRT ���. � TM��
TM��
ACT
T indicates the time set in this timer command.
T
� ��5.4.4 (b) Operation of the timer
5.4 TMR (TIMER)
5.4.1 Function
5.4.2 Format
5.4.3 Control Condition
5.4.4 Timer Relay (TM ��)
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The timer can be set via the CRT/MDI unit of the CNC (See Chapter II). The setting time is every 48 ms for timer number 1 to 8 and every 8 ms for timer number 9 to 40. A time less than 48 ms is discarded for timer number 1 to 8. The time set by timers 9 to 40 is every 8 ms. Any remainder is discarded. For example, if 38 ms is set, the remainder 6 (38=8�4+6) is discarded, and only 32 ms is actually set.
Model
Type of timer
PA1 PA3 RA1 RA2 RA3 RA5 RB RB2 RB3 RB4
48 ms timer number
1 to 8 1 to 8 1 to 8 1 to 8 1 to 8 1 to 8 1 to 8 1 to 8 1 to 8 1 to 8
8 ms timer number 9 to 40 9 to 40 9 to 40 9 to 40 9 to 40 9 to 40 9 to 40 9 to 40 9 to 40 9 to 150
Model
Type of timer
RB5 RB6 RC RC3 RC4 NB NB2
48 ms timer number
1 to 8 1 to 8 1 to 8 1 to 8 1 to 8 1 to 8 1 to 8
8 ms timer number 9 to 40 9 to 150 9 to 40 9 to 40 9 to 150 9 to 40 9 to 150
Type of timer Setting time Error
48 ms timer 48 ms to 1572.8 s –48 to 0 ms
8 ms timer 8 ms to 262.1 s –8 to 0 ms
Variation in time is caused only by operation time of the Timer Instruction. For example, when a timer instruction is used in the 2nd level sequence part, the variation does not include the delay time (Max. 2nd level sequence one cycle time) until the sequence actuates after the set time is reached.
5.4.5 Setting Timers
5.4.6 Timer Accuracy
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This timer is used as a fixed on-delay timer. The variable timer in section 5.4 sets time of the timer into the nonvolatile memory, and can be reset via the CRT/MDI when necessary. Time present in this fixed timer is written to the ROM together with the sequence program, so the timer time once set cannot be changed unless the whole ROM is exchanged.
The format is expressed as follows (Fig.5.5.2).
ACT TMRB
(SUB24)
���
Timer number
TMB ���
�····· �
Preset time
Timer relay
����5.5.2 Format of TMRB
ACT=0: Turns off timer relay (TMB���).
ACT=1: Start timer.
As shown in Fig.5.5.4, timer relay is set ON after certain time preset in the parameter of this instruction pasts after ACT=1. The designer will decide the address of the internal relay in the timer relay.
TMB
ACT
T indicates the time set in this timer command.
T
����5.5.4 Timer operation
5.5 TMRB (FIXED TIMER)
5.5.1 Function
5.5.2 Format
5.5.3 Control Conditions
5.5.4 Timer Relay (TMB���)
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(a) Timer number Sets timer number (1 to 100) of the fixed timers.
(b) Preset time (8 to 262,136 ms) Processing is done every 8 ms in this fixed timer. The preset time is therefore integral times of 8 ms and the odds are omitted. For example, when set 38 ms, 38=8�4+6, the odd 6 is omitted, and the preset time becomes 32 ms. The range of the preset time is 8 to 262,136 ms.
Time varies –8 to 0 ms from the setting time. The varing time in this timer is caused only the error occurred when the timer instruction performs operation process. Error caused by sequence program processing time (time of 1 cycle of the second level), etc. are not included.
5.5.5 Parameter
5.5.6 Precision of the Timer
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This is the on-delay timer. A timer setting time is set at an arbitrary address. The selection of an address determines whether the timer is a variable timer or fixed timer. No limit is imposed on the number of timers provided areas can be allocated.
Fig.5.6.2 and Table 5.6.2 show the expression format and the coding format, respectively.
ACT TMRC
(SUB54)
�
Timer accuracy
����
Time set time
address
����
Time resister address
TM ��
� ��5.6.2 TMRC expression format
��� � 5.6.2 TMRC coding format
Step Number Instruction
Address Number
Bit Number Remarks
1 RD ����. �
2 SUB 54 TMRC command
3 (PRM) � Timer accuracy
4 (PRM) ��� Timer set time address
5 (PRM) ���� Timer register address
6 WRT ����. � TM��
ACT=0 : Turns off the timer relay (TM��).
ACT=1 : Starts the timer.
Timer precision Setting value Setting time Error
8 ms 0 1 to 262,136 –8 to 0 ms
48 ms 1 1 to 1,572,816 –48 to +0 ms
1 second (Note) 2 1 to 32,767 0 to +1 s
10 s (Note) 3 1 to 327,670 0 to +10 s
1 m (Note) 4 1 to 32,767 0 to +1 m
NOTE This function is usable only with the following models: FS16C/18C PMC–RB5/RB6 FS16i/18i PMC–RB5/RB6 FS21i PMC–RA5
5.6 TMRC (TIMER)
5.6.1 Function
5.6.2 Format
5.6.3 Control Condition
5.6.4 Timer Accuracy
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Sets the first address of the timer set time field. The continuous 2-byte memory space is required for the timer set time field. Field D is normally used as this field.
Timer set time + 0
Time : Timer set time (1 to 32,767)
Timer set time + 1
TIME
The timer set time is converted into the binary value in 8 ms (48 ms) units. The timer set time is shown as follows:
8 ms 8 to 262,136 ms 48 ms 48 to 1,572,816 ms 1 s 1 to 32,767s 10 s 1 to 327,670s 1 m 1 to 32,767m
Set the start address of a timer register area. A timer register area must be allocated to a continuous four–byte memory area starting from the set address. Normally, the R area is used as a timer register area. This area should be used by the PMC system, and therefore should not be used by the sequence program.
Timer register + 1 Timer register
Timer register + 2
Timer register + 3
Timer register + 0
As shown in Fig. 5.6.7, after ACT is set to 1, the timer relay is turned on once the time specified in this command has elapsed.
ACT
T indicates the time set in this timer command.
T TM ��
����5.6.7 Timer operation
5.6.5 Timer Set Time Address
5.6.6 Timer Register Address
5.6.7 Timer Relay (TM ��)
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Outputs 1 when the two-digit BCD code signal is equal to a specified number, and 0 when not. Is used mainly to decode M or T function.
Fig.5.7.2 and Table 5.7.2 show the expression format and Table 5.7.2 show the coding format.
ACT
DEC
���. �
Control condition
����
���. �
Address of decode signal
Decode instruction
Decoding result output
W1����
Instruction ��
Number of digits instruction
��
Number of digits instruction
� ��5.7.2 Format of DEC
��� � 5.7.2 Coding of DEC
Step Number Instruction
Address Number
Bit Number Remarks
1 RD ���. � ACT
2 DEC ����
3 (PRM) ����
4 WRT ���. � W1, Decoding result output
ACT=0 : Turns the decoding result output off (W1). ACT=1 : Performs decoding.
When the specified number is equal to the code signal, W1=1; when not, W1=0.
Specify the address containing two-digit BCD code signals.
5.7 DEC (DECODE)
5.7.1 Function
5.7.2 Format
5.7.3 Control Condition
5.7.4 Code Signal Addressww
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There are two paths, the number and the number of digits. Decode specification
� � � �
Number specification
Number of digits specification
(i) Number: Specify the decode number. Must always be decoded in two digits.
(ii) Number of digits: 01 : The high-order digit of two decimal digits is set to 0 and
only the low-order digit is decoded. 10 : The low-order digit is set to 0 and only the high-order digit
is decoded. 11 : Two decimal digits are decoded.
W1 is 1 when the status of the code signal at a specified address is equal to a specified number, 0 when not. The address of W1 is determined by designer.
MF
DEC
F7.0
F10 M30 X
3011
DEN
F1.3 R228.1
M30
� ��5.7.6 Ladder diagram using the DEC instruction
��� � 5.7.6 Coding for Fig.5.7.6 Coding sheet
Step Number Instruction
Address Number
Bit Number Remarks
1 RD F 7.0
2 AND F 1 .3
3 DEC F 10
4 (PRM) 3011
5 WRT R228 . 1 M30X
5.7.5 Decode Specification
5.7.6 W1 (Decoding Result Output)
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DECB decodes one, two, or four-byte binary code data. When one of the specified eight consecutive numbers matches the code data, a logical high value (value 1) is set in the output data bit which corresponds to the specified number. When these numbers do not match, a logical low value (value 0) is set. Use this instruction for decoding data of the M or T function.
Fig.5.8.2 (b) show the expression format.
DECB
(SUB 25)
7
Decode designating number
Code data
����
���� 6 5 4 3 2 1 0
+0
+1
+7
Decode result output
Decode designating numbers
Eight numbers, each of which is added by 0, 1, 2, . . . , and 7 to the specified number
are decoded.
When number 62 is specified, for example, eight numbers of 62 to 69 are decoded.
If code data is 62, 0 bit of output data is turned on; if 69, 7th bit is turned on.
1, 2 or 4-byte binary code data Decode designating
number
Decode designating number
����5.8.2 (a) Function of DECB
ACT DECB
(SUB 25)
���� ����
Decode designa-
tion
�
Format specifi-c
ation
* ����
Code data
address
����
Decode result output
address
����5.8.2 (b) Expression format of DECB
5.8 DECB (BINARY DECODING)
5.8.1 Function (Fig.5.8.2 (a))
5.8.2 Format
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(a) Command (ACT) ACT=0: Resets (all the eight) output data bits. ACT=1: Decodes data.
Result of processing is set in the output data address.
(a) Format specification Specifies code data format:
1 : Code data is in binary format, occupying 1 byte 2 : Code data is in binary format, occupying 2 bytes 4 : Code data is in binary format, occupying 4 bytes
(b) Code data address Specifies an address which stores code data.
(c) Number specification decode designation Specifies the first of the eight successive numbers to be decoded.
(d) Decode result address Specifies an address where the decoded result shall be output. A one-byte area is required in the memory for the output.
5.8.3 Control Conditions
5.8.4 Parameters
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CTR is used as a counter. Counters are used for various purposes for NC Machine tools. Numerical data such as preset values and count values can be used with either BCD format or binary format by a system parameter.
NOTE When a incollect BCD data was set to a BCD type counter, the morement of CTR cannot be sured.
This counter has the following functions to meet various applications.
(a) Preset counter Outputs a signal when the preset count is reached. The number can be preset from the CRT/MDI panel, or set in the sequence program.
(b) Ring counter Upon reaching the preset count, returns to the initial value by issuing another count signal.
(c) Up/down counter The count can be either up or down.
(d) Selection of initial value Selects the initial value as either 0 or 1. A combination of the preceding functions results in the ring counter below.
8 1 2
3
45
6
7
Presetting : 8
Initial value : 1
Such a counter permits the position of a rotor to be memorized.
5.9 CTR (COUNTER)
5.9.1 Function
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Fig.5.9.2 show the expression format and Table 5.9.2 show the coding format.
CN0
W1
���. �
UPDOWN
CTR (SUB 5)
RST
���. � ACT
���. �
���. �
����
���. �
Count up output
Control condition
Counter number
Instruction (SUB 5)
����5.9.2 Format of CRT instruction
Table 5.9.2 Coding for Fig.5.9.2
Coding sheet Memory status of control condition
Step Number Instruction
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � CN0 CN0
2 RD. STK ��� . � UPDOWN CN0 UPDOWN
3 RD. STK ��� . � RST CN0 UPDOWN RST
4 RD. STK ��� . � ACT CN0 UPDOWN RST ACT
5 SUB 5 CTR instruction CN0 UPDOWN RST ACT
6 (PRM) �� Counter number CN0 UPDOWN RST ACT
7 WRT ��� . � W1 output number CN0 UPDOWN RST W1
(a) Specify the initial value. (CN0) CN0=0:Begins the value of the counter with 0.
0, 1, 2, 3 ····· n. CN0=1:Begins the value of the counter with 1 (0 is not used).
1, 2, 3 ····· n.
(b) Specify up or down counter. UPDOWN=0:
Up counter. The counter begins with 0 when CN0=0; 1 when 1.
UPDOWN=1: Down counter. The counter begins with the preset value.
5.9.2 Format
5.9.3 Control Conditionsww
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(c) Reset (RST) RST=0: Releases reset. RST=1: Enables reset. W1 becomes 0. The integrated value is reset to the initial value.
NOTE Set RST to 1, only when reset is required.
(d) Count signal (ACT)
“ 0 ”
“ 1 ”
Count Count
ACT 0 : Counter does not operate. W1 does not change.
1 : Count is made by catching the rise of ACT.
Counters of 2 bytes (2 bytes for each of the preset values and cumulative values) are available. The usable numbers are listed below.
Model PA1 PA3 RA1 RA2 RA3 RA5 RB RB2 RB3 RB4
Counter number 1 to 20 1 to 20 1 to 20 1 to 20 1 to 20 1 to 20 1 to 20 1 to 20 1 to 20 1 to 50
Model RB5 RB6 RC RC3 RC4 NB NB2
Counter number 1 to 20 1 to 50 1 to 20 1 to 20 1 to 50 1 to 20 1 to 50
When the count is up to a preset value, W1=1. The address of W1 can be determined arbitrarily. When the counter reaches the set value, W1 is set to 1. When the counter reaches 0 or 1, W1 is set to 1.
5.9.4 Counter Number
5.9.5 Countup Output (W1)
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[Example 1] As a preset counter (See Fig.5.9.6 (a)) The number of workpieces to be machined is counted. When the number reaches the preset count, a signal is output.
� L1 is a circuit to make logic 1.
� Since the count ranges from 0 to 9999, contact B of L1 is used for making CN0=0.
� Since it is to be up counter, contract B of L1 is used make UPDOWN=0.
� The reset signal of the counter uses input signal CRST.M from the machine tool.
� The count signal is M30X, which was decoded from the CNC output M code. M30X contains contact B of CUP to prevent counting past the preset value, as long as reset is not enabled after countup.
L1
R200.1 L1
CTR (SUB 5)
CRST.M
X36.0 CUP
R200.1
Y6.1
0001
Count up output
L1
R200.1
CUP
Y6.1
L1
R200.1
L1
R200.1
(UPDOWN)
(CN0)
(RST)
(ACT)
M30X
R200.3
(3)
(2)
(1)
(0)
(1)
����5.9.6 (a) Ladder diagram for the counter, example 1
5.9.6 Examples of Using the Counter
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[Example 2] Use of the counter to store the position of a rotor. (See Fig.5.9.6 (b))
L1
R200.1 REV
CTR
(SUB 5)
POS
X36.0
R200.1 0002
“ 1 ”
R200.1
R200.0
L1
R200.1
L1
R200.1
(UPDOWN)
(CN0)
(RST)
(ACT)
(3)
(2)
(1)
(0)
L1
R200.1
����5.9.6 (b) Ladder diagram for the counter, example 2
4
1
2
3 5
6
7
8
9 1011
12
Fixed position for indexing
����5.9.6 (c) Indexing for a rotor
Fig.5.9.6 (b) shows a ladder diagram for a counter to store the position of a rotor of Fig.5.9.6 (c).
(1) Control conditions
(a) Count start number When a 12-angle rotor shown in Fig.5.9.6 (c) is used, the count starting number is 1. Contact A of L1 is used for making CN0=1.
(b) Specify up and down The signal REV changes according to the then direction of rotation. It becomes 0 for forward rotation and 1 for reverse rotation. Thus, the counter is an up counter for forward rotation and a down counter for reverse rotation.
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(c) Reset In this example, since W1 is not used, RST=0, and contact B of L1 is used.
(d) Count signal The count signal POS turns on and off 12 times each time the rotor rotates once.
(2) Counter number and W1 In this example, the second counter is used. The result of W1 is not used, but its address must be determined.
(3) Operation
(a) Setting the preset value Since the rotor to be controlled is 12-angle as shown in Fig.5.9.6 (c), 12 must be preset in the counter. It is set from the CRT/MDI panel.
(b) Setting the current value When the power is turned on, the position of the rotor must be equated with the count on the counter. The count is set via the CRT/MDI panel. Once a current value is set, then correct current positions will be loaded to the counter every time.
(c) The POS signal turns on and off each time the rotor rotates. The number of times of the POS signal turns on and off is counted by the counter, as below.
1, 2, 3, . . . 11, 12, 1, 2, . . . for forward rotation
1, 12, 11, . . . 3, 2, 1, 12 . . . for reverse rotation
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The numeral data of this counter are all binary. This counter has the following functions and can be used according to the application:
(a) Preset counter Preset the count value and if the count reaches this preset value, outputs to show that.
(b) Ring counter This is the ring counter which is reset to the initial value when the count signal is input after the count reaches the preset value.
(c) Up/down counter This is the reversible counter to be used as both the up counter and down counter.
(d) Selection of the initial value Either 0 or 1 can be selected as the initial value.
Fig.5.10.2 and Table 5.10.2 show the expression format and the coding format, respectively.
CN0
W1
UPDOWN
CTRC
SUB 55
RST
ACT
����
Counter preset value
address
����
Counter register address
� ��5.10.2 CTRC expression format
��� � 5.10.2 CRTC coding format
Step Number Instruction
Address Number
Bit Number Remarks
1 RD ����. � CN0
2 RD.STK ����. � UPDOWN
3 RD.STK ����. � RST
4 RD.STK ����. � ACT
5 SUB 55 CRTC command
6 (PRM) ���� Counter preset address
7 (PRM) ���� Counter register address
8 WRT ����. � W1
5.10 CTRC (COUNTER)
5.10.1 Functions
5.10.2 Format
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(a) Specifying the initial value (CN0) CN0=0 : The count value starts with “0”. 0, 1, 2, 3, . . . n CN0=1 : The count value starts with “1”. 1, 2, 3, . . . n
(b) Specifying up or down count (UPDOWN) UPDOWN=0:
Up counter. The initial value is “0” when CN0=0 or “1” when CN0=1.
UPDOWN=1: Down counter. The initial value is the preset value.
(c) Reset (RST) RST=0 : Reset cancelled. RST=1 : Reset. W1 is reset to “0”. The accumulated value is
reset to the initial value.
(d) Count signal (ACT) ACT=0 : The counter does not operate. W1 does not change. ACT=1 : The counter operates at the rise of this signal.
The first address of the counter preset value field is set. The continuous 2-byte memory space from the first address is required for this field. Field D is normally used.
Counter preset value+0 CTR: Preset value
(0 to 32,767) Counter preset value+1
CTR
The counter preset value is binary. Therefore, it ranges from 0 to 32767.
The first address of the counter register field is set. The continuous 4-byte memory space from the first address is required for this field. Field D is normally used.
NOTE When field R is specified as the counter register address, the counter starts with count value “0” after powered on.
5.10.3 Control Conditions
5.10.4 Counter Preset Value Address
5.10.5 Counter Register Address
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If the count value reaches the preset value, W1 is set to “1”. The W1 address can be determined freely.
CTR
WORK
Counter register +0
Counter register +1
Counter register +2
Counter register +3
Count value
WORK : Unusable
5.10.6 Count-up Output (W1)
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Controls rotors, such as the tool post, ATC, rotary table, etc., and is used for the following functions.
(a) Selection of the rotation direction via the shorter path
(b) Calculation of the number of steps between the current position and the goal position
(c) Calculation of the position one position before the goal or of the number of steps up to one position before the goal
Fig.5.11.2 shows the expression format and Table 5.11.2 shows the coding format.
DIR
W1����. �
POS
ROT (SUB 6)
INC
����. �
ACT
����. �
����. �
(1)
����
����. �
Rotating direction output
Control condition Instruction
RN0
����. �
BYT
����. �
(5)
(4)
(3)
(2)
(1)
(0)
(2)
����
(3)
����
(4)
����
Calculating result output address
Goal position address
Current position address
Rotor indexing address
����5.11.2 ROT instruction format
5.11 ROT (ROTATION CONTROL)
5.11.1 Function
5.11.2 Format
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Table 5.11.2 Coding for Fig.5.11.2
Coding sheet Status of operating result
Step Number
Instruc- tion
Address No. Bit No. Remarks ST5 ST4 ST3 ST2 ST1 ST0
1 RD ���� . � RN0 RN0
2 RD. STK ���� . � BYT RN0 BYT
3 RD. STK ���� . � DIR RN0 BYT DIR
4 RD. STK ���� . � POS RN0 BYT DIR POS
5 RD. STK ���� . � INC RN0 BYT DIR POS INC
6 RD. STK ���� . � ACT RN0 BYT DIR POS INC ACT
7 SUB 6 ROT RN0 BYT DIR POS INC ACT
8 (PRM) ���� Rotor indexing number RN0 BYT DIR POS INC ACT
9 (PRM) ���� Current position RN0 BYT DIR POS INC ACT
10 (PRM) ���� Goal position address RN0 BYT DIR POS INC ACT
11 (PRM) ���� Calculating result output address RN0 BYT DIR POS INC ACT
12 WRT ��� . � RN0 BYT DIR POS INC W1
13
14
15
(a) Specify the starting number of the rotor. RN0=0 : Begins the number of the position of the rotor with 0. RN0=1 : Begins the number of the position of the rotor with 1.
(b) Specify the number of digits of the process data (position data). BYT=0: BCD two digits BYT=1: BCD four digits
(c) Select the rotation direction via the shorter path or not. DIR=0 : No direction is selected. The direction of rotation is
only forward. DIR=1 : Selected. See (8) for details on the rotation direction.
(d) Specify the operating conditions. POS=0 : Calculates the goal position. POS=1 : Calculates the position one position before the goal
position.
(e) Specify the position or the number of steps. INC=0 : Calculates the number of the position. If the position
one position before the goal position is to be calculated, specify INC=0 and POS=1
INC=1 : Calculates the number of steps. If the difference between the current position and the goal position is to be calculated, specify INC=1 and POS=0.
(f) Execution command ACT=0: The ROT instruction is not executed. W1 does not
change. ACT=1: Executed. Normally, set ACT=0. If the operation
results are required, set ACT=1.
5.11.3 Control Conditions
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Specify the rotor indexing number.
Specify the address storing the current position.
Specify the address storing the goal position (or command value), for example the address storing the CNC output T code.
Calculate the number of steps for the rotor to rotate, the number of steps up to the position one position before, or the position before the goal. When the calculating result is to be used, always check that ACT=1.
The direction of rotation for control of rotation via the shorter path is output to W1. When W1=0, the direction is forward (FOR) when 1, reverse (REV). The definition of FOR and REV is shown in Fig.5.11.8. If the number given to the rotor is ascending, the rotation is FOR; if descending, REV. The address of W1 can be determined arbitrarily. When, however, the result of W1 is to be used, always check that ACT=1.
1
10
11
12 2
3
4
5
6 7
8
9
(a) An example of a 12-position rotor
Indexing fixed position
FOR REV
1
4
3
2 12
11
10
9
8 7
6
5
(b)
Indexing fixed position
FORREV
����5.11.8 Rotation direction
5.11.4 Rotor Indexing Number
5.11.5 Current Position Address
5.11.6 Goal Position Address
5.11.7 Operation Result Output Address
5.11.8 Rotating Direction Output (W1)
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This instruction is used to control rotating elements including the tool post, ATC (Automatic Tool Changer), rotary table, etc. In the ROT command (5.11) a parameter indicating the number of rotating element indexing positions is a fixed data in programming. For ROTB, however, you can specify an address for the number of rotating element index positions, allowing change even after programming. The data handled are all in the binary format. Otherwise, ROTB is coded in the same way as ROT.
Fig.5.12.2 shows the expression format of ROTB
DIR
W1
POS ROTB
(SUB 26)
INC
ACT
�
Format specifi-c
ation
RN0
*
����
Rotating element indexed position address
*
����
Current position address
*
����
Target position address
*
����
Arith-me tic result output address
����5.12.2 Expression format of ROTB
The control conditions do not differ basically from those for ROT command described in section 5.11. However, BYT has been eliminated from ROTB (it forms part of the ROTB parameters). For the reset, see ROT.
5.12 ROTB (BINARY ROTATION CONTROL)
5.12.1 Function
5.12.2 Format
5.12.3 Control Conditionsww
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(a) Format ��������" ��#� ����#� ��� �� �! � �&#�"�� �"� #�� ��!"# ����# �� #�� ��!���#�! #� "�����& #�� �$���! �� �&#�"�
� � �&#� � � �&#�" � � �&#�"
��� �$��!���� ��#� ��$���! �� ����%�� ��"�#���" ��! #�� !�#�#��� ������#"� �$!!��# ���!�""� �#��� �!� �� #�� ����!& ��!��#� ���!���!�� #��& !� $�!� #�� ����!& "���� "�������� �& ��#� ����#��
(b) ��#�#��� ������# ����%�� ��"�#��� ���!�"" ��������" #�� ���!�"" ���#������ #�� �$���! �� !�#�!& ������# ��"�#���" #� �� ����%���
(c) #��! ��!���#�!" ��! #�� �$��#���" ��� $"� �� #�� �#��! ��!���#�!"� "�� ���#��� ����
See Section 5.11.
Fig. 5.12 (b) illustrates a ladder diagram for a 12-position rotor to be controlled for rotation via the shorter path and for deceleration at the position one position before the goal. � The goal position is specified with CNC 32B of binary code (address
F26 to F29).
� The current position is entered with the binary code signal (address
X41) from the machine tool.
� The result of calculating the position one position before the goal is
output to address R230 (work area).
� Operation starts with the output TF (address F7.3) from the CNC.
� The coincidence check instruction (COIN) is used to detect the
deceleration and stop positions.
5.12.4 Parameters
5.12.5 Output for Rotational Direction (W1)
5.12.6 Example of Using the ROTB Instruction
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Converts BCD codes into an arbitrary two- or four-digits BCD numbers. For code conversion shown in Fig.5.13.1 the conversion input data address, conversion table, and convert data output address must be provided. Set a table address, in which the data to be retrieved from the conversion table is contained, to conversion table input data address in a two-digits BCD number. The conversion table is entered in sequence with the numbers to be retrieved in the two- or four-digits number. The contents of the conversion table of the number entered in the conversion input data address is output to the convert data output address. As shown in Fig.5.13.1, when 3 is entered in the conversion input data address, the contents 137 located at 3 in the conversion table is output to the convert data output address.
Conversion input data address
����
3
Specifies table internal number (BCD two-digits).
ÅÅÅÅÅÅÅ ÅÅÅÅÅÅÅ
ÅÅÅÅÅÅÅ ÅÅÅÅÅÅÅ
1373
2
1
0
Conversion table
4
n
Table internal address
Convert data output address
����
Data of the specified table internal address is output to this address.
����5.13.1 Code conversion diagram
5.13 COD (CODE CONVERSION)
5.13.1 Function
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Fig.5.13.2 shows the format for the COD instruction and Table 5.13.2 shows the coding format.
W1
BYT
COD
(SUB 7)
RST
����. �
ACT
����. �
����. �
����
Error output
Control condition
���� ����
Converted data output address Conversion input data address
Size of table data
Instruction
Table address Convert data
1
2
3
4
� � � �
� � � �
� � � �
� � � �
Conversion data table
����5.13.2 COD instruction
Table 5.13.2 Coding for Fig.5.13.2
Coding sheet Memory status of control condition
Step Number
Instruc- tion
Addres s No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � BYT BYT
2 RD. STK ��� . � RST BYT RST
3 RD. STK ��� . � ACT BYT RST ACT
4 SUB 7 COD instruction
5 (PRM) ���� Size of table data (1)
6 (PRM) ���� Conversion input data address (2)
7 (PRM) ���� Convert data output address (3)
8 (PRM) ���� Convert data at table address 0 (4)
9 (PRM) ���� Convert data at table address 1 (5)
10 : : :
11 WRT ��� . � Error output W1
5.13.2 Format
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(a) Specify the data size. BYT=0 : Specifies that the conversion table data is to be BCD
two digits. BYT=1 : Specifies that the conversion table data is to be BCD
four digits.
(b) Error output reset RST=0 : Disable reset RST=1 : Sets error output W1 to 0 (resets).
(c) Execution command ACT=0 : The COD instruction is not executed. W1 does not
change. ACT=1 : Executed.
A conversion table data address from 0 to 99 can be specified. Specify n+1 as the size of table when n is the last table internal number.
The conversion table address includes a table address in which converted data is loaded. Data in the conversion table can be retrieved by specifying a conversion table address. One byte (BCD 2-digit) is required for this conversion input data address.
The convert data output address is the address where the data stored in the table is to be output. The convert data BCD two digits in size, requires only a 1-byte memory at the convert data output address. Convert data BCD four digits in size, requires a 2-byte memory at the convert data output address.
If an error occurs in the conversion input address during execution of the COD instruction, W1=1 to indicate an error. For example, W1=1 results if a number exceeding the table size specified in the sequence program is specified as the conversion input address. When W1=1, it is desirable to effect an appropriate interlock, such as having the error lamp on the machine tool operator’s panel light or stopping axis feed.
The size of the conversion data table is from 00 to 99. The conversion data can be either BCD two digits or four digits, which is specified depends on the control conditions
5.13.3 Control Conditions
5.13.4 Size of Table Data
5.13.5 Conversion Input Data Address
5.13.6 Convert Data Output Address
5.13.7 Error Output (W1)
5.13.8 Conversion Data Table
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This instruction converts data in binary format to an optional binary format 1-byte, 2-byte, or 4-byte data. Conversion input data address, conversion table, and conversion data output address are necessary for data conversion; as shown in Fig.5.14.1. Compared to the 5.13 ”COD Function Instruction”, this CODB function instruction handles numerical data 1-, 2- and 4-byte length binary format data, and the conversion table can be extended to maximum 256.
Conversion data address
����
2
Specify table address here.(binary format1 byte)
ÅÅÅÅÅÅÅ ÅÅÅÅÅÅÅ
3
2
1
0
Conversion table
n
Table address
Conversion data output address
���� Data stored in the specified table address is output to this address
1250
ÅÅÅÅÅÅÅ ÅÅÅÅÅÅÅ ÅÅÅÅÅÅÅ
n : max. 255
(Note 1) This table data is binary format 2-byte data.
(Note 2) Conversion table is written in the ROM together together with the program, because it is defined in the sequence program.
����5.14.1 Code conversion diagram
Fig.5.14.2 shows the expression format of CODB.
W1
CODB
(SUB 27)
RST
ACT
�
Format designa-
tion
Error output ���
Number of conver-s ion table data
����
Conversi on input data address
*
����
Conversi on data output address
����5.14.2 Expression format of CODB
5.14 CODB (BINARY CODE CONVERSION)
5.14.1 Function
5.14.2 Format
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(a) Reset (RST) RST=0 : Do not reset. RST=1 : Reset error output W1 (W1=0).
(b) Activate command (ACT) ACT=0: Do not execute CODB instruction ACT=1: Execute CODB instruction.
(a) Format designation Designates binary numerical size in the conversion table.
1 : Numerical data is binary 1-byte data. 2 : Numerical data is binary 2-byte data. 4 : Numerical data is binary 4-byte data.
(b) Number of conversion table data Designates size of conversion table. 256 (0 to 255) data can be made.
(c) Conversion input data address Data in the conversion data table can be taken out by specifying the table number. The address specifying the table number is called conversion input data address, and 1-byte memory is required from the specified address.
(d) Conversion data output address Address to output data stored in the specified table number is called conversion data output address. Memory of the byte length specified in the format designation is necessary from the specified address.
Size of the conversion data table is maximum 256 (from 0 to 255). This conversion data table is programmed between the parameter conversion data output address of this instruction and the error output (W1).
If there are any abnormality when executing the CODB instruction, W1=1 and error will be output.
5.14.3 Control Conditions
5.14.4 Parameters
5.14.5 Conversion Data Table
5.14.6 Error Output (W1)
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ANDs logical multiplication data and input data, and outputs the results to a specified address. Can also be used to remove unnecessary bits from an eight-bit signal in a specific address, etc. (Logical multiplication data) (Input data) to a specified address The input data is one byte (eight bits).
0 0 0 0 0 0
7 6 5 4 3 2
0
1
0
0
Input data
Low-order four-bit logical multiplication data
� � � � � �� �
High-order four-bit logical multiplication data
Logical multi-plication data
Fig.5.15.2 shows the expression format and Table 5.15.2 shows the coding format.
MOVE
(SUB 8)
ACT
����. �
(1)
����
Control condition
(2)
����
(3)
����
(4)
����
Output address
Input data address
Low-order 4-bit logical multiplication data
High-order 4-bit logical multiplication data
����5.15.2 Move instruction format
Table 5.15.2 Coding for Fig.5.15.2
Coding sheet
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � ACT ACT
2 SUB 8 MOVE instruction
3 (PRM) ���� High-order 4-bit logical multiplication data (1)
4 (PRM) ���� Low-order 4-bit logical multiplication data (2)
5 (PRM) ���� Input data address (3)
6 (PRM) ���� Output data address (4)
5.15 MOVE (LOGICAL PRODUCT TRANSFER)
5.15.1 Function
5.15.2 Format
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ACT=0: Move instruction not executed. ACT=1: Executed.
If a code signal and another signal co-exist at address X35 for an input signal from the machine tool, to compare the code signal and a code signal at another address, the rest of signals in address X35 becomes an obstacle. Thus, the MOVE instruction can be used to output only the code signal at address X35 address R210.
MOVE
(SUB 8)
A
R228.1
(1)
0001
(2)
1111
(3)
X035
(4)
R210
7 6 5 4 3 2 1 0
Address X35
Code signal
Another signa
0 0 0 1 1 1 1 1Logical multiplication data
Low-order four-bit logical multiplication data
High-order four-bit logical multiplication data
0 0 0Address R210
Code signal
����5.15.4 MOVE instruction ladder diagram
5.15.3 Execution Command
5.15.4 Example of Using the MOVE Instruction
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This instruction ORs the input data and the logical sum data and transfers the result to the destination.
OR
Input data Logical sum data
Output data
Fig.5.16.2 shows the expression format of MOVOR.
MOVOR
(SUB 28)
ACT ����
Input data address
����
Logical sum data address
����
Output address
����5.16.2 Expression format of MOVOR
(a) Command (ACT) ACT=0: Do not execute MOVOR. ACT=1: Execute MOVOR.
(a) Input data address Specifies the address for the input data.
(b) Logical sum data address Specifies the address of the logical sum data with which to OR the transferred data.
(c) Output address This is the address to contain the logical sum obtained. It is also possible to obtain the logical sum (OR) of the input and the logical sum data and output the result in the logical sum data address. For this, you must set the logical sum data address for the output address.
5.16 MOVOR (DATA TRANSFER AFTER LOGICAL SUM)
5.16.1 Function
5.16.2 Format
5.16.3 Control Conditions
5.16.4 Parametersww
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� : Can be used � : Cannot be used
PA1 PA3 RA1 RA2 RA3 RA5 RB RB2 RB3 RB4 RB5 RB6 RC RC3 RC4 NB NB2
� � � � � � � � � � � � � � � � �
The specified number of coils or the coils in a region up to the common line control end instruction (COME) are turned off. (See Fig.<IP_ADDRESS>) Relay number specification is set when a numeric other than zero is specified in a parameter for the number of turned off coils. Specification of the region up to the common line control end instruction is set when zero is specified for the number of turned off coils. When the common line control end instruction is programmed in the relay number specification, error is indicated when programming is completed.
COM
SUB 9
ACT ����
Number of turned-off coils
Effective only when the number of turned-off coils is set to zero.
0 : Region specification Other than 0 : Numeric specification
COME
SUB 29
0 to 9999
����<IP_ADDRESS> Function of COM
5.17 COM (COMMON LINE CONTROL)
5.17.1 COM (Common Line Control)
<IP_ADDRESS> Function
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Fig.<IP_ADDRESS> (a) shows the expression format of COM
COM
SUB 9
����
Number of turned-off
coils
����<IP_ADDRESS> (a) Expression format of COM
W1
COMACT 2
(a) When COM ACT=1, execution begins with the step after COM.
(b) When COM ACT=0, coil W1 and coil W2 are turned OFF unconditionally, and execution begins with the next step after W2.
W2
A B
D
C
11.0 11.1
B F G
W3
(a)
ACT=1
(b)
ACT=0
����<IP_ADDRESS> (b) Ladder diagram for the COM instruction
ACT=0 : The specified number of coils or the coils within the region specified are unconditionally turned off (set to 0).
ACT=1 : No processing is performed. Processing is performed from the step next to the COM instruction.
<IP_ADDRESS> Format
5.17.2 Control Conditionsww
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(a) Number of turned-off coils Specify 0 to 9999. 0 : Region specification Other than 0: Coil number specification
W1
W2
A B
D
C
E F G
W3
ACT
ACT
����5.17.3 (a) Relay circuit example
NOTE 1 A functional instruction in a range specified by COM executes processing,
regardless of COM ACT. However, if COM ACT=0, the coil of the execution result becomes 0. 2 Another COM instruction cannot be specified in the range specified by the COM instruction. 3 If COM ACT=0, the coil written in by a WRT. NOT instruction in a range specified by COM
becomes 1 unconditionally. 4 The number of coils cannot be specified in PMC-RA1, PMC-RA2, or PMC-RB2. Assume the
number of coils to be 0 and specify the region with the common line control end (COME) command.
W1
COM
ACT
3
Regardless of the ACT condition of the COM instruction, if ACT1=1, the input data of MOVE function is transferred to the output address
W2
B
D
C
E
W3
MOVE
High-orde r 4-bit logical multiplicat ion data
Low-order 4-bit logical multiplicat ion data
Input data address
Output address
ACT2 COIN
Reference data (address)
Comparis on data (address)
ACT1
When ACT=0 in the COM instruction, W2=0 unconditionally.
A
����5.17.3 (b)
5.17.3 Parameter
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� : Can be used � : Cannot be used
PA1 PA3 RA1 RA2 RA3 RA5 RB RB2 RB3 RB4 RB5 RB6 RC RC3 RC4 NB NB2
� � � � � � � � � � � � � � � � �
The COM instruction controls the coils in a range up to a common line control end instruction (COME). (See Fig.5.17.5) Specify 0 as the number of coils, and specify a range to be controlled using the common line end instruction. When the common line end instruction is not specified, the message COM FUNCTION MISSING is displayed.
Valid range of the COM instruction
COM
SUB 9
0
COME
SUB 29
ACT
�
�
����5.17.5 Function of COM
Fig.5.17.6 shows the expression format of the functional instruction COM.
COM
SUB 9
0
ACT
����5.17.6 Expression Format of COM
5.17.4 COM (Common Line Control)
5.17.5 Function
5.17.6 Format
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ACT = 0 : The coils in the specified range are unconditionally turned off (set to 0).
ACT = 1 : The same operation as when COM is not used is performed.
(a) Specify 0. (Range specification only)
NOTE 1 COM instruction operation
Suppose the following Ladder diagram including a COM instruction exists:
Then, for the coil ”OUTx,” this Ladder diagram has the same effect as the following Ladder diagram:
So, the functional instructions in the range specified with a COM instruction are processed, regardless of the setting of ACT of the COM instruction. Note, however, that the coil for the execution of a functional instruction is unconditionally set to 0 when COM ACT = 0.
2 In the range specified with a COM instruction, no additional COM instruction can be specified.
3 As explained in the figures in Note 1, the coil for WRT.NOT in the range specified with a COM instruction is unconditionally set to 1 when COM ACT = 0.
 FUNCTIONAL INSTRUCTIONSPMC SEQUENCE PROGRAM
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This instruction indicates the division in the region specification of the common line control instruction (COM). This instruction cannot be used alone. It must he used together with the COM instruction.
Fig.5.18.2 shows the expression format of COME
COME
SUB 29
����5.18.2 Expression format of COME
5.18 COME (COMMON LINE CONTROL END)
5.18.1 Function
5.18.2 Format
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� : Can be used � : Cannot be used
PA1 PA3 RA1 RA2 RA3 RA5 RB RB2 RB3 RB4 RB5 RB6 RC RC3 RC4 NB NB2
� � � � � � � � � � � � � � � � �
This instruction jumps the specified number of coils or the logic instructions (including the functional instructions) contained within the region up to the jump end instruction (JMPE). Coil number specification is set when a numeral other than zero is specified in the parameter for the number of coils. Specification of the region up to the jump end instruction is set when zero is set for the number of coils. Nesting of jump instructions is not allowed.
JMP
SUB 10
ACT ����
Number of jumped
coils
0 to 9999
Effective only when the number of jumped coils is set to zero.
0 : Region specification Other tha 0 : Coil number specification
JMPE
SUB 30
����5.19.2
ACT JMP
SUB 10
����
Number of jumped
coils
5.19 JMP (JUMP)
5.19.1 JMP (Jump)
5.19.2 Function
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ACT=0 : Nojump.Processing begins with the step after the JMP instruction. ACT=1 : The logic instructions contained within the specified number of
coils or the specified region are jumped. Processing is performed from the next step.
(a) Number of jumped coils Specify 0 to 9999. 0 : Region specification jump Other than 0 : Coil number specification jump When the jump end instruction is programmed in the coil number specification, error is indicated when programming is completed.
��� � 5.19.5 JMP instruction coding Step
Number Instruc-
tion Address Number
Bit Number Remarks
1 RD ���. � ACT
2 SUB 10 JMP instruction
3 (PRM) ���� Number of coils to be jumped
NOTE The number of coils can be specified only for the PMC–RB/RC. Assume the number of coils to be 0 and specify the region with the jump end (JMPE) command.
Fig.5.19.6 shows a ladder diagram for the JMP instruction. When ACT=0, the next step to the JMP instruction is executed. When ACT=1, logical operations are skipped according to the specified number of coils. Note that, when ACT=1, even if signal A changes from 1 to 0 or vice versa as shown in Fig.5.19.6, W1 remains in a status before ACT=1. Similarly, W2 remains unchanged, even if signals B, C, and D change. Using the JMP instruction does not reduce the execution time of the sequence.
W1
JMP
(SUB 10)
ACT
2
W2
A
C
B
10.1
E F W3
ACT=0
ACT=1
20.1
D
� ��5.19.6 Ladder diagram for the JMP instruction
5.19.4 Control Conditions
5.19.5 Parameter
5.19.6 Operation
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� : Can be used � : Cannot be used
PA1 PA3 RA1 RA2 RA3 RA5 RB RB2 RB3 RB4 RB5 RB6 RC RC3 RC4 NB NB2
� � � � � � � � � � � � � � � � �
The JMP instruction causes a departure from the normal sequence to executing instructions. When a JMP instruction is specified, processing jumps to a jump and instruction (JMPE) without executing the logical instructions (including functional instructions) in the range delimited by a jump end instruction (JMPE). (See Fig.<IP_ADDRESS>) Specify 0 as the number of coils, and specify a range to be skipped using the jump end instruction. When the jump end instruction is not specified, the message JUMP FUNCTION MISSING is displayed.
Valid range of the JMP instruction
JMP
SUB 10
0
JMPE
SUB 30
ACT
�
�
����<IP_ADDRESS> Function of JMP
Fig.<IP_ADDRESS> shows the expression format of the functional instruction JMP.
JMP
SUB 10
0
ACT
����<IP_ADDRESS> Expression Format of JMP
5.19.7 JMP (Jump)
<IP_ADDRESS> Function
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ACT=1 : The logical instructions (including functional instructions) in the specified range are skipped; program execution proceeds to the next step.
ACT=0 : The same operation as when JMP is not used is performed.
(a) Specify 0. (Range specification only)
NOTE JMP instruction operation
When ACT = 1, processing jumps to a jump end instruction (JMPE); the logical instructions (including functional instructions) in the specified jump range are not executed. When the Ladder program is executed in the nonseparate mode, this instruction can reduce the Ladder execution period (scan time).
<IP_ADDRESS> Control Conditions
<IP_ADDRESS> Parameters
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This instruction indicates the division in the region specification of the jump instruction (JMP). It cannot be used alone. It must be used together with the JMP instruction.
JMPE
SUB 30
5.20 JMPE (JUMP END)
5.20.1 Function
5.20.2 Format
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Checks the parity of code signals, and outputs an error if an abnormality is detected. Secifies either an even- or odd-parity check. Only one-byte (eight bits) of data can be checked.
Fig.5.21.2 shows the expression format and Table 5.21.2 shows the coding format.
PARI
(SUB 11)
O.E
����
(2)
����. �
RST (1)
����. �
ACT (0)
����. �
Control condition Instruction
Check data address
W1
Error output
����. �
����5.21.2 PARI instruction format
Table 5.21.2 PARI instruction coding
Coding sheet Memory status of control condition Step
Number Instruction Address
No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ���. � ACT O.E
2 RD. STK ���. � ACT O.E RST
3 RD. STK ���. � ACT O.E RST ACT
4 SUB 11 PARI instruction
5 (PRM) ���� Check data address
6 ����. � Error output W1
5.21 PARI (PARITY CHECK)
5.21.1 Function
5.21.2 Format
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(a) Specify even or odd. O.E=0 : Even-parity check O.E=1 : Odd-parity check
(b) Reset RST=0 : Disables reset. RST=1 : Sets error output W1 to 0. That is, when a parity error
occurs, setting RST to 1 results in resetting.
(c) Execution command ACT=0 : Parity checks are not performed. W1 does not alter. ACT=1 : Executes the PARI instruction, performing a parity check.
If the results of executing the PARI instruction is abnormal, W1=1 and an error is posted. The W1 address can be determined arbitrarily.
Fig.5.21.5 shows odd-parity checking of a code signal entered at address X036.
0
7 6 5 4 3 2 1 0
Address X036
6-bit code signal
Odd-parity bit
PARI
(SUB 11)
A
X036
(2)
R228.0
ERST.M (1)
X32.7
TF (0)
F7.3
ERR
R228.0
R228.0
A
A
A
R228.0
����5.21.5 Ladder diagram for the PARI instruction
NOTE For bits 0 to 7, bits other than those for the parity check must be 0.
5.21.3 Control Conditions
5.21.4 Error Output (W1)
5.21.5 Example of Using the PARI Instruction
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Converts binary-code into BCD-code and vice versa.
Fig.5.22.2 shows the expression format and Table 5.22.2 shows the coding format.
DCNV
(SUB 14) CNV
(1)
���� (2)
���. �
RST (1)
���. �
ACT (0)
���. �
Instruction Input data address
W1
Error output
(1)
����
���. �
Conversion result output address
BYT (3)
���. �
Control condition
����5.22.2 DCNV instruction format
Table 5.22.2 DCNV instruction coding
Coding sheet Memory status of control condition
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD � ��� . � BYT BYT
2 RD. STK ��� . � CNV BYT CNV
3 RD. STK ��� . � RST BYT CNV RST
4 RD. STK ��� . � ACT BYT CNV RST ACT
5 SUB 14 DCNV instruction
6 (PRM) ���� (1) Input data address
7 (PRM) ���� (2) Conversion result output address
8 WRT ��� . � W1 error output W1
5.22 DCNV (DATA CONVERSION)
5.22.1 Function
5.22.2 Format
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(a) Specify data size. BYT=0 : Process data in length of one byte (8 bits) BYT=1 : Process data in length of two byte (16 bits)
(b) Specify the type of conversion CNV=0 : Converts binary-code into BCD-code. CNV=1 : Converts BCD-code into binary-code.
(c) Reset RST=0 : Disables reset. RST=1 : Resets error output W1. That is, setting RST to 1 when
W1, makes W1=0.
(d) Execution command ACT=0 : Data is not converted. W1 does not alter. ACT=1 : Data is converted.
W1=0 : Normal W1=1 : Conversion error
W1=1 if the input data which should be BCD data, is binary data, or if the data size (byte length) specified in advance is exceeded when converting binary data into BCD data.
5.22.3 Control Conditions
5.22.4 Error Output (W1)
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This instruction converts 1, 2, and 4-byte binary code into BCD code or vice versa. To execute this instruction, you must preserve the necessary number of bytes in the memory for the conversion result output data.
Fig.5.23.2 shows the expression format of DCNVB
DCNVB
(SUB 31)
CNV
�
Format specifi-ca
tion
RST
ACT
W1
*
����
Input data address
SIN
*
����
Conver-si on result output
address
����5.23.2 Expression format of DCNVB
(a) Sign of the data to be converted (SIN) This parameter is significant only when you are converting BCD data into binary coded data. It gives the sign of the BCD data. Note that though it is insignificant when you are converting binary
into BCD data, you cannot omit it. SIN=0 : Data (BCD code) to be input is positive. SIN=1 : Data (BCD code) to be input is negative.
(b) Type of conversion (CNV) CNV=0 : Convert binary data into BCD data CNV=1 : Convert BCD data into binary data.
(c) Reset (RST) RST=0 : Release reset RST=1 : Reset error output W1. In other words, set W1=0.
(d) Execution command (ACT) ACT=0 : Data is not converted. The value of W1 remains unchanged. ACT=1 : Data is converted.
5.23 DCNVB (EXTENDED DATA CONVERSION)
5.23.1 Function
5.23.2 Format
5.23.3 Control Conditions
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(a) Format specification Specify data length (1,2, or 4 bytes). Use the first digit of the parameter to specify byte length.
1 : one byte 2 : two bytes 4 : four bytes
(b) Input data address Specify the address containing the input data address.
(c) Address for the conversion result output Specify the address to output the data converted to BCD or binary format.
W1=0 : Correct conversion W1=1 : Abnormally (The data to be converted is specified as BCD data but is found to be binary data, or the specified number of bytes cannot contain (and hence an overflow occurs) the BCD data into which a binary data is converted.)
This register is set with data on operation. If register bit 1 is on, they signify the following. For the positive/negative signs when binary data is converted into BCD data, see R9000.
R9000
7 6 5 4 3 2 1 0
Overflow (data exceeds the number of bytes specified)
Negative
5.23.4 Parameters
5.23.5 Error Output (W1)
5.23.6 Operation Output Register (R9000)
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Compares input and comparison values.
Fig.5.24.2 shows the expression format and Table 5.24.2 shows the coding format.
COMP
(SUB 15)
BYT �
���.�
ACT
���.�
W1
����.�
���� ����
Instruction
Input data format (constant or address)
Input value Comparison value
Comparison result output
Control condition
����5.24.2 COMP instruction format
Table 5.24.2 COMP instruction coding
Coding sheet Memory status of control condition
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � BYT BYT
2 RD. STK ��� . � ACT BYT ACT
3 SUB 15 COMP instruction
4 (PRM) � Input data format
5 (PRM) ���� Input data
6 (PRM) ���� Comparison data address
7 WRT ��� . � W1: Comparison result output W1
5.24 COMP (COMPARISON)
5.24.1 Function
5.24.2 Format
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(a) Specify the data size. BYT=0 : Process data (input value and comparison value) is BCD
two digits long. BYT=1 : Process data (input value and comparison value) is four
digits long.
(b) Execution command ACT=0 : The COMP instruction is not executed. W1 does not alter. ACT=1 : The COMP instruction is executed and the result is output
to W1.
0 : Specifies input data with a constant. 1 : Specifies input data with an address
Not specify input data directly, but specify an address storing input data.
The input data can be specified as either a constant or the address storing it. The selection is made by a parameter of format specification.
Specifies the address storing the comparison data.
W1=0 :Reference data > Comparison data W1=1 :Reference data� Comparison data
5.24.3 Control Conditions
5.24.4 Input Data Format
5.24.5 Input Data
5.24.6 Comparison Data Address
5.24.7 Comparison Result Output
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This instruction compares 1, 2, and 4-byte binary data with one another. Results of comparison are set in the operation output register (R9000). Sufficient number of bytes are necessary in the memory to hold the input data and comparison data.
Fig.5.25.2 shows the expression format of COMPB.
COMPB
SUB 32
����
Format specifi- cation
*
����
Input data (address)
*
����
Address of data to be compared
ACT
����5.25.2 Expression format of COMPB
(a) Command (ACT) ACT=0 : Do not execute COMPB. ACT=1 : Execute COMPB.
(a) Format specification Specify data length (1,2, or 4 bytes) and format for the input data (’constants data’ or ’address data’).
Specification of data length
0
Specification of format
1 : 1 byte length data 2 : 2 byte length data 4 : 4 byte length data
0
0 : Constants 1 : Address
(b) Input data (address) Format for the input data is determined by the specification in a).
(c) Address of data to be compared Indicates the address in which the comparison data is stored.
5.25 COMPB (COMPARISON BETWEEN BINARY DATA)
5.25.1 Function
5.25.2 Format
5.25.3 Control Conditions
5.25.4 Parameters
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The data involved in the operation are set in this register. This register is set with data on operation. If register bit 1 is on, they indicate the following:
7 6 5 4 3 2 1 0
R9000
Zero (input data=data compared)
Negative (input data<data compared)
Overflow
5.25.5 Operation Output Register (R9000)
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Checks whether the input value and comparison value coincide. This instruction is available with BCD data.
Fig.5.26.2 shows the expression format and Table 5.26.2 shows the coding format.
COIN
(SUB 16)
BYT (1)
� ���.�
ACT
���.�
W1
����.�
(2)
����
(3)
����
Instruction
Input value format (constant or address)
Input value Comparison value address
Result (1)
(0)
Control conditions
Output
����5.26.2 COIN instruction format
Table 5.26.2 COIN instruction coding
Coding sheet Memory status of control condition
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � BYT BYT
2 RD. STK ��� . � ACT BYT ACT
3 SUB 16 COIN instruction
4 (PRM) � Reference value format
5 (PRM) ���� Reference value
6 (PRM) ���� Comparison value address
7 WRT ��� . � W1: Checking result output W1
5.26 COIN (COINCIDENCE CHECK)
5.26.1 Function
5.26.2 Format
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(a) Specify the data size. BYT=0 : Process data (input value, and comparison values).
Each BCD is two digits long. BYT=1 : Each BCD four digits long.
(b) Execution command ACT=0 : The COIN instruction is not executed. W1 does not change. ACT=1 : The COIN instruction is executed and the results is output
to W1.
0 : Specifies input data as a constant. 1 : Specifies input data as an address.
The input data can be specified as either a constant or an address storing it. The selection is made by a parameter of format designation.
Specifies the address storing the comparison data.
W1=0 : Input data � Comparison data W1=1 : Input data = Comparison data
5.26.3 Control Conditions
5.26.4 Input Data Format.
5.26.5 Input Data
5.26.6 Comparison Data Address
5.26.7 Comparison Result Output
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This instruction shifts 2-byte (16-bit) data by a bit to the left or right. Note that W1=1 when data ”1” is shifted from the left extremity (bit 15) in left shift or from the right extremity (bit 0) in right shift.
SFT
(SUB 33)
CONT
*
����
Address of shift data
RST
ACT
W1
DIR
(a) Shift direction specification (DIR) DIR=0 : Left shift DIR=1 : Right shift
(b) Condition specification (CONT) CONT=0: On ”1” bit shifts by one bit in the specified direction. The condition of an adjacent bit (eighter right or left adjacent bit according to the specification of shift direction DIR) is set to the original bit position of the on ”1” bit. Also, ”0” is set to bit 0 after shifting in the left direction or set to hit 15 after shifting in the right direction. In case of leftward shift;
7 6 5 4 3 2 1 015 14 13 12 11 10 9 8
Left shift
Bit shifts leftward every bit
Shift out at bit 15 Zero is set to bit 0.
CONT=1: Shift is the same as above, but 1s are set to shifted bits.
5.27 SFT (SHIFT REGISTER)
5.27.1 Function
5.27.2 Format
5.27.3 Control Conditions
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9 815 14 13 12 11 10 7 6 5 4 3 2 1 0
Left shift 0 0 0 0 0 0 1
Each bit shifts leftward. Status 1 remains unchanged
1 001 1 0 01 1
(c) Reset (RST) The shifted out data (W1=1) is reset (W1=0).
RST=0 : W1 is not reset. RST=1 : W1 is reset (W1=0).
(d) Actuation signal (ACT) Shift processing is done when ACT=1. For shifting one bit only, execute an instruction when ACT=1, and then, set ACT to 0 (ACT=0).
(a) Shift data addresses Sets shift data addresses. These designated addresses require a continuous 2-byte memory for shift data. Bit numbers are represented by bit 0 to 15 as shown below. When addresses are designated for programming, an address number is attached every 8 bits, and the designable bit numbers are 0 to 7.
15 9 814 13 12 11 10
7 6 5 4 3 2 1 0
Designated address
Designated address +1
W1=0 : ”1” was not shifted out because of the shift operation. W1=1 : ”1” was shifted out because of the shift operation.
5.27.4 Parameters
5.27.5 W1
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DSCH is only valid for data tables (see section 6.3) which can be used by the PMC. DSCH searches the data table for a specified data, outputs an address storing it counting from the beginning of the data table. If the data cannot be found, an output is made accordingly.
Search data
Data table
100
0
1
2
n
Table internal number
100
2
Search data result output
����5.28.1
NOTE Parameter of this functional instruction and the data table heading address specified here are table internal number 0. The table internal number specified here, however, is different from that mentioned in 6.3.
Fig.5.28.2 shows the expression format and Table 5.28.2 shows the coding format.
DSCH
(SUB 17)
BYT
(1)
����
����.� ACT
����.�
W1
����.�
(2)
����
(3)
����
Control condition
Instruction
Number of data of the data table (Table capacity)
Data table heading address
Search data address
Search data presence/absence output address
BYT
����.�
(2)
(1)
(0)
Search result output address
(4)
����
����5.28.2 DSCH instruction format
5.28 DSCH (DATA SEARCH)
5.28.1 Function
5.28.2 Format
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Table 5.28.2 DSCH instruction coding
Coding sheet Memory status of control condition
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � BYT BYT
2 RD. STK ��� . � RST BYT RST
3 RD. STK ��� . � ACT BYT RST ACT
4 SUB 17 DSCH instruction
5 (PRM) ���� Number of data of the data table
6 (PRM) ���� Data table heading address
7 (PRM) ���� Search data address
8 (PRM) ���� Search result output address
9 WRT ��� . � Search data presence/absence output adress W1
(a) Specify data size. BYT=0 : Data stored in the data table, BCD two digits long. BYT=1 : Data stored in the data table, BCD four digits long.
(b) Reset RST=0 : Release reset RST=1 : Enables a reset, that is, sets W1 to 0.
(c) Execution command ACT=0 : The DSCH instruction is not executed. W1 does not change. ACT=1 : The DSCH is executed, and the table internal number
storing the desired data is output., If the data cannot be found, W1=1.
Specifies the size of the data table. If the beginning of the data table is 0 and the end is n, n+1 is set as the number of data of the data table.
Addresses that can be used in a data table are fixed. When preparing a data table, the addresses to be used must be determined beforehand, specify the head address of a data table here.
Indicates the address of the data to be searched.
If the data being searched for is found, the internal number of the table storing the data is output to this field. This address field is called a search result output address field. The search result output address field requires memory whose size is the number of bytes conforming to the size of the data specified by BYT.
5.28.3 Control Conditions
5.28.4 Number Of Data of the Data Table
5.28.5 Data Table Head Address
5.28.6 Search Data Address
5.28.7 Search Result Output Address
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W1=0 : The data to be searched exists. W1=1 : The data to be searched does not exist.
5.28.8 Search Data Presence/Absence Output
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Alike the DSCH instruction of Section 5.28, this function instruction instructs data search in the data table. There are two differences; the numerical data handled in this instruction are all in binary format; and number of data (table capacity) in the data table can be specified by specifying the address, thus allowing change in table capacity even after writing the sequence program in the ROM.
1
0
3
n
Table number Data table
Search data
Search result output
100100
2
2
����5.29.1
DSCHB
(SUB 34) �
Format designa-
tion
ACT
W1
* ����
Storage address of number of
data in data table
* ����
Data table head
address
RST *
����
Search data
address
Search result* ����
Output address of
search result
����5.29.2
5.29 DSCHB (BINARY DATA SEARCH)
5.29.1 Function
5.29.2 Format
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(a) Reset (RST) RST=0 : Release reset RST=1 : Reset. W1=”0”.
(b) Activation command ACT=0 : Do not execute DSCHB instruction. W1 does not change. ACT=1 : Execute DSCHB instruction. If the search data is found,
table number where the data is stored will be output. If the search data is not found, W1 becomes 1.
(a) Format designation Specifies data length. Specify byte length in the first digit of the parameter.
1 : 1-byte long data 2 : 2-byte long data 4 : 4-byte long data
(b) Storage address of number of data in data table Specifies address in which number of data in the data table is set. This address requires memory of number of byte according to the format designation. Number of data in the table is n+1 (headnumber in the table is 0 and the last number is n).
(c) Data table head address Sets head address of data table.
(d) Search data address Address in which search data is set.
(e) Search result output address After searching, if search data is found, the table number where the data is stored will be output. The searched table number is output in this search result output address. This address requires memory of number of byte according to the format designation.
W1=0 :Search data found. W1=1 :Search data not found.
5.29.3 Control Conditions
5.29.4 Parameter
5.29.5 Search Result (W1)
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Reads or rewrites the contents of the data table. Like the DSCH instruction, XMOV is only valid for data tables which can be used by the PMC.
NOTE The data table heading address specified here is table internal number 0. The table internal number specified here, however, is different from that mentioned in 6.3.
0
1
3
n
Table internal number Data table
Input or output data
2
2 ÅÅÅÅÅÅÅ ÅÅÅÅÅÅÅÅÅÅÅÅÅ
ÅÅÅÅÅÅ
Table internal storing input or output data
1 Read out data from the data table. 2 Write data in the data table.
1
2
����5.30.1 Reading and writing of data
Fig.5.30.2 shows the expression format and Table 5.30.2 shows the coding format.
XMOV
(SUB 18)RST
(1)
����
����.�
ACT
����.�
W1
����.�
(2)
����
(3)
����
Control condition
Instruction
Number of data of the data table (Table capacity)
Data table heading address
Address storing input/output data
Error output
RW
����.�
(2)
(1)
(0)
Address storing tabel internal number
(4)
����
BYT
����.�
(3)
����5.30.2 XMOV instruction format
5.30 XMOV (INDEXED DATA TRANSFER)
5.30.1 Function
5.30.2 Format
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Table 5.30.2 XMOV instruction coding
Coding sheet Memory status of control conditions
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � BYT BYT
2 RD. STK ��� . � RW BYT RW
3 RD. STK ��� . � RST BYT RW RST
4 RD. STK ��� . � ACT BYT RW RST ACT
5 SUB 18 XMOV instruction
6 (PRM) ���� Number of data of the data table
7 (PRM) ���� Data table heading address
8 (PRM) ���� Address storing input/output data
9 (PRM) ���� Address storing table internal number
10 WRT ��� . � Error output W1
(a) Specify the number of digits of data. BYT=0 : Data stored in the data table, BCD in two digits long. BYT=1 : Data stored in the data table, BCD in four digits long.
(b) Specify read or write RW=0 : Data is read from the data table. RW=1 : Data is write in the data table.
(c) Reset RST=0 : Release reset. RST=1 : Enables reset, that is, sets W1 to 0.
(d) Execution command ACT=0 : The XMOV instruction is not executed. W1 does not change. ACT=1 : The XMOV instruction is executed.
Specifies the size of the data table. If the beginning of the data table is 0 and the end is n, n+1 is set as the number of data of the data table.
Address that can be used in a data table are fixed. When preparing a data table, the addresses to be used must be determined beforehand, and the head address placed in that data table .
The input/output data storage address is the address storing the specified data, and is external to the data table. The contents of the data table is read or rewritten.
5.30.3 Control Conditions
5.30.4 Number of Data Of the Data Table
5.30.5 Data Table Head Address
5.30.6 Address Storing Input/Output Data
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The table internal number storage address is the address storing the table internal number of the data to be read or rewritten. This address requires memory specified by the formaat designation (BYT).
W1=0 :There is no error. W1=1 :There is an error.
An error occurs if a table internal number exceeding the previously programmed number of the data table is specified.
5.30.7 Address Storing the Table Internal Number
5.30.8 Error Output
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Alike the XMOV instruction of Section 5.30, this function instruction instructs reading and rewriting of data in the data. There are two differences; the numerical data handled in this instruction are all in binary format; and number of data (table capacity) in the data table can be specified by specifying the address, thus allowing change in table capacity even after writing the sequence program in the ROM.
0
1
3
n
Table internal number Data table
Input or output data
2
2 ÅÅÅÅÅÅ ÅÅÅÅÅÅÅÅÅÅÅÅ
ÅÅÅÅÅÅ
Table number where input/output data is stored
1 Data read from data table 2 Data write to data table
1
2
����5.31.1 Data read and data write
XMOVB
(SUB 35)
RST
�
Format designa-
tion
ACT
W1
* ����
Storage address
of number of data in data table
* ����
Data table head
address
RW *
����
I/O data storage address
* ����
Table number storage address
5.31 XMOVB (BINARY INDEX MODIFIER DATA TRANSFER)
5.31.1 Function
5.31.2 Format
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(a) Read, write designation (RW) RW=0 : Read data from data table. RW=1 : Write data to data table.
(b) Reset (RST) RST=0 : Reset release. RST=1 : Reset. W=1.
(c) Activation command (ACT) ACT=0: Do not execute MOV instruction.
There is no change in W1. ACT=1: Execute MOV instruction.
(a) Format designation Specifies data length. Specify byte length in the first digit of the parameter.
1 : 1-byte long data 2 : 2-byte long data 4 : 4-byte long data
(b) Storage address of number of data in data table Specifies address in which number of data in the data table is set. This address requires 1 or 2-byte memory according to the format designation. Number of data in the table is n+1 (head number in the table is 0 and the last number is n).
(c) Data table head address Sets head address in the data table.
(d) Input/Output data storage address Reads and rewrites data in the data table. The data read or rewritten is stored in this address.
(e) Table number storage address When reading or rewriting data in the data table, table number of where to read or rewrite must be specified. The specified table number is stored in this table number storage address. This address requires 1 or 2-byte memory according to the format designation.
W1=0 :No error W1=1 :Error found. Error will be output if number of data more than pre-programmed in the data table is specified.
5.31.3 Control Conditions
5.31.4 Parameters
5.31.5 Error Output (W1)ww
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Adds BCD two-or four-digit data.
Fig.5.32.2 shows the expression format and Table 5.32.2 shows the coding format.
ADD
(SUB 19)
RST
(1)
�
����.� ACT
����.�
W1
���.�
(2)
����
(3)
����
Instruction
Format of addend (Constant or address)
Summand address
Addend
Error output
BYT
����.�
(2)
(1)
(0)
Sum output address
(4)
����
A + B = C
Control conditions
����5.32.2 ADD instruction format
Table 5.32.2 DSCH instruction coding Coding sheet Memory status of control conditions
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � BYT BYT
2 RD. STK ��� . � RST BYT RST
3 RD. STK ��� . � ACT BYT RST ACT
4 SUB 19 ADD instruction
5 (PRM) � Addend format
6 (PRM) ���� Summand address
7 (PRM) ���� Addend (address)
8 (PRM) ���� Sum output address
9 WRT ��� . � Error output W1
5.32 ADD (ADDITION)
5.32.1 Function
5.32.2 Format
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(a) Specify the number of digits of data. BYT=0 : Data is BCD two digits long. BYT=1 : Data is BCD four digits long.
(b) Reset RST=0 : Release reset. RST=1 : Resets error output W1, that is, sets W1 to 0.
(c) Execution command ACT=0 : The ADD instruction is not executed. ACT=1 : The ADD instruction is executed.
0 : Specifies addend with a constant. 1 : Specifies addend with an address.
Set the address storing the summand.
Addressing of the addend depends on 4).
Set the address to which the sum is to be output.
If the sum exceeds the data size specified in 3), a), W1=1 is set to indicate an error.
5.32.3 Control Conditions
5.32.4 Data Format of Addend
5.32.5 Summand Address
5.32.6 Addend (Address)
5.32.7 Sum Output Address
5.32.8 Error Output
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This instruction performs binary addition between 1-, 2-, and 4-byte data. In the operation result register (R9000), operating data is set besides the numerical data representing the operation results. The required number of bytes is necessary to store each augend, the added, and the operation output data.
ADDB
(SUB 36)
����
Format specifi- cation
ACT W1
* ����
Augend address
* ����
Addend address or constant
Error output RST
* ����
Result (sum) address
A + B = C
(a) Reset (RST) RST=0 : Release reset RST=1 : Resets error output W1. In other words, makes W1=0.
(b) Command (ACT) ACT=0 : Do not execute ADDB. W1 does not change now. ACT=1 : Execute ADDB.
(a) Format specification Specifies data length (1,2, and 4 bytes) and the format for the addend (constant or address).
Data length specification
0
Format specification
1 : 1 byte length data 2 : 2 bytes length data 4 : 4 bytes length data
0
0 : Constant data 1 : Address data
5.33 ADDB (BINARY ADDITION)
5.33.1 Function
5.33.2 Format
5.33.3 Control Conditions
5.33.4 Parameters
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(b) Augend address Address containing the augend.
(c) Addend data (address) Specification in (a) determines the format of the addend.
(d) Result output address Specifies the address to contain the result of operation.
W1=0 :Operation correct W1=1 :Operation incorrect W1 goes on (W1=1) if the result of addition exceeds the specified data length.
This register is set with data on operation. If register bit is on, they signify the following operation data:
7 6 5 4 3 2 1 0
R9000
Overflow
Zero
Negative
5.33.5 Error Output (W1)
5.33.6 Operation Output Register (R9000)
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Subtracts BCD two-or four-digit data.
Fig.5.34.2 shows the expression format and Table 5.34.2 shows the coding format.
SUB
(SUB 20)
RST
(1)
�
����.�
ACT
����.�
W1
����.�
���� ����
Control condition
Instruction
Minuend data format
Subtrahend (data address)
Subtrahend (address or constant)
Error output
BYT
����.�
(2)
(1)
(0)
Difference output address
����
����5.34.2 SUB Instruction format
Table 5.34.2 SUB instruction format Coding sheet Memory status of control conditions
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � BYT BYT
2 RD. STK ��� . � RST BYT RST
3 RD. STK ��� . � ACT BYT RST ACT
4 SUB 20 SUB instruction
5 (PRM) � Data format of subtrahend
6 (PRM) ���� Minuend address
7 (PRM) ���� Subtrahend (address)
8 (PRM) ���� Difference output address
9 WRT ��� . � Error output W1
5.34 SUB (SUBTRACTION)
5.34.1 Function
5.34.2 Format
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(�) Specification of the number of digits of data. BYT=0 : Data BCD two digits long BYT=1 : Data BCD four digits long
RST=0 : Release reset. RST=1 : Resets error output W1, that is, sets W1 to 0.
ACT=0 : The SUB instruction is not executed. W1 does not change. ACT=1 : The SUB instruction is executed.
0 : Specifies subtrahend with a constant. 1 : Specifies subtrahend with an address.
Set the address storing the minuend.
Addressing of the subtrahend depends on (6).
Sets the address to which the difference is output.
W1 is set 1 to indicate an error if the difference is negative.
5.34.3 Control Conditions
5.34.4 Reset
5.34.5 Execution Command
5.34.6 Data Format of Subtrahend
5.34.7 Minuend Address
5.34.8 Subtrahend (Address)
5.34.9 Difference Output Address
5.34.10 Error Output
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This instruction subtracts one data from another, both data being in the binary format of 1, 2 or 4 bytes. In the operation result register (R9000), operation data is set besides the numerical data representing the operation. A required number of bytes is necessary to store the subtrahend, minuend, and the result (difference).
SUBB
(SUB 37)
����
Format specifi- cation
ACT W1
* ����
Menuend address
* ����
Subtrahend addressor constant
Error output
RST *
����
Differenc e output address
A – B = C
(a) Reset (RST) RST=0 : Release reset RST=1 : Resets error output W1. (Set W1 to 0.)
(b) Command (ACT) ACT=0: Do not execute SUBB. W1 does not change now. ACT=1: Execute SUBB.
(a) Format specification Specifies data length (1, 2, and 4 bytes) and the format for the subtrahend (constant or address).
Data length specification 1 : 1 byte length data 2 : 2 bytes length data 4 : 4 bytes length data
0
Format specification 0 : Constant data 1 : Address data
0
(b) Minuend address Address containing the minuend.
5.35 SUBB (BINARY SUBTRACTION)
5.35.1 Function
5.35.2 Format
5.35.3 Control Conditions
5.35.4 Parameters
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(c) Minuend data (address) Specification in (a) determines the format of the minuend.
(d) Result output address Specifies the address to contain the result of operation.
W1=0 :Operation correct W1=1 :Operation incorrect W1 goes on (W1=1) if the result of subtraction exceeds the specified data length.
This register is set with data on operation. If register bit is on, they signify the following operation data:
7 6 5 4 3 2 1 0
R9000
Zero
Negative
Overflow
5.35.5 Error Output (W1)
5.35.6 Operation Output Register (R9000)
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Multiplies BCD two-or four-digit data. The product must also be BCD two-or four-digit data.
Fig.5.36.2 shows the expression format and Table 5.36.2 shows the coding format.
MUL
(SUB 21)
RST
(1)
�
���.� ACT
���.�
W1
����.�
(2)
����
(3)
����
Control conditions
Instruction
Data format of multiplier (constant or address)
Multiplicand address
Multiplier (address or constant)
Error output
BYT
���.�
(2)
(1)
(0)
Product output address
(4)
����
A × B = C
����5.36.2 MUL instruction format
Table 5.36.2 MUL instruction coding
Coding sheet Memory status of control conditions
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � BYT BYT
2 RD. STK ��� . � RST BYT RST
3 RD. STK ��� . � ACT BYT RST ACT
4 SUB 21 MUL instruction
5 (PRM) � Data format of multiplier
6 (PRM) ���� Multiplicand address
7 (PRM) ���� Multiplier (address)
8 (PRM) ���� Product output address
9 WRT ��� . � Error output W1
5.36 MUL (MULTIPLICATION)
5.36.1 Function
5.36.2 Format
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(a) Specify the number of digits of data. BYT=0 : Data is BCD two digits long. BYT=1 : Data is BCD four digits long.
(b) Reset RST=0 : Releases reset. RST=1 : Resets error output W1, that is, sets W1 to 0.
(c) Execution command ACT=0 : The MUL instruction is not executed. W1 does not change. ACT=1 : The MUL instruction is executed.
0 : Specifies multiplier with a constant. 1 : Specifies multiplier with an address.
Sets the address storing the multiplicand.
Addressing of the multiplier depends on 4).
Set the address to which the product is output.
W1=1 is set to indicate an error if the product exceeds the size specified in 3), a).
5.36.3 Control Conditions
5.36.4 Data Format of Multiplier
5.36.5 Multiplicand Address
5.36.6 Multiplier (Address)
5.36.7 Product Output Address
5.36.8 Error Output
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This instruction multiplies 1-, 2-, and 4-byte binary data items. In the operation result register (R9000), operation data is set besides the numerical data representing the operation. A required number of bytes is necessary to store multiplicand, multiplier, and the result (product).
MULB
(SUB 38)
����
Format specifi- cation
ACT W1
* ����
Multi-plic and
address
* ����
Multiplier address or constant
Error output RST *
����
Product output
address
A × B = C
(a) Reset (RST) RST=0 : Release reset RST=1 : Resets error output W1. In other words, makes W1=0.
(b) Command (ACT) ACT=0: Do not execute MULB. W1 does not change now. ACT=1: Execute MULB.
(a) Format specification Specifies data length (1, 2, and 4 bytes) and the format for the multiplier (constant or address).
Data length specification
0
Format specification
1 : 1 byte length data 2 : 2 bytes length data 4 : 4 bytes length data
0
0 : Constant data 1 : Address data
5.37 MULB (BINARY MULTIPLICATION)
5.37.1 Function
5.37.2 Format
5.37.3 Control Conditions
5.37.4 Parameters
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(b) Multiplicand address Address containing the multiplicand.
(c) Multiplier data (address or constant) Specification in (a) determines the format of the multiplier.
(d) Result output address Specifies the address to contain the result of operation.
W1=0 :Operation correct W1=1 :Operation incorrect W1 goes on (W1=1) if the result of multiplication exceeds the specified data length.
This register is set with data on operation. If register bit is on, they signify the following operation data:
7 6 5 4 3 2 1 0
R9000
Overflow
Zero
Negative
5.37.5 Error Output (W1)
5.37.6 Operation Output Register (R9000)
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Divides BCD two-or four-digit data. Remainders are discarded.
Fig.5.38.2 shows the expression format and Table 5.38.2 shows the coding format.
DIV
(SUB 22)
RST
(1)
�
����.�
ACT
����.�
W1
���.�
(2)
����
(3)
����
Control conditions
Instruction
Data format of divider
Dividend address
Divisor (address or constant)
Error output
BYT
����.�
(2)
(1)
(0)
Quotient output address
(4)
����
����5.38.2 DIV instruction format
Table 5.38.2 DIV instruction coding
Coding sheet Memory status of control conditions
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � BYT BYT
2 RD. STK ��� . � RST BYT RST
3 RD. STK ��� . � ACT BYT RST ACT
4 SUB 22 DIV instruction
5 (PRM) � Data format of divider
6 (PRM) ���� Dividend address
7 (PRM) ���� Divider (address)
8 (PRM) ���� Quatient output address
9 WRT ��� . � Error output W1
5.38 DIV (DIVISION)
5.38.1 Function
5.38.2 Format
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(a) Specify the number of digits of data. BYT=0 : Data is BCD two digits long. BYT=1 : Data is BCD four digits long.
(b) Reset RST=0 : Releases reset. RST=1 : Resets error output W1, that is, sets W1 to 0.
(c) Execution command ACT=0 : The DIV instruction is not executed. W1 does not change. ACT=1 : The DIV instruction is executed.
0 : Specifies divisor data by constant. 1 : Specifies divisor data by address.
Sets the address storing the dividend.
Addressing of the divisor depends on 4).
Sets the address to which the quotient is output.
W1=1 is set to indicate an error if the divider is 0.
5.38.3 Control Conditions
5.38.4 Divisor Data Format Designation
5.38.5 Dividend Address
5.38.6 Divisor (Address)
5.38.7 Quotient Output Address
5.38.8 Error Output
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This instruction divides binary data items 1, 2, and 4 byte in length. In the operation result register (R9000), operation data is set and remainder is set to R9002 and following addresses. A required number of bytes is necessary to store the dividend, divisor, and the result (quotient).
DIVB
SUB 39
����
Format specifi- cation
ACT W1
* ����
Dividend address
* ����
Divisor (address)
or constant
Error data
RST *
����
Quotient address
A / B = C
(a) Reset (RST) RST=0 : Release reset RST=1 : Resets error output W1. In other words, makes W1=0.
(b) Command (ACT) ACT=0: Do not execute DIVB. W1 does not change now. ACT=1: Execute DIVB.
(a) Format specification Specifies data length (1, 2, and 4 bytes) and the format for the divisor (constant or address).
Data length specification
1 : 1 byte length data 2 : 2 bytes length data 4 : 4 bytes length data
0
Format specification
0 : Constant data 1 : Address data
0
5.39 DIVB (BINARY DIVISION)
5.39.1 Function
5.39.2 Format
5.39.3 Control Conditions
5.39.4 Parameters
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(b) Dividend address Address containing the dividend
(c) Divisor data (address) Specification in (a) determines the format of the divisor.
(d) Result output address Specified the address to contain the result of operation.
W1=0 :Operation correct W1=1 :Operation incorrect W1 goes on (W1=1) if the divisor is 0.
This register is set with data on operation. If register bit is on, they signify the following operation data:
0
R9000
Zero
7 6 5 4 3 2 1
Negative
Depending on its length, the remainder is stored in one or more of registers R9002 to R9005.
5.39.5 Error Putput (W1)
5.39.6 Operation Output Register (R9000)
5.39.7 Remainder Output Address
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Defines constants, when required. In this case, constants are defined with this instructions.
Fig.5.40.2 shows the expression format and Table <IP_ADDRESS> shows the coding format.
NUME
(SUB 23)
(1)
����
(2)
���� ACT
���.�
BYT
���.�
(1)
(0)
Control condition Instruction Constant Constant outputaddress
����5.40.2 NUME instruction format
Table 5.40.2 NUME instruction coding
Coding sheet Memory status of control conditions
Step Number
Instruc- tion
Address No. Bit No. Remarks ST3 ST2 ST1 ST0
1 RD ��� . � BYT BYT
2 RD. STK ��� . � ACT BYT ACT
3 SUB 23 NUME instruction
4 (PRM) ���� Constant
5 (PRM) ���� Constant output address
(a) Specify the number of digits of a constant. BYT=0 : Constant is BCD two digits long. BYT=1 : Constant is BCD four digits long.
(b) Execution command ACT=0 : The NUME instruction is not executed. ACT=1 : The NUME instruction is executed.
Sets the constant as the number of digits specified in Item (a) in Subsec. 5.40.3.
Sets the address to which the constant defined in Subsec. 5.40.4 is output.
5.40 NUME (DEFINITION OF CONSTANT)
5.40.1 Function
5.40.2 Format
5.40.3 Control Conditions
5.40.4 Constant
5.40.5 Constant Output Address
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This instruction defines 1, 2, or 4-bytes long binary constant. Data entered in decimal during programming is converted into binary data during program execution. The binary data is stored in the specified memory address(es).
NUMEB
(SUB 40)
�
Format specifi- cation
�����
Constant
ACT
*
����
Constant output
address
(a) Command (ACT) ACT= 0: Do not execute NUMEB. ACT= 1: Execute NUMEB.
(a) Format specification Specifies data length (1, 2, or 4 bytes). Use the first parameter digit to specify byte length:
1 : 1 byte 2 : 2 bytes 4 : 4 bytes
(b) Constant Defined constants in decimal format. The constant must not executed the number of bytes specified (format specification).
(c) Constant output address Specifies the address of the area for output of the binary data. A continuous memory area of the specified number of bytes is required from the specified address.
5.41 NUMEB (DEFINITION OF BINARY CONSTANTS)
5.41.1 Function
5.41.2 Format
5.41.3 Control Conditions
5.41.4 Parameters
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DISP is used to display messages on the CRT screen, CNC of which enters alarm status. Message data to be displayed is specified after the parameters of the functional instruction. One DISP functional instruction can define up to 16 types of message. Display is performed by setting the control condition ACT to 1. In order to display and then clear a message, set the display-request bit corresponding to the message data number to 1 and 0, respectively. Up to one alarm message (message data putting the CNC in alarm status) can be displayed on one screen. When one message is cleared, a message is displayed. Similarly, each time one of the message is displayed. One operator message (message data not putting the CNC in alarm status) can be displayed on a screen. When an operator message is cleared in a state when four operator messages are displayed, the subsequent operator message is displayed.
Fig.5.42.2 shows the instruction format and Table 5.42.2 shows the coding format.
5.42 DISP(MESSAGE DISPLAY) (PMC–RB/RB2/RB3/ RB4/RB5/RB6/RC/ RC3/RC4 ONLY)
5.42.1 Function
5.42.2 Format
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1 � n � 16
Message data
ACT DISP
(SUB 49)
(1)
����
Control condition
Instruction
Total sum of data of message data
W1
Process end(2)
����
���. �
(3)
����
Number of data of one message data
Message control address
Message data 1
1
2
m
1
2
m
1
2
m
Message data 2
Message data n
Message characters
Message number
Message characters
Message number
Message characters
Message number
����5.42.2 DISP instruction format
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Table 5.42.2 DISP instruction coding
Coding sheet Memory status of control conditions
Step Number
Instruc- tion
Address No. Bit No. Remarks ST2 ST1 ST0
RD ��� . � ACT ACT
SUB 49 DISP ACT
(PRM) ���� Total sum of data of message data
(PRM) ���� Number of data of one message item
(PRM) ���� Message control address
(PRM) ���� Message number
(PRM) ���� 2
(PRM) ���� 3
: : : Message characters
: : :
(PRM) ���� m
(PRM) ���� Message number
(PRM) ���� 2
(PRM) ���� 3
: : : Message characters
: : :
(PRM) ���� m
: : :
: : :
(PRM) ���� Message number
(PRM) ���� 2
(PRM) ���� 3
: : : Message characters
: : :
(PRM) ���� m
WRT ���� Process end (W1) W1
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ACT=0: Nothing is processed. W1 does not change. ACT=1: The specified message data is displayed or cleared. ACT must remain 1 until processing end is reported by W1.
(a) Total sum of message data of data: m�n
(b) Number of data of one massage data: m Note)
(c) Message control address: Specifies the address of the RAM of internal relay area (see (7) for details).