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Apollo Register Documentation v2.4.2
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| 0x00000000: | TMR0 - Counter/Timer Register |
| 0x00000004: | CMPRA0 - Counter/Timer A0 Compare Registers |
| 0x00000008: | CMPRB0 - Counter/Timer B0 Compare Registers |
| 0x0000000C: | CTRL0 - Counter/Timer Control |
| 0x00000010: | TMR1 - Counter/Timer Register |
| 0x00000014: | CMPRA1 - Counter/Timer A1 Compare Registers |
| 0x00000018: | CMPRB1 - Counter/Timer B1 Compare Registers |
| 0x0000001C: | CTRL1 - Counter/Timer Control |
| 0x00000020: | TMR2 - Counter/Timer Register |
| 0x00000024: | CMPRA2 - Counter/Timer A2 Compare Registers |
| 0x00000028: | CMPRB2 - Counter/Timer B2 Compare Registers |
| 0x0000002C: | CTRL2 - Counter/Timer Control |
| 0x00000030: | TMR3 - Counter/Timer Register |
| 0x00000034: | CMPRA3 - Counter/Timer A3 Compare Registers |
| 0x00000038: | CMPRB3 - Counter/Timer B3 Compare Registers |
| 0x0000003C: | CTRL3 - Counter/Timer Control |
| 0x00000200: | INTEN - Counter/Timer Interrupts: Enable |
| 0x00000204: | INTSTAT - Counter/Timer Interrupts: Status |
| 0x00000208: | INTCLR - Counter/Timer Interrupts: Clear |
| 0x0000020C: | INTSET - Counter/Timer Interrupts: Set |
| Instance 0 Address: | 0x40008000 |
This register holds the running time or event count, either for each 16 bit half or for the whole 32 bit count when the pair is linked.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CTTMRB0
0x0 |
CTTMRA0
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CTTMRB0 | RO | Counter/Timer B0. |
| 15:0 | CTTMRA0 | RO | Counter/Timer A0. |
| Instance 0 Address: | 0x40008004 |
Compare limits for timer half A.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CMPR1A0
0x0 |
CMPR0A0
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CMPR1A0 | RW | Counter/Timer A0 Compare Register 1. Holds the upper limit for timer half A. |
| 15:0 | CMPR0A0 | RW | Counter/Timer A0 Compare Register 0. Holds the lower limit for timer half A. |
| Instance 0 Address: | 0x40008008 |
Compare limits for timer half B.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CMPR1B0
0x0 |
CMPR0B0
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CMPR1B0 | RW | Counter/Timer B0 Compare Register 1. Holds the upper limit for timer half B. |
| 15:0 | CMPR0B0 | RW | Counter/Timer B0 Compare Register 0. Holds the lower limit for timer half B. |
| Instance 0 Address: | 0x4000800C |
Control bit fields for both halves of timer 0.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CTLINK0
0x0 |
RSVD
0x0 |
TMRB0POL
0x0 |
TMRB0CLR
0x0 |
TMRB0PE
0x0 |
TMRB0IE
0x0 |
TMRB0FN
0x0 |
TMRB0CLK
0x0 |
TMRB0EN
0x0 |
RSVD
0x0 |
TMRA0POL
0x0 |
TMRA0CLR
0x0 |
TMRA0PE
0x0 |
TMRA0IE
0x0 |
TMRA0FN
0x0 |
TMRA0CLK
0x0 |
TMRA0EN
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31 | CTLINK0 | RW | Counter/Timer A0/B0 Link bit. TWO_16BIT_TIMERS = 0x0 - Use A0/B0 timers as two independent 16-bit timers (default). 32BIT_TIMER = 0x1 - Link A0/B0 timers into a single 32-bit timer. |
| 30:29 | RSVD | RO | RESERVED |
| 28 | TMRB0POL | RW | Counter/Timer B0 output polarity. NORMAL = 0x0 - The polarity of the TMRPINB0 pin is the same as the timer output. INVERTED = 0x1 - The polarity of the TMRPINB0 pin is the inverse of the timer output. |
| 27 | TMRB0CLR | RW | Counter/Timer B0 Clear bit. RUN = 0x0 - Allow counter/timer B0 to run CLEAR = 0x1 - Holds counter/timer B0 at 0x0000. |
| 26 | TMRB0PE | RW | Counter/Timer B0 Output Enable bit. DIS = 0x0 - Counter/Timer B holds the TMRPINB signal at the value TMRB0POL. EN = 0x1 - Enable counter/timer B0 to generate a signal on TMRPINB. |
| 25 | TMRB0IE | RW | Counter/Timer B0 Interrupt Enable bit. DIS = 0x0 - Disable counter/timer B0 from generating an interrupt. EN = 0x1 - Enable counter/timer B0 to generate an interrupt. |
| 24:22 | TMRB0FN | RW | Counter/Timer B0 Function Select. SINGLECOUNT = 0x0 - Single count (output toggles and sticks). Count to CMPR0B0, stop. REPEATEDCOUNT = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses). Count to CMPR0B0, restart. PULSE_ONCE = 0x2 - Pulse once (aka one-shot). Count to CMPR0B0, assert, count to CMPR1B, deassert, stop. PULSE_CONT = 0x3 - Pulse continously. Count to CMPR0B0, assert, count to CMPR1B0, deassert, restart. CONTINUOUS = 0x4 - Continuous run (aka Free Run). Count continuously. |
| 21:17 | TMRB0CLK | RW | Counter/Timer B0 Clock Select. TMRPIN = 0x0 - Clock source is TMRPINB. HFRC = 0x1 - Clock source is the HFRC HFRC_DIV8 = 0x2 - Clock source is HFRC / 8 HFRC_DIV128 = 0x3 - Clock source is HFRC / 128 HFRC_DIV512 = 0x4 - Clock source is HFRC / 512 HFRC_DIV2K = 0x5 - Clock source is HFRC / 2048 XT = 0x6 - Clock source is the XT (uncalibrated). XT_DIV2 = 0x7 - Clock source is XT / 2 XT_DIV16 = 0x8 - Clock source is XT / 16 XT_DIV256 = 0x9 - Clock source is XT / 256 LFRC_DIV2 = 0xA - Clock source is LFRC / 2 LFRC_DIV32 = 0xB - Clock source is LFRC / 32 LFRC_DIV1K = 0xC - Clock source is LFRC / 1024 LFRC = 0xD - Clock source is LFRC / 16K RTC_100HZ = 0xE - Clock source is 100 Hz from the current RTC oscillator. HCLK = 0xF - Clock source is HCLK. BUCKB = 0x10 - Clock source is buck converter stream B. |
| 16 | TMRB0EN | RW | Counter/Timer B0 Enable bit. DIS = 0x0 - Counter/Timer B0 Disable. EN = 0x1 - Counter/Timer B0 Enable. |
| 15:13 | RSVD | RO | RESERVED |
| 12 | TMRA0POL | RW | Counter/Timer A0 output polarity. NORMAL = 0x0 - The polarity of the TMRPINA0 pin is the same as the timer output. INVERTED = 0x1 - The polarity of the TMRPINA0 pin is the inverse of the timer output. |
| 11 | TMRA0CLR | RW | Counter/Timer A0 Clear bit. RUN = 0x0 - Allow counter/timer A0 to run CLEAR = 0x1 - Holds counter/timer A0 at 0x0000. |
| 10 | TMRA0PE | RW | Counter/Timer A0 Output Enable bit. DIS = 0x0 - Counter/Timer A holds the TMRPINA signal at the value TMRA0POL. EN = 0x1 - Enable counter/timer B0 to generate a signal on TMRPINB. |
| 9 | TMRA0IE | RW | Counter/Timer A0 Interrupt Enable bit. DIS = 0x0 - Disable counter/timer A0 from generating an interrupt. EN = 0x1 - Enable counter/timer A0 to generate an interrupt. |
| 8:6 | TMRA0FN | RW | Counter/Timer A0 Function Select. SINGLECOUNT = 0x0 - Single count (output toggles and sticks). Count to CMPR0A0, stop. REPEATEDCOUNT = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses). Count to CMPR0A0, restart. PULSE_ONCE = 0x2 - Pulse once (aka one-shot). Count to CMPR0A0, assert, count to CMPR1B, deassert, stop. PULSE_CONT = 0x3 - Pulse continously. Count to CMPR0A0, assert, count to CMPR1A0, deassert, restart. CONTINUOUS = 0x4 - Continuous run (aka Free Run). Count continuously. |
| 5:1 | TMRA0CLK | RW | Counter/Timer A0 Clock Select. TMRPIN = 0x0 - Clock source is TMRPINA. HFRC = 0x1 - Clock source is the HFRC HFRC_DIV8 = 0x2 - Clock source is HFRC / 8 HFRC_DIV128 = 0x3 - Clock source is HFRC / 128 HFRC_DIV512 = 0x4 - Clock source is HFRC / 512 HFRC_DIV2K = 0x5 - Clock source is HFRC / 2048 XT = 0x6 - Clock source is the XT (uncalibrated). XT_DIV2 = 0x7 - Clock source is XT / 2 XT_DIV16 = 0x8 - Clock source is XT / 16 XT_DIV256 = 0x9 - Clock source is XT / 256 LFRC_DIV2 = 0xA - Clock source is LFRC / 2 LFRC_DIV32 = 0xB - Clock source is LFRC / 32 LFRC_DIV1K = 0xC - Clock source is LFRC / 1024 LFRC = 0xD - Clock source is LFRC / 16K RTC_100HZ = 0xE - Clock source is 100 Hz from the current RTC oscillator. HCLK = 0xF - Clock source is HCLK. BUCKA = 0x10 - Clock source is buck converter stream A. |
| 0 | TMRA0EN | RW | Counter/Timer A0 Enable bit. DIS = 0x0 - Counter/Timer A0 Disable. EN = 0x1 - Counter/Timer A0 Enable. |
| Instance 0 Address: | 0x40008010 |
This register holds the running time or event count, either for each 16 bit half or for the whole 32 bit count when the pair is linked.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CTTMRB1
0x0 |
CTTMRA1
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CTTMRB1 | RO | Counter/Timer B1. |
| 15:0 | CTTMRA1 | RO | Counter/Timer A1. |
| Instance 0 Address: | 0x40008014 |
This register holds the compare limits for timer half A.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CMPR1A1
0x0 |
CMPR0A1
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CMPR1A1 | RW | Counter/Timer A1 Compare Register 1. |
| 15:0 | CMPR0A1 | RW | Counter/Timer A1 Compare Register 0. |
| Instance 0 Address: | 0x40008018 |
This register holds the compare limits for timer half B.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CMPR1B1
0x0 |
CMPR0B1
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CMPR1B1 | RW | Counter/Timer B1 Compare Register 1. |
| 15:0 | CMPR0B1 | RW | Counter/Timer B1 Compare Register 0. |
| Instance 0 Address: | 0x4000801C |
This register holds the control bit fields for both halves of timer 1.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CTLINK1
0x0 |
RSVD
0x0 |
TMRB1POL
0x0 |
TMRB1CLR
0x0 |
TMRB1PE
0x0 |
TMRB1IE
0x0 |
TMRB1FN
0x0 |
TMRB1CLK
0x0 |
TMRB1EN
0x0 |
RSVD
0x0 |
TMRA1POL
0x0 |
TMRA1CLR
0x0 |
TMRA1PE
0x0 |
TMRA1IE
0x0 |
TMRA1FN
0x0 |
TMRA1CLK
0x0 |
TMRA1EN
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31 | CTLINK1 | RW | Counter/Timer A1/B1 Link bit. TWO_16BIT_TIMERS = 0x0 - Use A0/B0 timers as two independent 16-bit timers (default). 32BIT_TIMER = 0x1 - Link A1/B1 timers into a single 32-bit timer. |
| 30:29 | RSVD | RO | RESERVED |
| 28 | TMRB1POL | RW | Counter/Timer B1 output polarity. NORMAL = 0x0 - The polarity of the TMRPINB1 pin is the same as the timer output. INVERTED = 0x1 - The polarity of the TMRPINB1 pin is the inverse of the timer output. |
| 27 | TMRB1CLR | RW | Counter/Timer B1 Clear bit. RUN = 0x0 - Allow counter/timer B1 to run CLEAR = 0x1 - Holds counter/timer B1 at 0x0000. |
| 26 | TMRB1PE | RW | Counter/Timer B1 Output Enable bit. DIS = 0x0 - Counter/Timer B holds the TMRPINB signal at the value TMRB1POL. EN = 0x1 - Enable counter/timer B1 to generate a signal on TMRPINB. |
| 25 | TMRB1IE | RW | Counter/Timer B1 Interrupt Enable bit. DIS = 0x0 - Disable counter/timer B1 from generating an interrupt. EN = 0x1 - Enable counter/timer B1 to generate an interrupt. |
| 24:22 | TMRB1FN | RW | Counter/Timer B1 Function Select. SINGLECOUNT = 0x0 - Single count (output toggles and sticks). Count to CMPR0B1, stop. REPEATEDCOUNT = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses). Count to CMPR0B1, restart. PULSE_ONCE = 0x2 - Pulse once (aka one-shot). Count to CMPR0B1, assert, count to CMPR1B, deassert, stop. PULSE_CONT = 0x3 - Pulse continously. Count to CMPR0B1, assert, count to CMPR1B1, deassert, restart. CONTINUOUS = 0x4 - Continuous run (aka Free Run). Count continuously. |
| 21:17 | TMRB1CLK | RW | Counter/Timer B1 Clock Select. TMRPIN = 0x0 - Clock source is TMRPINB. HFRC = 0x1 - Clock source is the HFRC HFRC_DIV8 = 0x2 - Clock source is HFRC / 8 HFRC_DIV128 = 0x3 - Clock source is HFRC / 128 HFRC_DIV512 = 0x4 - Clock source is HFRC / 512 HFRC_DIV2K = 0x5 - Clock source is HFRC / 2048 XT = 0x6 - Clock source is the XT (uncalibrated). XT_DIV2 = 0x7 - Clock source is XT / 2 XT_DIV16 = 0x8 - Clock source is XT / 16 XT_DIV256 = 0x9 - Clock source is XT / 256 LFRC_DIV2 = 0xA - Clock source is LFRC / 2 LFRC_DIV32 = 0xB - Clock source is LFRC / 32 LFRC_DIV1K = 0xC - Clock source is LFRC / 1024 LFRC = 0xD - Clock source is LFRC / 16K RTC_100HZ = 0xE - Clock source is 100 Hz from the current RTC oscillator. HCLK = 0xF - Clock source is HCLK. BUCKB = 0x10 - Clock source is buck converter stream B. |
| 16 | TMRB1EN | RW | Counter/Timer B1 Enable bit. DIS = 0x0 - Counter/Timer B1 Disable. EN = 0x1 - Counter/Timer B1 Enable. |
| 15:13 | RSVD | RO | RESERVED |
| 12 | TMRA1POL | RW | Counter/Timer A1 output polarity. NORMAL = 0x0 - The polarity of the TMRPINA1 pin is the same as the timer output. INVERTED = 0x1 - The polarity of the TMRPINA1 pin is the inverse of the timer output. |
| 11 | TMRA1CLR | RW | Counter/Timer A1 Clear bit. RUN = 0x0 - Allow counter/timer A1 to run CLEAR = 0x1 - Holds counter/timer A1 at 0x0000. |
| 10 | TMRA1PE | RW | Counter/Timer A1 Output Enable bit. DIS = 0x0 - Counter/Timer A holds the TMRPINA signal at the value TMRA1POL. EN = 0x1 - Enable counter/timer A1 to generate a signal on TMRPINA. |
| 9 | TMRA1IE | RW | Counter/Timer A1 Interrupt Enable bit. DIS = 0x0 - Disable counter/timer A1 from generating an interrupt. EN = 0x1 - Enable counter/timer A1 to generate an interrupt. |
| 8:6 | TMRA1FN | RW | Counter/Timer A1 Function Select. SINGLECOUNT = 0x0 - Single count (output toggles and sticks). Count to CMPR0A1, stop. REPEATEDCOUNT = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses). Count to CMPR0A1, restart. PULSE_ONCE = 0x2 - Pulse once (aka one-shot). Count to CMPR0A1, assert, count to CMPR1B, deassert, stop. PULSE_CONT = 0x3 - Pulse continously. Count to CMPR0A1, assert, count to CMPR1A1, deassert, restart. CONTINUOUS = 0x4 - Continuous run (aka Free Run). Count continuously. |
| 5:1 | TMRA1CLK | RW | Counter/Timer A1 Clock Select. TMRPIN = 0x0 - Clock source is TMRPINA. HFRC = 0x1 - Clock source is the HFRC HFRC_DIV8 = 0x2 - Clock source is the HFRC / 8 HFRC_DIV128 = 0x3 - Clock source is HFRC / 128 HFRC_DIV512 = 0x4 - Clock source is HFRC / 512 HFRC_DIV2K = 0x5 - Clock source is HFRC / 2048 XT = 0x6 - Clock source is the XT (uncalibrated). XT_DIV2 = 0x7 - Clock source is XT / 2 XT_DIV16 = 0x8 - Clock source is XT / 16 XT_DIV256 = 0x9 - Clock source is XT / 256 LFRC_DIV2 = 0xA - Clock source is LFRC / 2 LFRC_DIV32 = 0xB - Clock source is LFRC / 32 LFRC_DIV1K = 0xC - Clock source is LFRC / 1024 LFRC = 0xD - Clock source is LFRC / 16K RTC_100HZ = 0xE - Clock source is 100 Hz from the current RTC oscillator. HCLK = 0xF - Clock source is HCLK. BUCKA = 0x10 - Clock source is buck converter stream A. |
| 0 | TMRA1EN | RW | Counter/Timer A1 Enable bit. DIS = 0x0 - Counter/Timer A1 Disable. EN = 0x1 - Counter/Timer A1 Enable. |
| Instance 0 Address: | 0x40008020 |
Counter/Timer Register
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CTTMRB2
0x0 |
CTTMRA2
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CTTMRB2 | RO | Counter/Timer B2. |
| 15:0 | CTTMRA2 | RO | Counter/Timer A2. |
| Instance 0 Address: | 0x40008024 |
This register holds the compare limits for timer half A.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CMPR1A2
0x0 |
CMPR0A2
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CMPR1A2 | RW | Counter/Timer A2 Compare Register 1. |
| 15:0 | CMPR0A2 | RW | Counter/Timer A2 Compare Register 0. |
| Instance 0 Address: | 0x40008028 |
This register holds the compare limits for timer half B.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CMPR1B2
0x0 |
CMPR0B2
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CMPR1B2 | RW | Counter/Timer B2 Compare Register 1. |
| 15:0 | CMPR0B2 | RW | Counter/Timer B2 Compare Register 0. |
| Instance 0 Address: | 0x4000802C |
This register holds the control bit fields for both halves of timer 2.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CTLINK2
0x0 |
RSVD
0x0 |
TMRB2POL
0x0 |
TMRB2CLR
0x0 |
TMRB2PE
0x0 |
TMRB2IE
0x0 |
TMRB2FN
0x0 |
TMRB2CLK
0x0 |
TMRB2EN
0x0 |
RSVD
0x0 |
TMRA2POL
0x0 |
TMRA2CLR
0x0 |
TMRA2PE
0x0 |
TMRA2IE
0x0 |
TMRA2FN
0x0 |
TMRA2CLK
0x0 |
TMRA2EN
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31 | CTLINK2 | RW | Counter/Timer A2/B2 Link bit. TWO_16BIT_TIMERS = 0x0 - Use A0/B0 timers as two independent 16-bit timers (default). 32BIT_TIMER = 0x1 - Link A2/B2 timers into a single 32-bit timer. |
| 30:29 | RSVD | RO | RESERVED |
| 28 | TMRB2POL | RW | Counter/Timer B2 output polarity. NORMAL = 0x0 - The polarity of the TMRPINB2 pin is the same as the timer output. INVERTED = 0x1 - The polarity of the TMRPINB2 pin is the inverse of the timer output. |
| 27 | TMRB2CLR | RW | Counter/Timer B2 Clear bit. RUN = 0x0 - Allow counter/timer B2 to run CLEAR = 0x1 - Holds counter/timer B2 at 0x0000. |
| 26 | TMRB2PE | RW | Counter/Timer B2 Output Enable bit. DIS = 0x0 - Counter/Timer B holds the TMRPINB signal at the value TMRB2POL. EN = 0x1 - Enable counter/timer B2 to generate a signal on TMRPINB. |
| 25 | TMRB2IE | RW | Counter/Timer B2 Interrupt Enable bit. DIS = 0x0 - Disable counter/timer B2 from generating an interrupt. EN = 0x1 - Enable counter/timer B2 to generate an interrupt. |
| 24:22 | TMRB2FN | RW | Counter/Timer B2 Function Select. SINGLECOUNT = 0x0 - Single count (output toggles and sticks). Count to CMPR0B2, stop. REPEATEDCOUNT = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses). Count to CMPR0B2, restart. PULSE_ONCE = 0x2 - Pulse once (aka one-shot). Count to CMPR0B2, assert, count to CMPR1B, deassert, stop. PULSE_CONT = 0x3 - Pulse continously. Count to CMPR0B2, assert, count to CMPR1B2, deassert, restart. CONTINUOUS = 0x4 - Continuous run (aka Free Run). Count continuously. |
| 21:17 | TMRB2CLK | RW | Counter/Timer B2 Clock Select. TMRPIN = 0x0 - Clock source is TMRPINB. HFRC = 0x1 - Clock source is the HFRC HFRC_DIV8 = 0x2 - Clock source is HFRC / 8 HFRC_DIV128 = 0x3 - Clock source is HFRC / 128 HFRC_DIV512 = 0x4 - Clock source is HFRC / 512 HFRC_DIV2K = 0x5 - Clock source is HFRC / 2048 XT = 0x6 - Clock source is the XT (uncalibrated). XT_DIV2 = 0x7 - Clock source is XT / 2 XT_DIV16 = 0x8 - Clock source is XT / 16 XT_DIV256 = 0x9 - Clock source is XT / 256 LFRC_DIV2 = 0xA - Clock source is LFRC / 2 LFRC_DIV32 = 0xB - Clock source is LFRC / 32 LFRC_DIV1K = 0xC - Clock source is LFRC / 1024 LFRC = 0xD - Clock source is LFRC / 16K RTC_100HZ = 0xE - Clock source is 100 Hz from the current RTC oscillator. HCLK = 0xF - Clock source is HCLK. BUCKA = 0x10 - Clock source is buck converter stream A. |
| 16 | TMRB2EN | RW | Counter/Timer B2 Enable bit. DIS = 0x0 - Counter/Timer B2 Disable. EN = 0x1 - Counter/Timer B2 Enable. |
| 15:13 | RSVD | RO | RESERVED |
| 12 | TMRA2POL | RW | Counter/Timer A2 output polarity. NORMAL = 0x0 - The polarity of the TMRPINA2 pin is the same as the timer output. INVERTED = 0x1 - The polarity of the TMRPINA2 pin is the inverse of the timer output. |
| 11 | TMRA2CLR | RW | Counter/Timer A2 Clear bit. RUN = 0x0 - Allow counter/timer A2 to run CLEAR = 0x1 - Holds counter/timer A2 at 0x0000. |
| 10 | TMRA2PE | RW | Counter/Timer A2 Output Enable bit. DIS = 0x0 - Counter/Timer A holds the TMRPINA signal at the value TMRA2POL. EN = 0x1 - Enable counter/timer A2 to generate a signal on TMRPINA. |
| 9 | TMRA2IE | RW | Counter/Timer A2 Interrupt Enable bit. DIS = 0x0 - Disable counter/timer A2 from generating an interrupt. EN = 0x1 - Enable counter/timer A2 to generate an interrupt. |
| 8:6 | TMRA2FN | RW | Counter/Timer A2 Function Select. SINGLECOUNT = 0x0 - Single count (output toggles and sticks). Count to CMPR0A2, stop. REPEATEDCOUNT = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses). Count to CMPR0A2, restart. PULSE_ONCE = 0x2 - Pulse once (aka one-shot). Count to CMPR0A2, assert, count to CMPR1B, deassert, stop. PULSE_CONT = 0x3 - Pulse continously. Count to CMPR0A2, assert, count to CMPR1A2, deassert, restart. CONTINUOUS = 0x4 - Continuous run (aka Free Run). Count continuously. |
| 5:1 | TMRA2CLK | RW | Counter/Timer A2 Clock Select. TMRPIN = 0x0 - Clock source is TMRPINA. HFRC = 0x1 - Clock source is the HFRC HFRC_DIV8 = 0x2 - Clock source is HFRC / 8 HFRC_DIV128 = 0x3 - Clock source is HFRC / 128 HFRC_DIV512 = 0x4 - Clock source is HFRC / 512 HFRC_DIV2K = 0x5 - Clock source is HFRC / 2048 XT = 0x6 - Clock source is the XT (uncalibrated). XT_DIV2 = 0x7 - Clock source is XT / 2 XT_DIV16 = 0x8 - Clock source is XT / 16 XT_DIV256 = 0x9 - Clock source is XT / 256 LFRC_DIV2 = 0xA - Clock source is LFRC / 2 LFRC_DIV32 = 0xB - Clock source is LFRC / 32 LFRC_DIV1K = 0xC - Clock source is LFRC / 1024 LFRC = 0xD - Clock source is LFRC / 16K RTC_100HZ = 0xE - Clock source is 100 Hz from the current RTC oscillator. HCLK = 0xF - Clock source is HCLK. BUCKB = 0x10 - Clock source is buck converter stream B. |
| 0 | TMRA2EN | RW | Counter/Timer A2 Enable bit. DIS = 0x0 - Counter/Timer A2 Disable. EN = 0x1 - Counter/Timer A2 Enable. |
| Instance 0 Address: | 0x40008030 |
Counter/Timer Register
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CTTMRB3
0x0 |
CTTMRA3
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CTTMRB3 | RO | Counter/Timer B3. |
| 15:0 | CTTMRA3 | RO | Counter/Timer A3. |
| Instance 0 Address: | 0x40008034 |
This register holds the compare limits for timer half A.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CMPR1A3
0x0 |
CMPR0A3
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CMPR1A3 | RW | Counter/Timer A3 Compare Register 1. |
| 15:0 | CMPR0A3 | RW | Counter/Timer A3 Compare Register 0. |
| Instance 0 Address: | 0x40008038 |
This register holds the compare limits for timer half B.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CMPR1B3
0x0 |
CMPR0B3
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:16 | CMPR1B3 | RW | Counter/Timer B3 Compare Register 1. |
| 15:0 | CMPR0B3 | RW | Counter/Timer B3 Compare Register 0. |
| Instance 0 Address: | 0x4000803C |
This register holds the control bit fields for both halves of timer 3.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| CTLINK3
0x0 |
RSVD
0x0 |
TMRB3POL
0x0 |
TMRB3CLR
0x0 |
TMRB3PE
0x0 |
TMRB3IE
0x0 |
TMRB3FN
0x0 |
TMRB3CLK
0x0 |
TMRB3EN
0x0 |
ADCEN
0x0 |
RSVD
0x0 |
TMRA3POL
0x0 |
TMRA3CLR
0x0 |
TMRA3PE
0x0 |
TMRA3IE
0x0 |
TMRA3FN
0x0 |
TMRA3CLK
0x0 |
TMRA3EN
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31 | CTLINK3 | RW | Counter/Timer A/B Link bit. TWO_16BIT_TIMERS = 0x0 - Use A0/B0 timers as two independent 16-bit timers (default). 32BIT_TIMER = 0x1 - Link A3/B3 timers into a single 32-bit timer. |
| 30:29 | RSVD | RO | RESERVED |
| 28 | TMRB3POL | RW | Counter/Timer B3 output polarity. NORMAL = 0x0 - The polarity of the TMRPINB3 pin is the same as the timer output. INVERTED = 0x1 - The polarity of the TMRPINB3 pin is the inverse of the timer output. |
| 27 | TMRB3CLR | RW | Counter/Timer B3 Clear bit. RUN = 0x0 - Allow counter/timer B3 to run. CLEAR = 0x1 - Holds counter/timer B3 at 0x0000. |
| 26 | TMRB3PE | RW | Counter/Timer B3 Output Enable bit. DIS = 0x0 - Counter/Timer B holds the TMRPINB signal at the value TMRB3POL. EN = 0x1 - Enable counter/timer B3 to generate a signal on TMRPINB. |
| 25 | TMRB3IE | RW | Counter/Timer B3 Interrupt Enable bit. DIS = 0x0 - Disable counter/timer B3 from generating an interrupt. EN = 0x1 - Enable counter/timer B3 to generate an interrupt. |
| 24:22 | TMRB3FN | RW | Counter/Timer B3 Function Select. SINGLECOUNT = 0x0 - Single count (output toggles and sticks). Count to CMPR0B3, stop. REPEATEDCOUNT = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses). Count to CMPR0B3, restart. PULSE_ONCE = 0x2 - Pulse once (aka one-shot). Count to CMPR0B3, assert, count to CMPR1B, deassert, stop. PULSE_CONT = 0x3 - Pulse continously. Count to CMPR0B3, assert, count to CMPR1B3, deassert, restart. CONTINUOUS = 0x4 - Continuous run (aka Free Run). Count continuously. |
| 21:17 | TMRB3CLK | RW | Counter/Timer B3 Clock Select. TMRPIN = 0x0 - Clock source is TMRPINB. HFRC = 0x1 - Clock source is the HFRC HFRC_DIV8 = 0x2 - Clock source is HFRC / 8 HFRC_DIV128 = 0x3 - Clock source is HFRC / 128 HFRC_DIV512 = 0x4 - Clock source is HFRC / 512 HFRC_DIV2K = 0x5 - Clock source is HFRC / 2048 XT = 0x6 - Clock source is the XT (uncalibrated). XT_DIV2 = 0x7 - Clock source is XT / 2 XT_DIV16 = 0x8 - Clock source is XT / 16 XT_DIV256 = 0x9 - Clock source is XT / 256 LFRC_DIV2 = 0xA - Clock source is LFRC / 2 LFRC_DIV32 = 0xB - Clock source is LFRC / 32 LFRC_DIV1K = 0xC - Clock source is LFRC / 1024 LFRC = 0xD - Clock source is LFRC / 16K RTC_100HZ = 0xE - Clock source is 100 Hz from the current RTC oscillator. HCLK = 0xF - Clock source is HCLK. BUCKA = 0x10 - Clock source is buck converter stream A. |
| 16 | TMRB3EN | RW | Counter/Timer B3 Enable bit. DIS = 0x0 - Counter/Timer B3 Disable. EN = 0x1 - Counter/Timer B3 Enable. |
| 15 | ADCEN | RW | Special Timer A3 enable for ADC function. |
| 14:13 | RSVD | RO | RESERVED |
| 12 | TMRA3POL | RW | Counter/Timer A3 output polarity. NORMAL = 0x0 - The polarity of the TMRPINA3 pin is the same as the timer output. INVERTED = 0x1 - The polarity of the TMRPINA3 pin is the inverse of the timer output. |
| 11 | TMRA3CLR | RW | Counter/Timer A3 Clear bit. CLEAR = 0x1 - Holds counter/timer A3 at 0x0000. |
| 10 | TMRA3PE | RW | Counter/Timer A3 Output Enable bit. DIS = 0x0 - Counter/Timer A holds the TMRPINA signal at the value TMRA3POL. EN = 0x1 - Enable counter/timer A3 to generate a signal on TMRPINA. |
| 9 | TMRA3IE | RW | Counter/Timer A3 Interrupt Enable bit. DIS = 0x0 - Disable counter/timer A3 from generating an interrupt. EN = 0x1 - Enable counter/timer A3 to generate an interrupt. |
| 8:6 | TMRA3FN | RW | Counter/Timer A3 Function Select. SINGLECOUNT = 0x0 - Single count (output toggles and sticks). Count to CMPR0A3, stop. REPEATEDCOUNT = 0x1 - Repeated count (periodic 1-clock-cycle-wide pulses). Count to CMPR0A3, restart. PULSE_ONCE = 0x2 - Pulse once (aka one-shot). Count to CMPR0A3, assert, count to CMPR1B, deassert, stop. PULSE_CONT = 0x3 - Pulse continously. Count to CMPR0A3, assert, count to CMPR1A3, deassert, restart. CONTINUOUS = 0x4 - Continuous run (aka Free Run). Count continuously. |
| 5:1 | TMRA3CLK | RW | Counter/Timer A3 Clock Select. TMRPIN = 0x0 - Clock source is TMRPINA. HFRC = 0x1 - Clock source is the HFRC HFRC_DIV8 = 0x2 - Clock source is HFRC / 8 HFRC_DIV128 = 0x3 - Clock source is HFRC / 128 HFRC_DIV512 = 0x4 - Clock source is HFRC / 512 HFRC_DIV2K = 0x5 - Clock source is HFRC / 2048 XT = 0x6 - Clock source is the XT (uncalibrated). XT_DIV2 = 0x7 - Clock source is XT / 2 XT_DIV16 = 0x8 - Clock source is XT / 16 XT_DIV256 = 0x9 - Clock source is XT / 256 LFRC_DIV2 = 0xA - Clock source is LFRC / 2 LFRC_DIV32 = 0xB - Clock source is LFRC / 32 LFRC_DIV1K = 0xC - Clock source is LFRC / 1024 LFRC = 0xD - Clock source is LFRC / 16K RTC_100HZ = 0xE - Clock source is 100 Hz from the current RTC oscillator. HCLK = 0xF - Clock source is HCLK. BUCKB = 0x10 - Clock source is buck converter stream B. |
| 0 | TMRA3EN | RW | Counter/Timer A3 Enable bit. DIS = 0x0 - Counter/Timer A3 Disable. EN = 0x1 - Counter/Timer A3 Enable. |
| Instance 0 Address: | 0x40008200 |
Set bits in this register to allow this module to generate the corresponding interrupt.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| RSVD
0x0 |
CTMRB3INT
0x0 |
CTMRA3INT
0x0 |
CTMRB2INT
0x0 |
CTMRA2INT
0x0 |
CTMRB1INT
0x0 |
CTMRA1INT
0x0 |
CTMRB0INT
0x0 |
CTMRA0INT
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:8 | RSVD | RO | RESERVED |
| 7 | CTMRB3INT | RW | Counter/Timer B3 interrupt. |
| 6 | CTMRA3INT | RW | Counter/Timer A3 interrupt. |
| 5 | CTMRB2INT | RW | Counter/Timer B2 interrupt. |
| 4 | CTMRA2INT | RW | Counter/Timer A2 interrupt. |
| 3 | CTMRB1INT | RW | Counter/Timer B1 interrupt. |
| 2 | CTMRA1INT | RW | Counter/Timer A1 interrupt. |
| 1 | CTMRB0INT | RW | Counter/Timer B0 interrupt. |
| 0 | CTMRA0INT | RW | Counter/Timer A0 interrupt. |
| Instance 0 Address: | 0x40008204 |
Read bits from this register to discover the cause of a recent interrupt.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| RSVD
0x0 |
CTMRB3INT
0x0 |
CTMRA3INT
0x0 |
CTMRB2INT
0x0 |
CTMRA2INT
0x0 |
CTMRB1INT
0x0 |
CTMRA1INT
0x0 |
CTMRB0INT
0x0 |
CTMRA0INT
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:8 | RSVD | RO | RESERVED |
| 7 | CTMRB3INT | RW | Counter/Timer B3 interrupt. |
| 6 | CTMRA3INT | RW | Counter/Timer A3 interrupt. |
| 5 | CTMRB2INT | RW | Counter/Timer B2 interrupt. |
| 4 | CTMRA2INT | RW | Counter/Timer A2 interrupt. |
| 3 | CTMRB1INT | RW | Counter/Timer B1 interrupt. |
| 2 | CTMRA1INT | RW | Counter/Timer A1 interrupt. |
| 1 | CTMRB0INT | RW | Counter/Timer B0 interrupt. |
| 0 | CTMRA0INT | RW | Counter/Timer A0 interrupt. |
| Instance 0 Address: | 0x40008208 |
Write a 1 to a bit in this register to clear the interrupt status associated with that bit.
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| RSVD
0x0 |
CTMRB3INT
0x0 |
CTMRA3INT
0x0 |
CTMRB2INT
0x0 |
CTMRA2INT
0x0 |
CTMRB1INT
0x0 |
CTMRA1INT
0x0 |
CTMRB0INT
0x0 |
CTMRA0INT
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:8 | RSVD | RO | RESERVED |
| 7 | CTMRB3INT | RW | Counter/Timer B3 interrupt. |
| 6 | CTMRA3INT | RW | Counter/Timer A3 interrupt. |
| 5 | CTMRB2INT | RW | Counter/Timer B2 interrupt. |
| 4 | CTMRA2INT | RW | Counter/Timer A2 interrupt. |
| 3 | CTMRB1INT | RW | Counter/Timer B1 interrupt. |
| 2 | CTMRA1INT | RW | Counter/Timer A1 interrupt. |
| 1 | CTMRB0INT | RW | Counter/Timer B0 interrupt. |
| 0 | CTMRA0INT | RW | Counter/Timer A0 interrupt. |
| Instance 0 Address: | 0x4000820C |
Write a 1 to a bit in this register to instantly generate an interrupt from this module. (Generally used for testing purposes).
//
// All macro-based register writes follow the same basic format. For
// single-instance modules, you may use the simpler AM_REG macro. For
// multi-instance macros, you will need to specify the instance number using
// the AM_REGn macro format.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
// AM_REGn(<MODULE>, <INSTANCE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>_<VALUE>;
//
// For registers that do not have specific enumeration values, you may use this alternate format instead.
//
// AM_REG(<MODULE>, <REGISTER>) |= AM_REG_<MODULE>_<REGISTER>_<FIELD>(<NUMBER>);
//
// For example, the following three lines of code are equivalent methods of
// writing the value for 12MHZ to the CLKSEL field in the ADC_CFG register.
//
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REGn(ADC, 0, CFG) |= AM_REG_ADC_CFG_CLKSEL_12MHZ;
AM_REG(ADC, CFG) |= AM_REG_ADC_CFG_CLKSEL(0x1);
| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| RSVD
0x0 |
CTMRB3INT
0x0 |
CTMRA3INT
0x0 |
CTMRB2INT
0x0 |
CTMRA2INT
0x0 |
CTMRB1INT
0x0 |
CTMRA1INT
0x0 |
CTMRB0INT
0x0 |
CTMRA0INT
0x0 |
| Bits | Name | RW | Description |
|---|---|---|---|
| 31:8 | RSVD | RO | RESERVED |
| 7 | CTMRB3INT | RW | Counter/Timer B3 interrupt. |
| 6 | CTMRA3INT | RW | Counter/Timer A3 interrupt. |
| 5 | CTMRB2INT | RW | Counter/Timer B2 interrupt. |
| 4 | CTMRA2INT | RW | Counter/Timer A2 interrupt. |
| 3 | CTMRB1INT | RW | Counter/Timer B1 interrupt. |
| 2 | CTMRA1INT | RW | Counter/Timer A1 interrupt. |
| 1 | CTMRB0INT | RW | Counter/Timer B0 interrupt. |
| 0 | CTMRA0INT | RW | Counter/Timer A0 interrupt. |


Sparkling
What is the Sparkling?
Development environment
Future additions
brew list
brew update
brew upgrade
brew search
brew install
brew uninstall
search
cancle
install
cancle
uninstall
cancle
console log


3 Poems by Dalton Day
Dalton Day
Dear Can You Speak Up Just A Little Bit
You keep losing your balance.
You say things like
The sky has stranded me here
& I used to think you meant
you were an alien, only
wanting to return to your
home planet, but you don’t.
I’m sorry I can’t take
the tornado out of you, that I
keep building gyroscopes
for you to swallow down, only
to add one more direction
for you to forget.  That’s all.
Love,
Is This Loud Enough?
 People are worried about their cars, their houses. The damage that has occurred & will occur with each impact. I’ve stopped going outside, even though you haven’t. You are more worried about the deer. I watch you build a giant net in the yard, to catch them. You say it isn’t the sight of them falling that’s hard, but the sound. & as they safely land, then run into the woods to join their ever-growing numbers, I guess that’s what people don’t understand, can’t understand, about grief. You can’t assign it. It’s just assigned.

You are covered in red,
the color of blood, but instead
of blood, strawberries.
People don’t talk about gnats
very often, or at all,
so it is nice that you will, & do.
If a pitch goes high enough,
nothing will hear it,
except the thing that’s making it.
When you raise yourself
out of the grass, it’s because you
raise yourself out of the grass.
A thing doesn’t have to look
like a thing for it to be that thing,
except. Except. Except.
Dalton Day is a trembling dog-person & MFA candidate in The New Writers Project at UT Austin. He is the author of the collection Actual Cloud (Saló Press, 2015) & the chapbooks Fake Knife (Freezeray Press, 2015) & To Breathe I’m Too Thin (Hyacinth Girl Press, forthcoming 2016). His poems have been featured in PANK, Columbia Poetry Review, Alien Mouth, & The Offing, among others. He can be found on myshoesuntied.tumblr.com & twitter.com/lilghosthands.


In this vignette we demonstrate the offered functionality for pooling multiple surveys.
We offer convenience functions that allow for easily performing the pooling approach:
get_surveys
: Wrapper that uses scrape_wahlrecht
and collapse_parties
to download the most current survey results from https://www.wahlrecht.de/ and stores the prepared data inside a nested tibble
(see tidyr::nest
)
pool_surveys
: Pool all newest surveys (obtained with get_surveys
), using a specified time window that defaults to the last 14 days, and assuming a certain correlation between the number of party-specific votes of any two polling agencies, which defaults to 0.5. Per polling agency only the newest survey in the time windows is considered.
The three arguments last_date
, period
and period_extended
define the time window used in pool_surveys
. Using these arguments one can choose between two types of pooling:
If period_extended
equals NA
: Surveys in the time window from last_date
to last_date - period
will be considered for each polling agency.
If period_extended
does not equal NA
: Same as 1. Additionally however, surveys in the time window from last_date - period
to last_date - period_extended
will also be considered for each polling agency, but only after downweighting them by halving their true sample size.
The latter option can be especially useful if opinion polls for a specific election are only published very rarely. As default, pool_surveys
uses a time window starting from the current date and going 14 days back, not making use of period_extended
.
# Scrape current surveys from the major polling agencies in Germany
# surveys <- get_surveys()
# As the web connection is sometimes a bit unstable we here use the sample data set of pre-scraped surveys
surveys <- coalitions::surveys_sample
surveys
## # A tibble: 7 x 2
## pollster surveys
## <chr> <list>
## 1 allensbach <tibble [3 × 5]>
## 2 emnid <tibble [3 × 5]>
## 3 fgw <tibble [3 × 5]>
## 4 forsa <tibble [3 × 5]>
## 5 gms <tibble [3 × 5]>
## 6 infratest <tibble [3 × 5]>
## 7 insa <tibble [3 × 5]>
# Obtain the pooled sample for today, based on the last 14 days
last_date <- surveys %>% tidyr::unnest() %>% pull(date) %>% max()
pool <- pool_surveys(surveys, last_date = last_date)
pool %>% select(-start, -end)
## # A tibble: 7 x 6
## pollster date respondents party percent votes
## <chr> <date> <dbl> <chr> <dbl> <dbl>
## 1 pooled 2017-09-02 3055. afd 8.89 272.
## 2 pooled 2017-09-02 3055. cdu 38.0 1161.
## 3 pooled 2017-09-02 3055. fdp 8.52 260.
## 4 pooled 2017-09-02 3055. greens 7.41 226.
## 5 pooled 2017-09-02 3055. left 9.06 277.
## 6 pooled 2017-09-02 3055. others 4.51 138.
## 7 pooled 2017-09-02 3055. spd 23.6 722.


PART I. GENERAL PROVISIONS
Note
Sections 107-1 to 107-11 designated as Part I by L 2007, c 82, §3.
§107-1 Management of internal improvements. The comptroller is charged with the superintendence and management of the internal improvements of the State. [CC 1859, §167; RL 1925, §798; RL 1935, §1700; RL 1945, §4901; am L 1947, c 180, §1; RL 1955, §110-1; am L Sp 1959 2d, c 1, §12; HRS §107-1]
Cross References
General authority of comptroller, see §26-6.
Case Notes
Section gives no right to grant franchise for street railway in Honolulu. 6 H. 414.
Within duties to accept promise to pay for use of sewer. 19 H. 41.
County ordinances may not restrict duties under section. 23 H. 675.
No specific duties or improvements are imposed on contractors. 30 H. 132.
Cited: 7 H. 470.


About Me
Here's a short bio of my background. If you need more information go to my website at: Douglas Boyce Web Site
I was born in Kansas City,Misouri. When I was nine years old, my family moved to Florida. I attended elementary, Middle School,and High School there. After graduating high school, I joined the US Army. After basic training, I was stationed at Fort Bragg,NC and was eventully sent to Germany. After my enlistment, I started college, and also joined the US Army reserve. My unit was even called up to Desert Storm/Desert Shield. I eventually, finished out my 20 year enlistment in 2000.
I attended college at the University of North Floria, graduating in 1990. I worked for a defense contractor in Florida, before moving to Kansas to work for BNSF railway. I got married in 2005, and have worked for a couple of defense contractors as a E-Learning Developer.
Most recently the City of Shawnee, Kansas as a IT Web Developer Intern. The reason I am attending this bootcamp is to become a full-stack web developer. I hope to learn alot about web development including HTML, CSS, JavaScript, among others, and now the journey begins.


About
Hi, my name is Shujin Wu. A grad student in CS at Oregon State University. I am passionate about coding and life.
I am graduating in Dec. 2016, and I am currently actively seeking internship and full-time job opportunities. You can also find my résumé here.
Learn moreDon't waste your time search for the same thing. Here is where I collect the resources.
Learn more


Package it.polimi.ingsw.model.marketTray
Class MarketTrayTest
java.lang.Object
it.polimi.ingsw.model.marketTray.MarketTrayTest
public class MarketTrayTest
extends java.lang.Object
Test class that tests the methods of the MarketTray class
-
Field Summary
Fields Modifier and Type Field Description (package private) MarketTray
marketTray
-
Constructor Summary
Constructors Constructor Description MarketTrayTest()
-
Method Summary
Modifier and Type Method Description (package private) void
attributesNotNull()
Test method that checks that the attributes of the MarketTray class are not null(package private) void
blueMarblesNumber()
Test method that checks that the number of blue marbles is correct(package private) void
checkReturnValueColumn()
Test method that checks the correct return of the selected resources on the specific column of the MarketTray(package private) void
checkReturnValueRow()
Test method that checks the correct return of the selected resources on the specific row of the MarketTray(package private) void
checkSlidingColumn()
Test method that checks the correct sliding of the MarketTray columns(package private) void
checkSlidingRow()
Test method that checks the correct sliding of the MarketTray rows(package private) void
greyMarblesNumber()
Test method that checks that the number of grey marbles is correct(package private) void
purpleMarblesNumber()
Test method that checks that the number of purple marbles is correct(package private) void
redMarblesNumber()
Test method that checks that the number of red marbles is correct(package private) void
takeMarblesColumn()
Test method that checks the selection of the column from the MarketTray(package private) void
takeMarblesRow()
Test method that checks the selection of the row from the MarketTray(package private) void
whiteMarblesNumber()
Test method that checks that the number of white marbles is correct(package private) void
yellowMarblesNumber()
Test method that checks that the number of yellow marbles is correctMethods inherited from class java.lang.Object
clone, equals, finalize, getClass, hashCode, notify, notifyAll, toString, wait, wait, wait
-
Field Details
-
marketTray
MarketTray marketTray
-
-
Constructor Details
-
MarketTrayTest
public MarketTrayTest()
-
-
Method Details
-
attributesNotNull
@Test void attributesNotNull()Test method that checks that the attributes of the MarketTray class are not null -
whiteMarblesNumber
@Test void whiteMarblesNumber()Test method that checks that the number of white marbles is correct -
redMarblesNumber
@Test void redMarblesNumber()Test method that checks that the number of red marbles is correct -
greyMarblesNumber
@Test void greyMarblesNumber()Test method that checks that the number of grey marbles is correct -
purpleMarblesNumber
@Test void purpleMarblesNumber()Test method that checks that the number of purple marbles is correct -
yellowMarblesNumber
@Test void yellowMarblesNumber()Test method that checks that the number of yellow marbles is correct -
blueMarblesNumber
@Test void blueMarblesNumber()Test method that checks that the number of blue marbles is correct -
takeMarblesRow
@Test void takeMarblesRow()Test method that checks the selection of the row from the MarketTray -
takeMarblesColumn
@Test void takeMarblesColumn()Test method that checks the selection of the column from the MarketTray -
checkReturnValueRow
@Test void checkReturnValueRow()Test method that checks the correct return of the selected resources on the specific row of the MarketTray -
checkReturnValueColumn
@Test void checkReturnValueColumn()Test method that checks the correct return of the selected resources on the specific column of the MarketTray -
checkSlidingRow
@Test void checkSlidingRow()Test method that checks the correct sliding of the MarketTray rows -
checkSlidingColumn
@Test void checkSlidingColumn()Test method that checks the correct sliding of the MarketTray columns
-


Here is a list I never thought I would be included in : General Sir Richard Dannatt… Susannah York… Rt Hon Sir John Major… Prunella Scales… Frederick Forsyth… Sir Michael Caine… Sir Richard Branson… Joanna Lumley… Nicholas Parsons… Stephen Fry… Frank Key. Oo-er, missus!
Your favourite impoverished scribbler is in this august company as a contributor to that recipe book I was telling you about a few weeks ago, in connection with my participation in a broadcast by Phil Minton's Feral Choir. Mr Minton's recipe, Deptford Squat Stir-Fry, is truly sensational.
The book is Able To Cook, and all proceeds go to the charities Age UK Norfolk and Connects & Co. I command, by diktat, all readers to go here, immediately, and buy a copy.
My thanks to R., by the way.


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Donald Trump committed to Asia, says US commerce secretary Wilbur Ross
U.S. Commerce Secretary Wilbur Ross spoke at a business forum, part of the annual leaders' summit of the Association of Southeast Asian Nations.
by ReutersThe administration of U.S. President Donald Trump is "fully committed" to Asia, his commerce secretary said on Monday at a regional forum attended by a U.S. delegation smaller than previous years.
U.S. Commerce Secretary Wilbur Ross spoke at a business forum, part of the annual leaders' summit of the Association of Southeast Asian Nations.
"The Trump administration is extremely engaged and fully committed to this region," Ross said.
Close
"We will continue to negotiate trade deals with countries in this region."Special Thursday Expiry on 10th 7th Nov
Early Closure to The Great Diwali Discount. Last Chance to get Moneycontrol PRO for a year @ Rs. 289/- only
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| Date | Kapitula | Online notes |
|---|---|---|
| 2/11 | 1.1 | Linear systems |
| 2/13 | 1.2.1 | Vector algebra |
| 1.2.2 | Matrix algebra | |
| 2/18 | 1.5 | General & particular solutions |
| 1.6.1-1.6.2, 1.7.3, 1.8.1 | Basis and dimension | |
| 2/20 | 1.10 | Determinants |
| 1.4 | Inverses | |
| 2/25 | 1.9 | Equivalent conditions |
| 1.11 | Complex numbers | |
| 2/27 | 1.12 | Eigenvalues |
| 3/3 | 2.3 | 1st order linear ODEs |
| 2.4 | Homogeneous solutions | |
| 3/5 | N/A | Initial-value problems |
| 2.5.1-2.5.2 | Variation of parameters | |
| 3/10 | 2.5.3 | Undetermined coefficients |
| 3/12 | 2.1 | Modeling |
| 3/17 | 5.1 | Steps and impulses |
| 5.2 | Laplace transform | |
| 3/19 | 3.4 | Linear ODE systems |
| 3.5 (up to 3.5.1) | Homogeneous systems | |
| 3/24 | 3.5.1-3.5.3 | Real, distinct eigenvalues |
| 3/26 | 3.5.4 | Complex eigenvalues |
| 4/7 | 3.5.1-3.5.5 | Phase plane |
| 4/9 | Matrix exponential | |
| 4/14 | 3.6.1 | Variation of parameters |
| 3.2 | Order = dimension | |
| 4/16 | 4.1 | Homogeneous 2nd order ODEs |
| 4.2.2 | Undetermined coefficients | |
| 4/21 | 4.3 | Oscillators |
| 4.3 | Driven oscillators | |
| 4/23 | 5.2-5.3 | Laplace transform methods |
| 5.3 | Repeated and complex poles | |
| 4/28 | 5.5 | Convolutions, transfer functions |
| 4/30 | 6.2 | Autonomous scalar ODEs |
| 6.1 | Separable equations | |
| 5/5 | 6.3.1 | Logistic equation |
| 5/7 | Direction fields | |
| Linearization | ||
| 5/12 | Limit cycles | |
| 5/14 | Review |


Call for calm after taxi association chairperson shot dead in Cape Town
by Jenni EvansThe Western Cape government has called for calm among taxi associations after the chairperson of the Bellville chapter of the Cape Amalgamated Taxi Association (CATA) was shot dead on Tuesday night.
Provincial transport MEC Bonginkosi Madikizela strongly condemned the murder of Tyhilile Elliot Mqhele in Bellville.
He asked that the leadership of the SA National Taxi Council urge their members to not retaliate.
In a statement, his office said he had also asked for extra police visibility in Bellville and Kraaifontein because the situation was tense.
Police spokesperson Captain FC Van Wyk said police were investigating the circumstances of a shooting at 16:19 outside a furniture shop in Durban Road on Tuesday.
"A murder case was opened for investigation. Anyone with information about this incident is kindly requested to contact Crime Stop on 08600 10111," said Van Wyk.
Madikizela said efforts must be made to avoid a spiral of violence and revenge attacks.


Find your match!
Survey Questions
About You
Name (Required)
Link to your picture (Required)
How do you define yourself?
Statement 1: "Netflix and Chill" is my type of plan
1 (Strongly Disagree!)
2
3
4
5 (Strongly Agree!)
Statement 2: Hiking and be outdoors suit me well
1 (Strongly Disagree!)
2
3
4
5 (Strongly Agree!)
Statement 3: I charge my batteries by talking to people and being social
1 (Strongly Disagree!)
2
3
4
5 (Strongly Agree!)
Statement 4: I define myself by the things I own.
1 (Strongly Disagree!)
2
3
4
5 (Strongly Agree!)
Statement 5: I rely more on my experience than my imagination.
1 (Strongly Disagree!)
2
3
4
5 (Strongly Agree!)
Statement 6: Truth is more important than people's sensitivities.
1 (Strongly Disagree!)
2
3
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5 (Strongly Agree!)
Statement 7: My mind is always buzzing with unexplored ideas and plans.
1 (Strongly Disagree!)
2
3
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5 (Strongly Agree!)
Statement 8: I find it easy to stay relaxed and focused even when there is some pressure.
1 (Strongly Disagree!)
2
3
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5 (Strongly Agree!)
Statement 9: I rarely do something just out of sheer curiosity.
1 (Strongly Disagree!)
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5 (Strongly Agree!)
Statement 10: People can rarely upset me.
1 (Strongly Disagree!)
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5 (Strongly Agree!)
Find me a match!!


Chest Excercises
Push Up
- Place your hands firmly on the ground, directly under shoulders.

- Draw Shoulder blades back and down, keeping elbows tucked close to your body.
- Exhale as you push back to the starting position.
Dips
- Hold your body with arms locked above the bars.
- Lower your body slowly while leaning forward, flare out elbows.
- Raise your body the bars until your arms are almost locked.
Incline Push Up
- Stand facing bench or sturdy elevated platform.
- Place hands on edge of bench or platform, slightly wider than shoulder width.
- slowly lower your body until your chest almost touches the bench.
- Push body up until arms are extended.
Decline Push Up
- Use a bench to elevate your feet.
- Put your hands slightly wider than shoulder-width.
- Slowly lower your body until your almost touches the ground.
- Raise your until you almost lock your elbows.


Let's examine how covariance behaves. In the next two sections we will use our observations to calculate variances of sample sums.
Establishing properties of covariance involves simple observations and routine algebra. We have done some of it below, and we expect that you can fill in the rest.
Recall that the covariance of $X$ and $Y$ is
$$ Cov(X, Y) ~ = ~ E(D_XD_Y) ~ = ~ E[(X - \mu_X)(Y - \mu_Y)] $$That title has a "duh" quality. But it's still worth noting that for any constant $c$, $$ Cov(X, c) = 0 $$
Covariance is an extension of the concept of variance, because
$$ Var(X) = E(D_X^2) = E(D_XD_X) = Cov(X, X) $$The variance of $X$ is the covariance of $X$ and itself.
Clearly $Cov(Y, X) = Cov(X, Y)$. It follows that
$$ Var(X + Y) = Var(X) + Var(Y) + 2Cov(X, Y) = Var(X) + Var(Y) + Cov(X, Y) + Cov(Y, X) $$This way of thinking about the variance of a sum will be useful later.
Covariance is an expected product: it is the expected product of deviations. It can also be written in terms of the expected product of $X$ and $Y$, as follows.
\begin{align*} Cov(X, Y) &= E[(X - \mu_X)(Y - \mu_Y)] \\ &= E(XY) - E(X)\mu_Y - \mu_XE(Y) + \mu_X\mu_Y \\ &= E(XY) - \mu_X\mu_Y \end{align*}So covariance is the mean of the product minus the product of the means. Take $X = Y$ to get the familiar fact that variance is the mean of the square minus the square of the mean.
This result simplifies proofs of facts about covariance, as you will see below. But as a computational tool, it is only useful when the distributions of $X$ and $Y$ are very simple – for example, when each has just a few possible values. In other calculations of covariance it is rarely a good idea to try to use this result. Rather, we will use the properties below.
A routine application of the property above shows that for any random variables $X$, $Y$, and $Z$,
$$ Cov(X+Y, Z) ~ = ~ Cov(X, Z) + Cov(Y, Z) $$Just write $Cov(X+Y, Z) = E[(X+Y)Z] - E(X+Y)E(Z)$, expand both products, and collect terms.
This is the key to using covariance. First, easy algebra shows that for constants $a$ and $b$, $$ Cov(aX, bY) = abCov(X, Y) $$
Put this together with the addition rule to get
$$ Cov(aX + bY, cZ) = acCov(X, Z) + bcCov(Y, Z) $$You can see that covariance behaves like products. By induction,
$$ Cov(\sum_{i=1}^n a_iX_i, \sum_{j=1}^m b_jY_j) ~ = ~ \sum_{i=1}^n\sum_{j=1}^m a_ib_jCov(X_i, Y_j) $$That might look intimidating, but in fact this property greatly simplifies calculation. It says that you can expand covariance like the product of two sums. For example,
$$ Cov(10X - Y, 3Y + Z) = 30Cov(X, Y) + 10Cov(X, Z) - 3Cov(Y, Y) - Cov(Y, Z) $$You can replace $Cov(Y, Y)$ by $Var(Y)$.
These properties simplify calculations.  Indeed it's not easy to understand covariance physically as it has nasty units: for example, if $X$ is a weight in kilograms and $Y$ is height in centimeters, then the units of covariance is kilogram centimeters. Later in the course we will see how to normalize covariance to get the correlation coefficient that you used so often in Data 8. For now, here is a property that begins to show you that covariance can be helpful in quantifying dependence and independence.
Let $X$ and $Y$ be independent. Then
\begin{align*} E(XY) &= \sum_x\sum_y xyP(X=x, Y=y) ~~~~~~ \text{(expectation of a function)} \\ &= \sum_x\sum_y xyP(X=x)P(Y=y) ~~~~ \text{(independence)} \\ &= \sum_x xP(X=x) \sum_y yP(Y=y) \\ &= E(X)E(Y) \end{align*}Therefore if $X$ and $Y$ are independent, then $Cov(X, Y) = 0$. We say that $X$ and $Y$ are uncorrelated.
We have shown that independent random variables are uncorrelated. But it is not true that uncorrelated random variables have to be independent. You will show this in an exercise.


After sampling some of the fine example programs included in the BlitzBasic package you are hopefully itching to try some of your own code.
BlitzBasic is intended as both a friendly introduction to programming computers as well as a language capable of producing polished video game software.
First up, the traditonal hello world program. A simple one line program that prints the message "hello world" on the screen. Select the File-New menu option and enter the following text:
| Print "Hello World!" |
If you press the F5 key to compile and run and a message greeting the world appears then congratulations! you have just authored your first BlitzBasic program.
The following code illustrates prompting the user of your program for some input.
| a=Input("enter a
number sweety:") Print "the value of a is " + a |
Note: see how we add text and an integer variable together to print them both on the same line.
Variables in Blitz are used to store integers, floats and strings.
The first time a float or a string variable is used in your program it must be denoted with # or $ symbols .
If the "a=" in the program is changed to "a$=" Blitz will treat a as a string variable which can then contain any text the user enters instead of the integer number it originally converted the user's reply into.
| a$=Input("enter a
number sweety:") Print "the value of a is " + a |
Suggestion: change the "a$=" to "a#=" and enter the number 22.95. What's going on?
The following program gives the user 5 turns to guess the random number.
| ;
guessing game turnsleft=5 sheep=Rnd(20) While (turnsleft>0)
Wend If turnsleft=0 Then Print "game over dude" Else Print "good guess!" |
There are three variables used in this program: turnsleft, sheep and guess.
To begin with, turnsleft is set to 5 and sheep is set to a random number between 0 and 20. The program then enters a "while" loop asking the player to guess a number, and comparing their answer which is placed in the variable guess with the value in sheep.
After playing the game a few times, you may notice that the number of sheep does not vary much. Try adding the following line to the top of the program to "seed" the random number generator using the time of day in milliseconds.
| SeedRnd MilliSecs() |
Congratulations, you have just doubled the playability of the game with one line of code!
BlitzBasic is not designed for building text based application such as our initial guessing game. It is also not designed for building applications featuring friendly graphics user interfaces filled with windows and sliders.
The only thing BlitzBasic has been designed for is the very serious business of video game development.
The following program initializes a 640x480 video display then plots points at random positions until the user presses the escape key.
| ; getting
graphic Graphics 640,480 While Not KeyDown(1)
Wend |
Once again we rely on the random number generator to provide an interesting result. Try adding the following color command before the plot statement to vary the color of the dots.
| Color Rnd(256),Rnd(256),Rnd(256) |
Although this may seem like a simple program, creating a DirectX display such as featured here using traditional methods can be a complex task. BlitzBasic makes it so easy!
The following code illustrates the typical "main loop" of a game. For a video game to display smoothly animated graphics it must use a technique called "Double Buffering".
The following program shows one frame (the FrontBuffer) while drawing to another frame (the BackBuffer).
| ; double
buffering Graphics 640,480 SetBuffer BackBuffer() While Not KeyDown(1)
Wend |
In BlitzBasic the Flip command performs the double buffering by swapping the back and front buffers. The Cls command clears the screen and the Line command draws a line.
Note: the flip command also synchronizes to the video refresh which on standard VGA monitors is 60 frames per second.
The program draws a line from the center of the screen (320,240) at an angle of a degrees, 100 pixels long.
Try changing the program to add 6 to the value of a. If the frame rate of your monitor is 60 frames per second, and a is incrementing by 6 each frame, in theory it should increment by 360 every second which is equivalent to a complete rotation in the world of degrees.
The following introduces the basic skeleton of a simple video game.
The status variable contains the "state" of the game, which is either displaying a title page or allowing the player to steer round the screen. Extra states such as player dies with cosmic explosion and gameover screen would be added to extend the game further.
Reading through the program, the display is initialized in a similar manned to the previous example using the Graphics and SetBuffer commands. The main loop, then uses the Flip command to perform the double buffering (allowing us to draw to one screen while the other is displayed) and then either prints a message informing the user to press Enter to start or calls the UpdatePlayer() function.
| ; eat the
dots Graphics 640,480 SetBuffer BackBuffer() Global status=0,x#=0,y#=0,speed#=1,dir=1 ; main loop While Not KeyHit(1) ; refresh screen
Wend |
What UpdatePlayer() function you ask? And if the user presses Enter what's this InitGame() function?
Unlike traditional BASIC languages where we would implement these functions as subroutines and call them with the Gosub command BlitzBasic features user defined functions.
Add the following two functions at the bottom of the above program to allow the program to run.
The first function initializes the variables we will need inorder to steer the players rectangle around the screen. Note how these variables have been declared at the top of the program as Global which allows us to access them from inside functions such as InitGame().
Function InitGame()
End Function |
This second function changes the players direction depending on the arrow key they are pressing or the direction of the joystick. The code then moves the players position (x,y) depending on the dir variable which corresponds to up, right, down and left respectively.
Function UpdatePlayer()
End Function |
After adding the InitGame() and UpdatePlayer() code the game should run.
Next it's time to add some deadly rocks and some yummy food.
In order to do this we create some new Types that will hold all the information we need for each rock and food. To begin with these Types will simply hold the x and y position of each rock and food element we create for our game.
Place the following Type declarations at the top of the program.
Type food
End Type Type rock
End Type |
The following code then needs to be added to the InitGame() function, insert it after the line that reads status=1.
This code creates 20 rocks that will kill the player and 20 food that will speed the player up. The New command creates a new object and also adds it to a list. We set the position of each rock and food by setting the x and y fields of each new object created using the backslash \ character to denote which field.
For i=0 To 20
Next For i=0 To 20
Next |
We now need a function that draws all the food and rocks each frame and checks if the player has collided with any.
Note how we can loop through each food and rock element that exist using the For..Each command pair. This is another great feature of BlitzBasic that keeps programs simple and easy to read.
We use the RectsOverlap command to check of the players position (x,y) collides with each food or rock element (f \ x , f \ y) or (r \ x , r \ y). If the player collides with some food we delete that piece of food and increase the player's speed. If the player collides with a rock we end the game by resetting the status variable.
Function UpdateRocksandFood()
End Function |
Oops, one last thing, don't forget to call the UpdateRocksandFood() function from the main loop, just after the UpdatePlayer() call should do nicely.
| UpdateRocksandFood() |
OK, after playing the game, a few things should become evident.
First, the player should die if they hit the outer wall. We could do this by checking if their position does not collide with the main screen rectangle (0,0,640,480). Try adding the following code to the UpdatePlayer function.
| If Not RectsOverlap(x,y,10,10,0,0,630,470) status=0 |
Secondly, each time the game starts more rocks and food appear. This is because we never delete the food and rocks remaining from the last game. Insert the following code before the code that creates the new food and rocks in the InitGame() function.
| For f.food=Each food Delete f Next For r.rock=Each rock Delete r Next |


Core Topics
Advanced Topics
Misc
Tools
HTML-to-Mithril Template Converter
If you already have your HTML written and want to convert it into a Mithril template, you can use the tool below for one-off manual conversion.
Automatic HTML-to-Mithril Template Converter
There's a tool called MSX by Jonathan Buchanan that allows you to write templates using HTML syntax, and then automatically compile them to Javascript when files change.
It is useful for teams where styling and functionality are done by different people, and for those who prefer to maintain templates in HTML syntax.
The tool allows you to write code like this:
todo.view = function() {
return <html>
<body>
<input onchange={m.withAttr("value", app.vm.description)} value={app.vm.description()}/>
<button onclick={app.vm.add}>Add</button>
</body>
</html>
};
Note, however, that since the code above is not valid Javascript, this syntax can only be used with a preprocessor build tool such as the provided Gulp.js script.
This tool is also available as a Rails gem, created by Jordan Humphreys.
Mithril Template Compiler
You can pre-compile Mithril templates to make them run faster. For more information see this page:
Typescript Support
There's a type definition file that you can use to add Mithril support to Typescript
You can use it by adding a reference to your Typescript files. This will allow the compiler to type-check calls to the Mithril API.
/// <reference path="mithril.d.ts" />
Internet Explorer Compatibility
Mithril relies on some ECMAScript 5 features, namely: Array::indexOf
, Array::map
and Object::keys
, as well as the JSON
object. Internet Explorer 8 lacks native support for some of these features.
The easiest way to polyfill these features is to include this script:
<script src="https://cdnjs.cloudflare.com/ajax/libs/es5-shim/4.0.3/es5-shim.min.js"></script>
This will provide all the polyfills required for the browser. You can alternatively include only specific polyfills:
<script src="http://cdn.polyfill.io/v1/polyfill.min.js?features=Array.prototype.indexOf,Object.keys,Function.prototype.bind,Array.prototype.forEach,JSON"></script>
You can also use other polyfills to support these features in IE7.
ES5 Shim or Mozilla.org's Array::indexOf, Array::map and Object::keys
Mithril also has a dependency on XMLHttpRequest. If you wish to support IE6, you'll need a shim for it. IE7 and lower do not support cross-domain AJAX requests.
In addition, note that most m.route
modes rely on history.pushState
in order to allow moving from one page to another without a browser refresh. IE9 and lower do not support this feature and will gracefully degrade to page refreshes instead.


E&S Wolves Podcast - Episode 135: Time for Wolves to pop their cherry?
The E&S Wolves Podcast is back as Joe Edwards and Nathan Judah return after the international break
by Nathan JudahThe duo break down all the talking points ahead of the big game at Bournemouth.
Steve Bull gives his verdict on the January transfer window and plays agony aunt in the new segment 'Dear Bully'
All your questions are answered and we speak to Sam Davis from the Bournemouth 'Back of the Net' podcast.
All this and much much more!


|
ArUco Unity
0.1.0
OpenCV's ArUco Marker Detection module adapted for Unity 5.
|
Manages a list of ArucoObject. More...
Inherits ArucoUnity.Utility.ArucoObjectDetector.
Inherited by ArucoUnity.ArucoTracker.
Public Member Functions | |
| delegate void | ArucoObjectEventHandler (ArucoObject arucoObject) |
| delegate void | DictionaryEventHandler (Aruco.Dictionary dictionary) |
| virtual void | Add (ArucoObject arucoObject) |
| Add an ArUco object to the ArucoObjects list. More... | |
| virtual void | Remove (ArucoObject arucoObject) |
| Remove an ArUco object to the ArucoObjects list. More... | |
| virtual HashSet< T > | GetArucoObjects< T > (Aruco.Dictionary dictionary) |
| Public Member Functions inherited from ArucoUnity.Utility.ArucoObjectDetector | |
| delegate void | ArucoObjectDetectorEventHandler () |
Protected Member Functions | |
| override void | Awake () |
| Initialize the properties. More... | |
| virtual void | Start () |
| Add to the ArucoObjects list the ArUco objects added from the editor array arucoObjects. More... | |
| virtual void | ArucoObject_PropertyUpdating (ArucoObject arucoObject) |
| Before the ArUco object's properties will be updated, remove it from the ArUco objects list. More... | |
| virtual void | ArucoObject_PropertyUpdated (ArucoObject arucoObject) |
| Add again the updated ArUco object. More... | |
| Protected Member Functions inherited from ArucoUnity.Utility.ArucoObjectDetector | |
| virtual void | OnDestroy () |
| abstract void | PreConfigure () |
| The configuration content of derived classes. More... | |
| abstract void | ArucoCameraImageUpdated () |
| Called when the camera images has been updated. More... | |
| virtual void | StartDetector () |
| Start the detector. More... | |
| virtual void | StopDetector () |
| Stop the detector. More... | |
Properties | |
| Dictionary< Aruco.Dictionary, Dictionary< int, ArucoObject > > | ArucoObjects [get, protected set] |
| The list of the used ArUco objects. More... | |
| Properties inherited from ArucoUnity.Utility.ArucoObjectDetector | |
| ArucoCamera | ArucoCamera [get, set] |
| The camera system to use for the detection. More... | |
| Aruco.DetectorParameters | DetectorParameters [get, set] |
| The parameters to use for the detection. More... | |
| bool | AutoStart [get, set] |
| Start automatically when the configuration is done. Call alternatively StartDetection(). More... | |
| bool | IsConfigured [get, protected set] |
| True when the detector is ready and configured. More... | |
| bool | IsStarted [get, protected set] |
| True when the detector is started. More... | |
Events | |
| ArucoObjectEventHandler | ArucoObjectAdded = delegate { } |
| When an ArUco object has been added to the list. More... | |
| ArucoObjectEventHandler | ArucoObjectRemoved = delegate { } |
| When an ArUco object has been removed to the list. More... | |
| DictionaryEventHandler | DictionaryAdded = delegate { } |
| When a new dictionary among the ArUco objects has been added. More... | |
| DictionaryEventHandler | DictionaryRemoved = delegate { } |
| When a new dictionary is no more used by any ArUco objects. More... | |
| Events inherited from ArucoUnity.Utility.ArucoObjectDetector | |
| ArucoObjectDetectorEventHandler | Configured = delegate { } |
| Executed when the detector is ready and configured. More... | |
| ArucoObjectDetectorEventHandler | Started = delegate { } |
| Executed when the detector is started. More... | |
| ArucoObjectDetectorEventHandler | Stopped = delegate { } |
| Executed when the detector is stopped. More... | |
Manages a list of ArucoObject.
|
inlinevirtual |
Add an ArUco object to the ArucoObjects list.
| arucoObject | The ArUco object to add. |
|
inlineprotectedvirtual |
Add again the updated ArUco object.
| arucoObject | The updated ArUco object. |
Reimplemented in ArucoUnity.ArucoTracker.
|
inlineprotectedvirtual |
Before the ArUco object's properties will be updated, remove it from the ArUco objects list.
| arucoObject | The updated ArUco object. |
Reimplemented in ArucoUnity.ArucoTracker.
| delegate void ArucoUnity.Utility.ArucoObjectsController.ArucoObjectEventHandler | ( | ArucoObject | arucoObject | ) |
|
inlineprotectedvirtual |
Initialize the properties.
Reimplemented from ArucoUnity.Utility.ArucoObjectDetector.
Reimplemented in ArucoUnity.ArucoTracker.
| delegate void ArucoUnity.Utility.ArucoObjectsController.DictionaryEventHandler | ( | Aruco.Dictionary | dictionary | ) |
|
inlinevirtual |
| T | : | ArucoObject |
|
inlinevirtual |
Remove an ArUco object to the ArucoObjects list.
| arucoObject | The ArUco object to remove. |
|
inlineprotectedvirtual |
Add to the ArucoObjects list the ArUco objects added from the editor array arucoObjects.
Reimplemented in ArucoUnity.ArucoTracker.
|
getprotected set |
The list of the used ArUco objects.
| ArucoObjectEventHandler ArucoUnity.Utility.ArucoObjectsController.ArucoObjectAdded = delegate { } |
When an ArUco object has been added to the list.
| ArucoObjectEventHandler ArucoUnity.Utility.ArucoObjectsController.ArucoObjectRemoved = delegate { } |
When an ArUco object has been removed to the list.
| DictionaryEventHandler ArucoUnity.Utility.ArucoObjectsController.DictionaryAdded = delegate { } |
When a new dictionary among the ArUco objects has been added.
| DictionaryEventHandler ArucoUnity.Utility.ArucoObjectsController.DictionaryRemoved = delegate { } |
When a new dictionary is no more used by any ArUco objects.


Project Censored Sun Aug 2 17:42:40 2015 GMT » FEED SITE
Abby Martin The Global Environmental Crisis Dr. Carl Jensen, Founder of Project Censored, Memorial Service The Myth of Clean and Safe Nuclear Technologies– Holding the Nuclear Industry Responsible for ... 25. “Watching Over Us” 24. “Fetal Traffic” 23. “Government in Exile?” 22. “Smoke Detectors: A Fad With Fallout” 21. “The Bakke Case: A Whitewash?” 20. “Dangers of Estrogen Replacement Therapy”


Table of Contents
Goals
- Predict statistical causes of wildfires in the United States of America. [x]
- Conduct EDA of dataset. [x]
- Compare and evaluate different prediction models. [x]
- Find prediction values at various sample sizes. [ ]
Introduction
This dataset is a spatial database of historical wildfires in the United States from 1992 to 2015. The dataset is generated to support the Fire Program Analysis (FPA) system. In using this I aim to see if I can predict the statistical causes of wildfires? Moreover I also conduct Exploratory Data Analysis (EDA) to discover and observe frequencies of fires as their locations.
Kaggle Notebook: https://www.kaggle.com/jamesonthai/predicting-statistical-causes-of-historic-wildfire
Data Source: https://www.kaggle.com/rtatman/188-million-us-wildfires
Citation: Short, Karen C. 2017. Spatial wildfire occurrence data for the United States, 1992-2015 [FPAFOD20170508]. 4th Edition. Fort Collins, CO: Forest Service Research Data Archive. https://doi.org/10.2737/RDS-2013-0009.4
Notebook
You can download and run the notebook as it. Some of the required packages include plotly, json, pandas, sqlite3, scikit-learn, xgboost, random forests, and numpy.
Prediction
The results are as follows, because the file size for the notebook is limited, I moved some of the other models to a different section which will be uploaded.
| Task | RF | xgBoost | Logistic Regression | SVM |
|---|---|---|---|---|
| 13 categories | | | | |
| | | | | |
| | | | | |
| Task | Random Forests | XGBoost | Logistic Regression | SVM | |-|—————-|———|——————– | — | | 13 categories | 59% | 60% | | | | 3 categories | n/a | 81% | | |
- Specifically for the 3 categories in Random Forests, it crashed. Currently trying to find a workaround.
Graphs
– IN Progress –
U.S.A. County Fires
These graphs look at the number of reported county fires from 1992 to 2015.
- This animated graph displays the number of reported county fires from 1992 to 2015 by year. The information is broken down by state and further broken down by the counties for every year.
- This second graphs displays the total number of reported county fires from 1992 to 2015.
U.S.A. Wildfires by State
- From 1992 to 2015, California has the highest number of reported wildfires followed by Georgia and Texas. This includes both causes known and unknown.
Statistical Causes of Fires
- A colorful chart however it is pretty interesting to look up the makeup of reported fires causes by year. Each color scheme represents the statistical cause and all of these are stacked up to represent the total number of reported fires with a statistical cause.
Acres burned
- Another animated chart however it visualizes how many acres were burned per year by each statistical cause. As the graph constantly shifts, so does the number of acres by each fire.
Correlations between predicted variables
- Correlations between prediction variables, this information is used for the random forest tree.
Feature Importance
- In Progress => Grabbing images…
Conclusion
We can predict wildfires with around 60% accuracy across the 13 statistical causes. If we reduce the number of classification categories to natural, human, and other causes we can achieve around 81% accuracy! Ultimately fires in the United States are having an upward trend and are seemily becoming more frequent in states like California, North Carolina, and Arizona.


You can upload a Chest X-Ray to see the severity of Lung damage
This is a web interface for a deep learning model which can predict severity of damage caused to lungs due to Covid. The model takes and X-Ray image of Chest and tries to predict lung opacity. We are also trying to provide a visualisation of which region the model considers as the deciding factor.
The following are the links to the research paper and repository
This is not for medical use. Images are saved without any other trackable information.


Users
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Launching this company or developing the market position of an existing one can be quite an overwhelming processs at times.
"Our mission here at Aria is to find Your home which comforts you. We provide the best service. To find perfect house for you, is our first responsibility "
The starting point is to feel the necessity of finding a destiny in rent.
After completing the environmental analysis the next stage is to design and plan our development strategy. Databse planning was also an important part.
In this phase, we focused on executing the actions plan and build the system.
Perfect house for Bachelor
Rent BDT-15000 tk
Perfect house for Family House
Rent BDT 50000 tk
Dream Home
Rent BDT 1500 tk
Aria provides the most innovative and customized services in this online renting industry. Our Services section shows how flexible we are for all types of budgets.
We strive to achieve 100% customer satisfaction for both types of customers. Types of customers: with huge potential
Our goal is to help you to achieve its full potential and establish long term stability for the stakeholders
We worked as a team to build this project
Md Habibur Rahman
2017831002
Gourab Saha
2017831004
Mohammad Noor Uddin
2017831027
Our goal is to provide the right srvice to the customes.We recommend our website as the best to find your home
If you have any query or any suggestion please contact with us. We always appriciate your opinions.
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