| Type | Performance |
| Abstract |
Adaptive learning is a research branch of e-learning, which supports personalization in study. Thus, adaptive learning system has ability to change its action to provide learning content and pedagogic environment/method for every student in accordance with her/his individual characteristics such as knowledge, learning styles, interests, etc. Student’s characteristics are structured as so-called user model and the so-called user modeling system is responsible for managing such user model. User modeling system is the heart of adaptive learning. This research proposes a novel user modeling system named Zebra which manipulates students’ characteristics in the effective way. Moreover, Zebra provides powerful inference mechanism for reasoning out new information about students in order to support adaptive learning in the best way. Zebra is implemented as computer software and so, the purpose of this paper is to introduce Zebra – a novel and powerful user modeling system. Keywords: user modeling system, user model, adaptive learning. |
| At |
The 17th International Conference on Interactive Computer aided Learning (ICL2014), The 2014 World Engineering Education Forum, Engineering Education For A Global Community. Place and date: Dubai International Convention and Exhibition Centre, Dubai, UAE, December 3-6, 2014. Websites: http://icl-conference.org/icl2014, http://weef2014.org |
| Identifiers | |
| Links |
http://www.locnguyen.net/st/dissertations/zebra http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=7017887 |
| Citations | Nguyen, L. (2014, December 5). A User Modeling System for Adaptive Learning. (L. Nguyen, Director, & L. Nguyen, Performer) The 17th International Conference on Interactive Computer aided Learning (ICL2014), The 2014 World Engineering Education Forum, Engineering Education For A Global Community, Dubai, UAE. |
| Cited | |
| Indexed | |
| Metrics | |
| Categories | Computer Science, Education |
| Type | Presentation, Demonstration |
| Abstract |
Recommendation algorithm is very important for e-commercial websites when it can recommend online customers favorite products, which results out an increase in sale revenue. I propose the framework of e-commercial recommendation algorithms. This is a middleware framework or “operating system” for e-commercial recommendation system, which support scientists and software developers build up their own recommendation algorithms based this framework with low cost, high achievement and fast speed. Keywords: recommendation algorithm, middleware framework. |
| At | The European Project Space at The 7th International Conference on Knowledge Discovery and Information Retrieval (KDIR 2015), Lisbon, Portugal, November 2015. |
| Identifiers | |
| Links | http://www.locnguyen.net/st/products/hudup |
| Citations | Nguyen, L. (2015, November 13). A Framework of E-commercial Recommendation Algorithms. (L. Nguyen, Director, & L. Nguyen, Performer) The European Project Space, Lisbon, Portugal. Retrieved from http://www.ic3k.org/RDCommunity.aspx?y=2015 |
| Cited | |
| Indexed | The European Project Space |
| Metrics | |
| Categories | Computer Science |
| Type | Presentation |
| Abstract |
Recommendation algorithm is very important for e-commercial websites when it can recommend online customers favorite products, which results out an increase in sale revenue. I propose the framework of e-commercial recommendation algorithms. This is a middleware framework or “operating system” for e-commercial recommendation system, which support scientists and software developers build up their own recommendation algorithms based this framework with low cost, high achievement and fast speed. Keywords: recommendation algorithm, middleware framework. |
| At | Saigon Hi-Tech Park Incubation Center (SHTP-IC), Ho Chi Minh city, Vietnam, November, 2013. |
| Identifiers | |
| Links | http://www.locnguyen.net/st/products/hudup |
| Citations | Nguyen, L. (2013, November). A Framework of E-commercial Recommendation Algorithms. (L. Nguyen, Director, & L. Nguyen, Performer) Saigon Hi-Tech Park Incubation Center (SHTP-IC), Ho Chi Minh, Vietnam. |
| Cited | |
| Indexed | |
| Metrics | |
| Categories | Computer Science |
| Type | Exhibition |
| Abstract |
Recommendation algorithm is very important for e-commercial websites when it can recommend online customers favorite products, which results out an increase in sale revenue. I propose the framework of e-commercial recommendation algorithms. This is a middleware framework or “operating system” for e-commercial recommendation system, which support scientists and software developers build up their own recommendation algorithms based this framework with low cost, high achievement and fast speed. Keywords: recommendation algorithm, middleware framework. |
| At |
The 2013 conference “Approaches to Foreign Capital for Enterprises”, Vietnam Chamber of Commerce and Industry (VCCI). Place and date: Vietnam Chamber of Commerce and Industry (VCCI), Ho Chi Minh city, Vietnam, October 17, 2013. |
| Identifiers | |
| Links | http://www.locnguyen.net/st/products/hudup |
| Citations | Nguyen, L. (2013, November 17). A Framework of E-commercial Recommendation Algorithms. (L. Nguyen, Director, & L. Nguyen, Exhibitor) The 2013 conference “Approaches to Foreign Capital for Enterprises”, Vietnam Chamber of Commerce and Industry (VCCI), Ho Chi Minh, Vietnam. |
| Cited | |
| Indexed | |
| Metrics | |
| Categories | Computer Science |
| Type | Introduction |
| Abstract |
Recommendation algorithm is very important for e-commercial websites when it can recommend online customers favorite products, which results out an increase in sale revenue. I propose the framework of e-commercial recommendation algorithms. This is a middleware framework or “operating system” for e-commercial recommendation system, which support scientists and software developers build up their own recommendation algorithms based this framework with low cost, high achievement and fast speed. Keywords: recommendation algorithm, middleware framework. |
| At |
The 2013 Doctoral Symposium, University of Science. Place and date: University of Science, Ho Chi Minh city, Vietnam, November, 2013. |
| Identifiers | |
| Links | http://www.locnguyen.net/st/products/hudup |
| Citations | Nguyen, L. (2013, November). A Framework of E-commercial Recommendation Algorithms. (L. Nguyen, Director, & L. Nguyen, Introducer) University of Science, Ho Chi Minh, Vietnam. |
| Cited | |
| Indexed | |
| Metrics | |
| Categories | Computer Science |
Last updated April 2016


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Are you sure you want to publish {{survey.name}}?
Surveys must be published before they can be run, but cannot be edited once they've been published.


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Susy is a grid system for web designers. Built on the techniques of Natalie Downe, the Compass authoring framework, and the Sass meta-language for CSS, Susy brings together the unique semantic control of hand-written code with the speed of a framework and the strength needed for a bullet-proof design. With Susy you can build quick, custom grids that respond to the needs of the user without giving up design integrity. It's elastic, it's fluid, it's Susy.
Susy is an open source project envisioned and maintained by the OddBird Collective: Eric Meyer, Carl Meyer and Jonny Gerig Meyer, all of whom would love to chat sometime. Give them a ring.


All Conservative election candidates pledge to back my Brexit deal: UK PM Boris Johnson
Johnson struck a last-minute Brexit deal with the European Union last month, as the bloc granted the third delay to the divorce
British Prime Minister Boris Johnson has said that all Conservative Party candidates in the December 12 election have pledged to back his Brexit deal, opening the door to getting the agreement passed through parliament if the party were to win a majority.
"All 635 Conservative candidates standing at this election, every single one of them, has pledged to me that if elected they will vote in Parliament to pass my Brexit deal so we can end the uncertainty and finally leave the EU," Johnson told the Telegraph newspaper in an interview published late on Saturday.
"I am offering a pact with the people: if you vote Conservative you can be 100 per cent sure a majority Conservative government will unblock Parliament and get Brexit done."
Johnson struck a last-minute Brexit deal with the European Union last month, as the bloc granted the third delay to the divorce that was originally supposed to take place on March 29. Voters in the 2016 referendum narrowly voted in favour of leaving the EU.
Commenting separately on his tax policy, the prime minister told the newspaper that tax cuts can boost the economy, but added that he is delaying plans to increase the 40 per cent tax rate threshold, stating that the aim is to first "lift the burden" for low-income groups.
"We do want to reduce the burden of taxation," Johnson said. "That's very much our ambition, but we won't do that until we have done more to lift the burden particularly on people on low incomes."
Opinion polls published on Saturday showed that Johnson's Conservatives have the highest level of support since 2017, with the party leading opposition Labour by 10-17 percentage points in four polls.
However, analysts have warned that Brexit, which has divided parties and their voters, could make the result of the coming vote highly unpredictable.


A.P.J. Abdul Kalam
Bharat Ratna
Know his life in 10 points:
- APJ Abdul Kalam’s Childhood
The great scientist, former President of the country and 'Bharat Ratna' APJ Abdul Kalam was born on 15 October 1931 in Rameshwaram (Tamil Nadu) to a poor Tamilian Muslim family. APJ Abdul Kalam used to sell newspapers to support family’s income in childhood. He received his early education from 'Schwartz Higher Secondary School' in Ramanathapuram.
- Wanted to be IAF Pilot
APJ Abdul Kalam was an average student in his class but had deep interest in mathematics. In 1954, Kalam completed his graduation in Physics from St. Joseph's College in Tiruchirappalli (affiliated to Madras University). He wanted to join Indian Air Force (IAF) as a fighter pilot. Once he applied in IAF and got ninth rank in merit list while vacancies were only eight.
- Birds became inspiration
Once as a President, he went to a school in Mumbai, when asked by a child, he told that he got an inspiration of flying high from the birds. Dr. Kalam received a degree in aeronautical engineering from Madras Engineering College in 1960.
- India’s Missile Man
India built its first indigenous satellite launch vehicle SLV-3 under Dr. Kalam's direction. He also helped India to built missiles like ‘Agni’ and ‘Prithvi’. Dr. Kalam is famous as Missile Man of India because of his major contribution in the same field.
- APJ Abdul Kalam and Vision 2020
Dr. APJ Abdul Kalam prepared a vision 2020 document so that India can become a superpower in the field of science and technology. According to his plan, medium range missiles should have developed. He also wanted to make Anti Tank Missiles, Ground to Air and Reintree Experiment Launch Vehicle (Rex).
- Books by Dr. Kalam
Dr. APJ Abdul Kalam received doctorate degree from more than 40 universities. He has written many books and some of them are - Wings of Fire, India 2020, Ignited Maid, My Journey among others.
- Awards and Recognitions
Dr. APJ Abdul Kalam was awarded the country's highest civilian honor, the Padma Bhushan in 1981 and then the Padma Vibhushan in 1990 and the Bharat Ratna in 1997. Kalam is the third President of the country who received the Bharat Ratna before his appointment to the highest post of India. Dr. Sarvapalli Radhakrishnan and Zakir Hussain received this honour before him.
- Teaching after President of India
Dr. APJ Abdul Kalam never left his passion of study and connection with education. He became visiting professor at the Indian Institute of Management Shillong, an honorary fellow of Indian Institute of Science, Bangalore and visiting professor at the Indian Institute of Management Indore after leaving office of President of India.
- Dr. Kalam’s death
Dr. APJ Abdul Kalam was delivering his last lecture at the Indian Institute of Management Shillong when he experienced some discomfort and collapsed. He was declared dead of a sudden cardiac arrest at 7.45 pm on 27 July 2015.
- APJ Abdul Kalam Memorial
It was built in the memory of great scientist by DRDO in Pei Karumbu, in the island town of Rameshwaram, Tamil Nadu. The replicas of rockets and missiles which Kalam had worked with are on display at this memorial.
There is no success without failure. Failures are just intermittent blockades, Success is the final destination.
Dr. APJ Abdul Kalam
Dr. Kalam's life can not be described in few points. His personality was bigger than mountains, deeper than oceans, brighter than the sun. Follow this link to understand Bharat Ratna A P J Abdul Kalam's life in more depth.


Courses.
15 Nov 2016Topics.
The topics include.:
| SL No. | Topic | Instructor |
|---|---|---|
| 01 | Internet of Things , AI and Machine Learning ( Smart Computing) | Thyagaraju G S |
| 02 | Raspberry Pi and Python Programming Language | Arjun K |
| 04 | Information and Network Security (Cyber Security, Web App Security, Data Security, IoT Security Cloud Security, Ethical Hacking ) | Thyagaraju G S |
| 05 | Mobile Application Development | Amith K S |
| 06 | Web Designing and Development | Amith K S |
| 07 | “Fundamentals of Computer Network” & “Wireless Sensor Networking” | Raghavendra Patil. |
Activities:
- Technical Talks
- Seminars, Workshop
- Training Programs
- Summer Term and Winter Term Courses
- Projects Design and Implementation
- Publication of Research Papers and Patents
- Consultancy
- Entrepreneurship
- Internship
- Conference
- Competitions
Want to see something else added? send a mail to sdmitiot@gmail.com.


Eric Clapton has announced a tribute concert dedicated to Ginger Baker
Late Cream drummer passed away last month
Eric Clapton has announced a tribute concert for Ginger Baker, the late drummer and founder of Cream.
- Read more: Ginger Baker, 1939-2019 – the NME obituary
Entitled ‘Eric Clapton & Friends: A Tribute to Ginger Baker’ the gig will take place at London’s Hammersmith Apollo on February 17, 2020. Tickets go on sale on Friday (November 29) at 10am and can be purchased here.
The show will focus on Clapton and Baker’s work together in the bands Cream and Blind Faith with proceeds going to Leonard Cheshire, the health and welfare charity that aids people living with disabilities. The full lineup of performers is yet to be announced.
Baker’s social media accounts, which are overseen by his daughter Nettie, announced the event with the message: “Very pleased to share this news. Big thank you to @EricClapton.”
Baker passed away last month at the age of 80.
He founded Cream in 1966 with Clapton and bassist Jack Bruce. The trio released four albums including the influential ‘Disraeli Gears’ before splitting in 1968. Baker and Clapton went on to play in Blind Faith with Steve Winwood of Traffic and Family bassist Ric Grech, who lasted only one self-titled album.
After his band Air Force recorded two albums in 1970, Baker released 18 solo albums, most recently ‘Why’ in 2014. He has also made three albums with Fela Kuti. The father-of-three endured a long battle with heroin addiction, telling The Guardian in 2013 he had come off the drug “29 times”.
Tributes were paid to Baker, from the likes of Paul McCartney, his Beatles bandmate Ringo Starr, Mick Jagger, Flea of Red Hot Chili Peppers, Brian Wilson and more.


C syntax:
void phish_send(int iport) void phish_send_key(int iport, char *key, int nbytes) void phish_send_direct(int iport, int receiver)
C examples:
#include "phish.h" phish_send(0); phish_send_key(1,id,strlen(id)); phish_send_direct(0,3);
C++ syntax:
void send(int iport) void send_key(int iport, char *key, int nbytes) void send_direct(int iport, int receiver)
C++ examples:
#include "phish.hpp" phish::send(0); phish::send_key(1,id,strlen(id)); phish::send_direct(0,3);
Python syntax:
def send(iport) def send_key(iport,key) def send_direct(iport,receiver)
Python examples:
import phish phish.send(0) phish.send_key(1,id) phish.send_direct(0,3)
Description:
These are PHISH library functions which can be called from a minnow application. In PHISH lingo, a "minnow" is a stand-alone application which makes calls to the PHISH library.
These functions are used to send datums to other minnows. Before a datum can be sent, it must be packed into a buffer. See the doc page for the phish_pack functions to see how this is done.
All datums are sent via output ports the minnow defines and which the PHISH input script uses to route datums from one set of minnows to another set. Thus these send functions all take an iport argument to specify which output port to send thru.
The specific minnow(s) that the datum will be sent to is determined by the connection style(s) defined for the output port. See the PHISH input script hook command, as discussed on the bait.py tool doc page, for details. Some connection styles require additional information from the minnow to route the datum to the desired minnow. This is the reason for the phish_send_key() and phish_send_direct() variants of phish_send().
The phish_send() function sends a datum to the specified iport output port.
This generic form of a send can be used for all connection styles except the hashed and direct styles. See the PHISH input script hook command for details. Note that multiple sets of receiving minnows, each with their own connection style, can be connected to the same output port.
If phish_send() is used with a hashed or direct connection style, an error will result.
The phish_send_key() function sends a datum to the specified iport output port and allows specification of a byte string or key of length nbytes, which will be hashed by the PHISH library and converted into an index for choosing a specific receiving processor to send the datum to.
This form of sending must be used for a hashed connection style. See the PHISH input script hook command for details. If a connection style to a specific output port is not a hashed style, then the key and nbytes arguments are ignored, and the generic phish_send() form is used to send the datum.
The phish_send_direct() function sends a datum to the specified iport output port and allows a specific receiving minnow to be selected via the receiver argument. The receiver is an integer offset into the set of receiving minnows connected to this output port. If there are M minnows in the receiving set, then 0 <= receiver < M is required. The phish_query function can be used to query information about the receiving set of minnows. For example this phish_query() call would return M, assuming the receiving processors are connected to output port 0.
int m = phish_query("outport/direct",0,0);
This form of sending must be used for a direct connection style. See the PHISH input script hook command for details. If one or more of the connection styles connected to the output port is not a direct style, then the reciever argument is ignored, and the generic phish_send() form is used to send the datum.
Restrictions: none
Related commands:


| Code | Name | Department | Job Level | Position | Gross | Deductions | Netpay |
|---|---|---|---|---|---|---|---|
| EMP-0001 | Juan Dela Cruz | I.T. | Rank & File | Software Engineer | 10,000.00 | 2,000.00 | 8,000.00 |
| EMP-0002 | Pedro Espina | I.T. | Rank & File | Q.A. | 15,000.00 | 5,000.00 | 10,000.00 |
| EMP-0003 | Kevin Santos | I.T. | Managers | Software Development Manager | 12,000.00 | 2,000.00 | 10,000.00 |
| EMP-0004 | Gideon Hernandez | H.R. | N/A | H.R. Assistant | 10,000.00 | 2,000.00 | 8,000.00 |
| EMP-0001 | Angel Locsin | H.R. | Managers | H.R. Manager | 20,000.00 | 2,000.00 | 18,000.00 |


Before Change
sort_f = lambda sid: sid
// Loop through all the sample ids present on the mapping file
for sid in metamap.sample_ids:
if sid not in ord_res.site_ids:
continue
// Get the group for the current sample
g = metamap.get_category_value(sid, vector_category)
// Add the current sample to the group
groups[g].append((sort_f(sid), sid))
// Sort the groups
for g in groups:
groups[g] = signed_natsort(groups[g])
return groups
After Change
// Group by vector_category
metamap_t = metamap.transpose()
gb = metamap_t.groupby(vector_category)
groups = {}
for g, df in gb:
groups[g] = signed_natsort([(sort_val(sid), sid) for sid in df.index])
return groups
def weight_by_vector(vector, w_vector):


JavaScript Intro
String
Goal
Join many strings together to form a complete sentance.
Technologies
JavaScript
Live demo


I am a student of systems and computer engineering at La Universidad de los Andes. I am passionate about sports, technology and being able to work with talented people. I want to work developing software solutions that have an impact on the industry.
I love to carry out my own ideas, to be entrepreneur, proactive and have a good team work. For me, working as a team is: to understand how to motivate people to love the things they do, understand each other, care about each other and
to give constructive criticism to improve.
Here you can find some of the things that I like and projects that I have worked on.
Links of interest: GitHub, Linkedin
Download my resume here.


You can hand out this URL for people to retrieve the keys attached to their email addresses.
{{ Environment.secureBaseUrl }}/claim/g-{{ manageCtrl.game.id }}Not so fast! In order for the users in this key group to gain access, you'll need to email or message their keys to them. Copy each key page individually below, or export the full set to a CSV. Once they've received and claimed the key into their library, their claim date will appear in the table below.
{{ editCtrl.keyGroup.viewed_count || 0 | number }} / {{ editCtrl.keyGroup.key_count || 0 | number }} ({{ editCtrl.keyGroup.viewed_count / editCtrl.keyGroup.key_count * 100 | number:2 }}%)
{{ editCtrl.keyGroup.claimed_count || 0 | number }} / {{ editCtrl.keyGroup.key_count || 0 | number }} ({{ editCtrl.keyGroup.claimed_count / editCtrl.keyGroup.key_count * 100 | number:2 }}%)


Scottish Fairy and Folk Tales, by George Douglas, [1901], at sacred-texts.com
THE fox, being hungry one day, found a bag-pipe, and proceeded to eat the bag, which is generally, or was till lately, made of hide. There was still a remnant of breath in the bag, and when the fox bit it the drone gave a groan, when the fox, surprised but not frightened, said--
"Here is meat and music!" 2
91:2 A popular saying in the West Highlands.


The basic structure to store several elements in a sequence is called
list
in Python and Array
in JavaScript.
| Python | Javascript |
|---|---|
| Creation of list / array # | |
[3, 2, 10, 'Hello'] |
[ 3, 2, 10, 'Hello' ] |
| Constructor-style creation of list / array # | |
['H', 'e', 'l', 'l', 'o', '!'] |
[ 1, 2, 3, 'Hello' ]
[ 1, 2, 3, 'Hello' ]
[ <4 empty items> ]
[ '4' ]
[ 'Hello!' ] |
| Access by index # | |
3
2
'Hello' |
3
2
Hello |
| String indexes # | |
Exception: TypeError list indices must be integers or slices, not str |
2 In JavaScript, Arrays are Objects, and Objects are indexed by strings. Numeric indexes are coerced into strings. |
| Modification of the value of elements of list / array # | |
[100, 2, 10, 'Hello'] |
[ 100, 2, 10, 'Hello' ] |
| Length of list / array # | |
4 |
4 |
| Appending element to list / array # | |
[3, 2, 10, 'Hello', 5] |
[ 3, 2, 10, 'Hello', 5 ] |
| Adding several elements in list / array # | |
[3, 2, 12, 20] |
[ 3, 2, 12, 20 ] |
| Extending list / array with elements of another list / array # | |
[3, 2, 10, 'Hello', 1, 2, 3] |
[ 3, 2, 10, 'Hello', 1, 2, 3 ]reference
[ 3, 2, 10, 'Hello', 1, 2, 3 ]reference
[ 3, 2, 10, 'Hello', 1, 2, 3 ]reference This is the most efficient way to extend an array in case
the
[ 3, 2, 10, 'Hello', 1, 2, 3 ]reference require: es6 |
| Concatenation # | |
[1, 2, 3, 'Hello', 'World'] |
[ 1, 2, 3, 'Hello', 'World' ] |
| Remove array element by index # | |
[2, 15]
15
2 |
[ 2, <1 empty item>, 15 ]
undefined
3 See also splices. |
| Clear list / array # | |
[] |
[] |
| Get element with index out of range # | |
Exception: IndexError list index out of range |
undefined |
| Add element out of range # | |
Exception: IndexError list assignment index out of range |
[ 1, 2, 10, <2 empty items>, 100 ]
undefined
100 |
| Operator in # | |
True
True
True
False
False Operator
True
False
False
True
False If one creates a list-like dictionary (with numeric keys),
operator |
true
false
false
true
true As Array is a subtype of object (i.e. something dict-like), |
| Slices # | |
[20, 30]
[0, 10]
[20, 30, 40, 50, 60]
[20, 30, 40]
[0, 10, 20, 30, 40, 50, 60]
[20, 40]
[40, 30] |
[ 20, 30 ]
[ 0, 10 ]
[ 20, 30, 40, 50, 60 ]
[ 20, 30, 40 ]
[ 0, 10, 20, 30, 40, 50, 60 ]reference There's no slices with step (third argument in Python's) by default in JavaScript. |
| Splice modifications # | |
[0, 10, 200, 300, 400, 40]
[0, 200, 300, 400, 40]
[0, 200, 300, 999, 400, 40] |
[ 0, 10, 200, 300, 400, 40 ]
[ 20, 30 ]
[ 0, 200, 300, 400, 40 ]
[ 0, 200, 300, 999, 400, 40 ]reference Method |
In JavaScript, one can use
Array
function to create an Array (with or without preceedingnew
). If this function receives an integer as the only argument, that integer is interpreted as the length of a newly created Array with empty slots. In other cases (several arguments, one string argument), the arguments become the elements of a newly created Array. Due to inconsistent behaviour of this function and Arrays with empty slots the usage of this method is strongly discouraged, see YDKJS for details.


Since Apache is one of those packages people like to compile themselves while others prefer the bureaucrat’s dream Debian, it is impossible to give guidelines which will work for everyone. Just send some feedback to the mailing list at<EMAIL_ADDRESS>to get this document tailored to your favorite distro.
What’s needed:
-
Have an Apache web-server
On Debian: $ apt-get install apache2 To get apache2 by default started, edit /etc/default/apache2 and set NO_START=0
-
can edit the configuration of it.
This could be found under /etc/httpd, or refer to your Apache documentation.
On Debian: this means being able to edit files under /etc/apache2
-
can restart it.
'apachectl --graceful' might do. If it doesn't, just stop and restart apache. Be warning that active connections to your server might be aborted by this.
On Debian: $ /etc/init.d/apache2 restart or $ /etc/init.d/apache2 force-reload (which seems to do the same) This adds symlinks from the /etc/apache2/mods-enabled to /etc/apache2/mods-available.
-
have permissions to chown a directory
-
have git installed on the client, and
-
either have git installed on the server or have a webdav client on the client.
In effect, this means you’re going to be root, or that you’re using a preconfigured WebDAV server.
Step 1: setup a bare GIT repository
At the time of writing, git-http-push cannot remotely create a GIT repository. So we have to do that at the server side with git. Another option is to generate an empty bare repository at the client and copy it to the server with a WebDAV client (which is the only option if Git is not installed on the server).
Create the directory under the DocumentRoot of the directories served by Apache. As an example we take /usr/local/apache2, but try "grep DocumentRoot /where/ever/httpd.conf" to find your root:
$ cd /usr/local/apache/htdocs
$ mkdir my-new-repo.git
On Debian:
$ cd /var/www
$ mkdir my-new-repo.git
Initialize a bare repository
$ cd my-new-repo.git
$ git --bare init
Change the ownership to your web-server’s credentials. Use "grep User httpd.conf" and "grep Group httpd.conf" to find out:
$ chown -R www.www .
On Debian:
$ chown -R www-data.www-data .
If you do not know which user Apache runs as, you can alternatively do a "chmod -R a+w .", inspect the files which are created later on, and set the permissions appropriately.
Restart apache2, and check whether http://server/my-new-repo.git gives a directory listing. If not, check whether apache started up successfully.
Step 2: enable DAV on this repository
First make sure the dav_module is loaded. For this, insert in httpd.conf:
LoadModule dav_module libexec/httpd/libdav.so
AddModule mod_dav.c
Also make sure that this line exists which is the file used for locking DAV operations:
DAVLockDB "/usr/local/apache2/temp/DAV.lock"
On Debian these steps can be performed with:
Enable the dav and dav_fs modules of apache:
$ a2enmod dav_fs
(just to be sure. dav_fs might be unneeded, I don't know)
$ a2enmod dav
The DAV lock is located in /etc/apache2/mods-available/dav_fs.conf:
DAVLockDB /var/lock/apache2/DAVLock
Of course, it can point somewhere else, but the string is actually just a prefix in some Apache configurations, and therefore the directory has to be writable by the user Apache runs as.
Then, add something like this to your httpd.conf
<Location /my-new-repo.git>
DAV on
AuthType Basic
AuthName "Git"
AuthUserFile /usr/local/apache2/conf/passwd.git
Require valid-user
</Location>
On Debian:
Create (or add to) /etc/apache2/conf.d/git.conf :
<Location /my-new-repo.git>
DAV on
AuthType Basic
AuthName "Git"
AuthUserFile /etc/apache2/passwd.git
Require valid-user
</Location>
Debian automatically reads all files under /etc/apache2/conf.d.
The password file can be somewhere else, but it has to be readable by Apache and preferably not readable by the world.
Create this file by $ htpasswd -c /usr/local/apache2/conf/passwd.git <user>
On Debian:
$ htpasswd -c /etc/apache2/passwd.git <user>
You will be asked a password, and the file is created. Subsequent calls to htpasswd should omit the -c option, since you want to append to the existing file.
You need to restart Apache.
Now go to<EMAIL_ADDRESS>in your browser to check whether it asks for a password and accepts the right password.
On Debian:
To test the WebDAV part, do:
$ apt-get install litmus
$ litmus http://<servername>/my-new-repo.git <username> <password>
Most tests should pass.
A command line tool to test WebDAV is cadaver. If you prefer GUIs, for example, konqueror can open WebDAV URLs as "webdav://…" or "webdavs://…".
If you’re into Windows, from XP onwards Internet Explorer supports WebDAV. For this, do Internet Explorer → Open Location → http://<servername>/my-new-repo.git [x] Open as webfolder → login .
Step 3: setup the client
Make sure that you have HTTP support, i.e. your git was built with libcurl (version more recent than 7.10). The command git http-push with no argument should display a usage message.
Then, add the following to your $HOME/.netrc (you can do without, but will be asked to input your password a lot of times):
machine <servername>
login <username>
password <password>
…and set permissions: chmod 600 ~/.netrc
If you want to access the web-server by its IP, you have to type that in, instead of the server name.
To check whether all is OK, do:
curl --netrc --location -v<EMAIL_ADDRESS>…this should give something like ref: refs/heads/master, which is the content of the file HEAD on the server.
Now, add the remote in your existing repository which contains the project you want to export:
$ git-config remote.upload.url \
<EMAIL_ADDRESS>It is important to put the last /; Without it, the server will send a redirect which git-http-push does not (yet) understand, and git-http-push will repeat the request infinitely.
Step 4: make the initial push
From your client repository, do
$ git push upload master
This pushes branch master (which is assumed to be the branch you want to export) to repository called upload, which we previously defined with git-config.
Using a proxy:
If you have to access the WebDAV server from behind an HTTP(S) proxy, set the variable all_proxy to http://proxy-host.com:port, or http://login-on-proxy:passwd-on-proxy@proxy-host.com:port. See man curl for details.
Troubleshooting:
If git-http-push says
Error: no DAV locking support on remote repo http://...
then it means the web-server did not accept your authentication. Make sure that the user name and password matches in httpd.conf, .netrc and the URL you are uploading to.
If git-http-push shows you an error (22/502) when trying to MOVE a blob, it means that your web-server somehow does not recognize its name in the request; This can happen when you start Apache, but then disable the network interface. A simple restart of Apache helps.
Errors like (22/502) are of format (curl error code/http error code). So (22/404) means something like not found at the server.
Reading /usr/local/apache2/logs/error_log is often helpful.
On Debian: Read /var/log/apache2/error.log instead.
If you access HTTPS locations, git may fail verifying the SSL certificate (this is return code 60). Setting http.sslVerify=false can help diagnosing the problem, but removes security checks.
Debian References: http://www.debian-administration.org/articles/285
Authors Johannes Schindelin<EMAIL_ADDRESS>Rutger Nijlunsing<EMAIL_ADDRESS>Matthieu Moy <Matthieu.Moy@imag.fr>


In this chapter we return to random sampling, in particular to the variability in the sum of a random sample. Binomial and hypergeometric random variables are such sums. Means of random samples are easily calculated once we have the sample sum. So it is worth taking some time to understand how sample sums behave.
By Chebychev's inequality, the value of a random variable $X$ is most likely to be in the range "$E(X) \pm$ a few $SD(X)$". The measure of spread $SD(X)$ is the root mean squared deviation of $X$ from the mean:
$$ SD(X) = \sqrt{E[(X-E(X))^2]} $$Variance is the square of the standard deviation. We know that variance has better computational properties than the SD, so this chapter will focus on ways to find variance. We will use some familiar shorthand:
Let $D_X = X - \mu_X$ denote the deviation of $X$ from its mean. Then
$$ Var(X) = \sigma_X^2 = E(D_X^2) $$Let $X$ and $Y$ be two random variables on the same space, and let $S = X+Y$. Then $E(S) = \mu_X + \mu_Y$, and the deviation of $S$ is the sum of the deviations of $X$ and $Y$:
$$ D_S ~ = ~ S - \mu_S ~ = ~ X + Y - (\mu_X + \mu_Y) ~ = ~ D_X + D_Y $$This gives us some insight into the variance of the sum $S$.
\begin{align*} Var(S) &= E(D_S^2) \\ &= E[(D_X + D_Y)^2] \\ &= E(D_X^2) + E(D_Y^2) + 2E(D_XD_Y) \\ &= Var(X) + Var(Y) + 2E(D_XD_Y) \end{align*}The first thing to note is that while the expectation of a sum is the sum of the expectations, the calculation above shows that the variance of a sum is in general not the sum of the variances. There's an extra term.
To calculate the variance of a sum, we have to understand that extra term.
The covariance of $X$ and $Y$, denoted $Cov(X, Y)$, is the expected product of the deviations of $X$ and $Y$:
$$ Cov(X, Y) ~ = ~ E(D_XD_Y) ~=~ E[(X - \mu_X)(Y - \mu_Y)] $$In this chapter we will learn how to utilize covariance to find variances of sums. The fundamental calculation is the one we did above; here is the result again, using the language of covariance.
$$ Var(X+Y) ~ = ~ Var(X) + Var(Y) + 2Cov(X, Y) $$


Press n or j to go to the next uncovered block, b, p or k for the previous block.
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| src/application/use_cases |
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| src/domain |
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| src/domain/model |
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28.57% | 4/14 | 100% | 0/0 | 0% | 0/2 | 28.57% | 4/14 |
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AMED_AARCH64_PAGE_ucvtf_z_p_z, //!< UCVTF:Unsigned integer convert to floating-point (predicated)
AMED_AARCH64_PAGE_udiv_z_p_zz, //!< UDIV:Unsigned divide (predicated)
AMED_AARCH64_PAGE_udivr_z_p_zz, //!< UDIVR:Unsigned reversed divide (predicated)
AMED_AARCH64_PAGE_udot_z_zzz, //!< UDOT (vectors):Unsigned integer dot product
AMED_AARCH64_PAGE_udot_z_zzzi, //!< UDOT (indexed):Unsigned integer indexed dot product
AMED_AARCH64_PAGE_uhadd_z_p_zz, //!< UHADD:Unsigned halving addition
AMED_AARCH64_PAGE_uhsub_z_p_zz, //!< UHSUB:Unsigned halving subtract
AMED_AARCH64_PAGE_uhsubr_z_p_zz, //!< UHSUBR:Unsigned halving subtract reversed vectors
AMED_AARCH64_PAGE_umax_z_p_zz, //!< UMAX (vectors):Unsigned maximum vectors (predicated)
AMED_AARCH64_PAGE_umax_z_zi, //!< UMAX (immediate):Unsigned maximum with immediate (unpredicated)
AMED_AARCH64_PAGE_umaxp_z_p_zz, //!< UMAXP:Unsigned maximum pairwise
AMED_AARCH64_PAGE_umaxv_r_p_z, //!< UMAXV:Unsigned maximum reduction to scalar
AMED_AARCH64_PAGE_umin_z_p_zz, //!< UMIN (vectors):Unsigned minimum vectors (predicated)
AMED_AARCH64_PAGE_umin_z_zi, //!< UMIN (immediate):Unsigned minimum with immediate (unpredicated)
AMED_AARCH64_PAGE_uminp_z_p_zz, //!< UMINP:Unsigned minimum pairwise
AMED_AARCH64_PAGE_uminv_r_p_z, //!< UMINV:Unsigned minimum reduction to scalar
AMED_AARCH64_PAGE_umlalb_z_zzz, //!< UMLALB (vectors):Unsigned multiply-add long to accumulator (bottom)
AMED_AARCH64_PAGE_umlalb_z_zzzi, //!< UMLALB (indexed):Unsigned multiply-add long to accumulator (bottom, indexed)
AMED_AARCH64_PAGE_umlalt_z_zzz, //!< UMLALT (vectors):Unsigned multiply-add long to accumulator (top)
AMED_AARCH64_PAGE_umlalt_z_zzzi, //!< UMLALT (indexed):Unsigned multiply-add long to accumulator (top, indexed)
AMED_AARCH64_PAGE_umlslb_z_zzz, //!< UMLSLB (vectors):Unsigned multiply-subtract long from accumulator (bottom)
AMED_AARCH64_PAGE_umlslb_z_zzzi, //!< UMLSLB (indexed):Unsigned multiply-subtract long from accumulator (bottom, indexed)
AMED_AARCH64_PAGE_umlslt_z_zzz, //!< UMLSLT (vectors):Unsigned multiply-subtract long from accumulator (top)
AMED_AARCH64_PAGE_umlslt_z_zzzi, //!< UMLSLT (indexed):Unsigned multiply-subtract long from accumulator (top, indexed)
AMED_AARCH64_PAGE_ummla_z_zzz, //!< UMMLA:Unsigned integer matrix multiply-accumulate
AMED_AARCH64_PAGE_umulh_z_p_zz, //!< UMULH (predicated):Unsigned multiply returning high half (predicated)
AMED_AARCH64_PAGE_umulh_z_zz, //!< UMULH (unpredicated):Unsigned multiply returning high half (unpredicated)
AMED_AARCH64_PAGE_umullb_z_zz, //!< UMULLB (vectors):Unsigned multiply long (bottom)
AMED_AARCH64_PAGE_umullb_z_zzi, //!< UMULLB (indexed):Unsigned multiply long (bottom, indexed)
AMED_AARCH64_PAGE_umullt_z_zz, //!< UMULLT (vectors):Unsigned multiply long (top)
AMED_AARCH64_PAGE_umullt_z_zzi, //!< UMULLT (indexed):Unsigned multiply long (top, indexed)
AMED_AARCH64_PAGE_uqadd_z_p_zz, //!< UQADD (vectors, predicated):Unsigned saturating addition (predicated)
AMED_AARCH64_PAGE_uqadd_z_zi, //!< UQADD (immediate):Unsigned saturating add immediate (unpredicated)
AMED_AARCH64_PAGE_uqadd_z_zz, //!< UQADD (vectors, unpredicated):Unsigned saturating add vectors (unpredicated)
AMED_AARCH64_PAGE_uqdecb_r_rs, //!< UQDECB:Unsigned saturating decrement scalar by multiple of 8-bit predicate constraint element count
AMED_AARCH64_PAGE_uqdecd_r_rs, //!< UQDECD (scalar):Unsigned saturating decrement scalar by multiple of 64-bit predicate constraint element count
AMED_AARCH64_PAGE_uqdecd_z_zs, //!< UQDECD (vector):Unsigned saturating decrement vector by multiple of 64-bit predicate constraint element count
AMED_AARCH64_PAGE_uqdech_r_rs, //!< UQDECH (scalar):Unsigned saturating decrement scalar by multiple of 16-bit predicate constraint element count
AMED_AARCH64_PAGE_uqdech_z_zs, //!< UQDECH (vector):Unsigned saturating decrement vector by multiple of 16-bit predicate constraint element count
AMED_AARCH64_PAGE_uqdecp_r_p_r, //!< UQDECP (scalar):Unsigned saturating decrement scalar by count of true predicate elements
AMED_AARCH64_PAGE_uqdecp_z_p_z, //!< UQDECP (vector):Unsigned saturating decrement vector by count of true predicate elements
AMED_AARCH64_PAGE_uqdecw_r_rs, //!< UQDECW (scalar):Unsigned saturating decrement scalar by multiple of 32-bit predicate constraint element count
AMED_AARCH64_PAGE_uqdecw_z_zs, //!< UQDECW (vector):Unsigned saturating decrement vector by multiple of 32-bit predicate constraint element count
AMED_AARCH64_PAGE_uqincb_r_rs, //!< UQINCB:Unsigned saturating increment scalar by multiple of 8-bit predicate constraint element count
AMED_AARCH64_PAGE_uqincd_r_rs, //!< UQINCD (scalar):Unsigned saturating increment scalar by multiple of 64-bit predicate constraint element count
AMED_AARCH64_PAGE_uqincd_z_zs, //!< UQINCD (vector):Unsigned saturating increment vector by multiple of 64-bit predicate constraint element count
AMED_AARCH64_PAGE_uqinch_r_rs, //!< UQINCH (scalar):Unsigned saturating increment scalar by multiple of 16-bit predicate constraint element count
AMED_AARCH64_PAGE_uqinch_z_zs, //!< UQINCH (vector):Unsigned saturating increment vector by multiple of 16-bit predicate constraint element count
AMED_AARCH64_PAGE_uqincp_r_p_r, //!< UQINCP (scalar):Unsigned saturating increment scalar by count of true predicate elements
AMED_AARCH64_PAGE_uqincp_z_p_z, //!< UQINCP (vector):Unsigned saturating increment vector by count of true predicate elements
AMED_AARCH64_PAGE_uqincw_r_rs, //!< UQINCW (scalar):Unsigned saturating increment scalar by multiple of 32-bit predicate constraint element count
AMED_AARCH64_PAGE_uqincw_z_zs, //!< UQINCW (vector):Unsigned saturating increment vector by multiple of 32-bit predicate constraint element count
AMED_AARCH64_PAGE_uqrshl_z_p_zz, //!< UQRSHL:Unsigned saturating rounding shift left by vector (predicated)
AMED_AARCH64_PAGE_uqrshlr_z_p_zz, //!< UQRSHLR:Unsigned saturating rounding shift left reversed vectors (predicated)
AMED_AARCH64_PAGE_uqrshrnb_z_zi, //!< UQRSHRNB:Unsigned saturating rounding shift right narrow by immediate (bottom)
AMED_AARCH64_PAGE_uqrshrnt_z_zi, //!< UQRSHRNT:Unsigned saturating rounding shift right narrow by immediate (top)
AMED_AARCH64_PAGE_uqshl_z_p_zi, //!< UQSHL (immediate):Unsigned saturating shift left by immediate
AMED_AARCH64_PAGE_uqshl_z_p_zz, //!< UQSHL (vectors):Unsigned saturating shift left by vector (predicated)
AMED_AARCH64_PAGE_uqshlr_z_p_zz, //!< UQSHLR:Unsigned saturating shift left reversed vectors (predicated)
AMED_AARCH64_PAGE_uqshrnb_z_zi, //!< UQSHRNB:Unsigned saturating shift right narrow by immediate (bottom)
AMED_AARCH64_PAGE_uqshrnt_z_zi, //!< UQSHRNT:Unsigned saturating shift right narrow by immediate (top)
AMED_AARCH64_PAGE_uqsub_z_p_zz, //!< UQSUB (vectors, predicated):Unsigned saturating subtraction (predicated)
AMED_AARCH64_PAGE_uqsub_z_zi, //!< UQSUB (immediate):Unsigned saturating subtract immediate (unpredicated)
AMED_AARCH64_PAGE_uqsub_z_zz, //!< UQSUB (vectors, unpredicated):Unsigned saturating subtract vectors (unpredicated)
AMED_AARCH64_PAGE_uqsubr_z_p_zz, //!< UQSUBR:Unsigned saturating subtraction reversed vectors (predicated)
AMED_AARCH64_PAGE_uqxtnb_z_zz, //!< UQXTNB:Unsigned saturating extract narrow (bottom)
AMED_AARCH64_PAGE_uqxtnt_z_zz, //!< UQXTNT:Unsigned saturating extract narrow (top)
AMED_AARCH64_PAGE_urecpe_z_p_z, //!< URECPE:Unsigned reciprocal estimate (predicated)
AMED_AARCH64_PAGE_urhadd_z_p_zz, //!< URHADD:Unsigned rounding halving addition
AMED_AARCH64_PAGE_urshl_z_p_zz, //!< URSHL:Unsigned rounding shift left by vector (predicated)
AMED_AARCH64_PAGE_urshlr_z_p_zz, //!< URSHLR:Unsigned rounding shift left reversed vectors (predicated)
AMED_AARCH64_PAGE_urshr_z_p_zi, //!< URSHR:Unsigned rounding shift right by immediate
AMED_AARCH64_PAGE_ursqrte_z_p_z, //!< URSQRTE:Unsigned reciprocal square root estimate (predicated)
AMED_AARCH64_PAGE_ursra_z_zi, //!< URSRA:Unsigned rounding shift right and accumulate (immediate)
AMED_AARCH64_PAGE_usdot_z_zzz, //!< USDOT (vectors):Unsigned by signed integer dot product
AMED_AARCH64_PAGE_usdot_z_zzzi, //!< USDOT (indexed):Unsigned by signed integer indexed dot product
AMED_AARCH64_PAGE_ushllb_z_zi, //!< USHLLB:Unsigned shift left long by immediate (bottom)
AMED_AARCH64_PAGE_ushllt_z_zi, //!< USHLLT:Unsigned shift left long by immediate (top)
AMED_AARCH64_PAGE_usmmla_z_zzz, //!< USMMLA:Unsigned by signed integer matrix multiply-accumulate
AMED_AARCH64_PAGE_usqadd_z_p_zz, //!< USQADD:Unsigned saturating addition of signed value
AMED_AARCH64_PAGE_usra_z_zi, //!< USRA:Unsigned shift right and accumulate (immediate)
AMED_AARCH64_PAGE_usublb_z_zz, //!< USUBLB:Unsigned subtract long (bottom)
AMED_AARCH64_PAGE_usublt_z_zz, //!< USUBLT:Unsigned subtract long (top)
AMED_AARCH64_PAGE_usubwb_z_zz, //!< USUBWB:Unsigned subtract wide (bottom)
AMED_AARCH64_PAGE_usubwt_z_zz, //!< USUBWT:Unsigned subtract wide (top)
AMED_AARCH64_PAGE_uunpkhi_z_z, //!< UUNPKHI, UUNPKLO:Unsigned unpack and extend half of vector
AMED_AARCH64_PAGE_uxtb_z_p_z, //!< UXTB, UXTH, UXTW:Unsigned byte / halfword / word extend (predicated)
AMED_AARCH64_PAGE_uzp1_p_pp, //!< UZP1, UZP2 (predicates):Concatenate even or odd elements from two predicates
AMED_AARCH64_PAGE_uzp1_z_zz, //!< UZP1, UZP2 (vectors):Concatenate even or odd elements from two vectors
AMED_AARCH64_PAGE_whilege_p_p_rr, //!< WHILEGE:While decrementing signed scalar greater than or equal to scalar
AMED_AARCH64_PAGE_whilegt_p_p_rr, //!< WHILEGT:While decrementing signed scalar greater than scalar
AMED_AARCH64_PAGE_whilehi_p_p_rr, //!< WHILEHI:While decrementing unsigned scalar higher than scalar
AMED_AARCH64_PAGE_whilehs_p_p_rr, //!< WHILEHS:While decrementing unsigned scalar higher or same as scalar
AMED_AARCH64_PAGE_whilele_p_p_rr, //!< WHILELE:While incrementing signed scalar less than or equal to scalar
AMED_AARCH64_PAGE_whilelo_p_p_rr, //!< WHILELO:While incrementing unsigned scalar lower than scalar
AMED_AARCH64_PAGE_whilels_p_p_rr, //!< WHILELS:While incrementing unsigned scalar lower or same as scalar
AMED_AARCH64_PAGE_whilelt_p_p_rr, //!< WHILELT:While incrementing signed scalar less than scalar
AMED_AARCH64_PAGE_whilerw_p_rr, //!< WHILERW:While free of read-after-write conflicts
AMED_AARCH64_PAGE_whilewr_p_rr, //!< WHILEWR:While free of write-after-read/write conflicts
AMED_AARCH64_PAGE_wrffr_f_p, //!< WRFFR:Write the first-fault register
AMED_AARCH64_PAGE_xar_z_zzi, //!< XAR:Bitwise exclusive OR and rotate right by immediate
AMED_AARCH64_PAGE_zip1_p_pp, //!< ZIP1, ZIP2 (predicates):Interleave elements from two half predicates
AMED_AARCH64_PAGE_zip1_z_zz, //!< ZIP1, ZIP2 (vectors):Interleave elements from two half vectors
AMED_AARCH64_PAGE_BIC_and_z_zi, //!< BIC (immediate):Bitwise clear bits using immediate (unpredicated)
AMED_AARCH64_PAGE_CMPLE_cmpeq_p_p_zz, //!< CMPLE (vectors):Compare signed less than or equal to vector, setting the condition flags
AMED_AARCH64_PAGE_CMPLO_cmpeq_p_p_zz, //!< CMPLO (vectors):Compare unsigned lower than vector, setting the condition flags
AMED_AARCH64_PAGE_CMPLS_cmpeq_p_p_zz, //!< CMPLS (vectors):Compare unsigned lower or same as vector, setting the condition flags
AMED_AARCH64_PAGE_CMPLT_cmpeq_p_p_zz, //!< CMPLT (vectors):Compare signed less than vector, setting the condition flags
AMED_AARCH64_PAGE_EON_eor_z_zi, //!< EON:Bitwise exclusive OR with inverted immediate (unpredicated)
AMED_AARCH64_PAGE_FACLE_facge_p_p_zz, //!< FACLE:Floating-point absolute compare less than or equal
AMED_AARCH64_PAGE_FACLT_facge_p_p_zz, //!< FACLT:Floating-point absolute compare less than
AMED_AARCH64_PAGE_FCMLE_fcmeq_p_p_zz, //!< FCMLE (vectors):Floating-point compare less than or equal to vector
AMED_AARCH64_PAGE_FCMLT_fcmeq_p_p_zz, //!< FCMLT (vectors):Floating-point compare less than vector
AMED_AARCH64_PAGE_FMOV_cpy_z_p_i, //!< FMOV (zero, predicated):Move floating-point +0.0 to vector elements (predicated)
AMED_AARCH64_PAGE_FMOV_dup_z_i, //!< FMOV (zero, unpredicated):Move floating-point +0.0 to vector elements (unpredicated)
AMED_AARCH64_PAGE_FMOV_fcpy_z_p_i, //!< FMOV (immediate, predicated):Move 8-bit floating-point immediate to vector elements (predicated)
AMED_AARCH64_PAGE_FMOV_fdup_z_i, //!< FMOV (immediate, unpredicated):Move 8-bit floating-point immediate to vector elements (unpredicated)
AMED_AARCH64_PAGE_MOV_and_p_p_pp, //!< MOV (predicate, predicated, zeroing):Move predicates (zeroing)
AMED_AARCH64_PAGE_MOV_cpy_z_o_i, //!< MOV (immediate, predicated, zeroing):Move signed integer immediate to vector elements (zeroing)
AMED_AARCH64_PAGE_MOV_cpy_z_p_i, //!< MOV (immediate, predicated, merging):Move signed integer immediate to vector elements (merging)
AMED_AARCH64_PAGE_MOV_cpy_z_p_r, //!< MOV (scalar, predicated):Move general-purpose register to vector elements (predicated)
AMED_AARCH64_PAGE_MOV_cpy_z_p_v, //!< MOV (SIMD&FP scalar, predicated):Move SIMD&FP scalar register to vector elements (predicated)
AMED_AARCH64_PAGE_MOV_dup_z_i, //!< MOV (immediate, unpredicated):Move signed immediate to vector elements (unpredicated)
AMED_AARCH64_PAGE_MOV_dup_z_r, //!< MOV (scalar, unpredicated):Move general-purpose register to vector elements (unpredicated)
AMED_AARCH64_PAGE_MOV_dup_z_zi, //!< MOV (SIMD&FP scalar, unpredicated):Move indexed element or SIMD&FP scalar to vector (unpredicated)
AMED_AARCH64_PAGE_MOV_dupm_z_i, //!< MOV (bitmask immediate):Move logical bitmask immediate to vector (unpredicated)
AMED_AARCH64_PAGE_MOV_orr_p_p_pp, //!< MOV (predicate, unpredicated):Move predicate (unpredicated)
AMED_AARCH64_PAGE_MOV_orr_z_zz, //!< MOV (vector, unpredicated):Move vector register (unpredicated)
AMED_AARCH64_PAGE_MOV_sel_p_p_pp, //!< MOV (predicate, predicated, merging):Move predicates (merging)
AMED_AARCH64_PAGE_MOV_sel_z_p_zz, //!< MOV (vector, predicated):Move vector elements (predicated)
AMED_AARCH64_PAGE_MOVS_and_p_p_pp, //!< MOVS (predicated):Move predicates (zeroing), setting the condition flags
AMED_AARCH64_PAGE_MOVS_orr_p_p_pp, //!< MOVS (unpredicated):Move predicate (unpredicated), setting the condition flags
AMED_AARCH64_PAGE_NOT_eor_p_p_pp, //!< NOT (predicate):Bitwise invert predicate
AMED_AARCH64_PAGE_NOTS_eor_p_p_pp, //!< NOTS:Bitwise invert predicate, setting the condition flags
AMED_AARCH64_PAGE_ORN_orr_z_zi, //!< ORN (immediate):Bitwise inclusive OR with inverted immediate (unpredicated)
} amed_aarch64_page;
#define AMED_AARCH64_EXCEPTION_MAX_TEXT_LENGTH (19 + 1)
typedef enum _amed_aarch64_exception
{
AMED_AARCH64_EXCEPTION_NONE,
AMED_AARCH64_EXCEPTION_ADVSIMDFPACCESSTRAP,
AMED_AARCH64_EXCEPTION_ALIGNMENT,
AMED_AARCH64_EXCEPTION_DATAABORT,
AMED_AARCH64_EXCEPTION_ERETTRAP,
AMED_AARCH64_EXCEPTION_FP,
AMED_AARCH64_EXCEPTION_HYPERVISORCALL,
AMED_AARCH64_EXCEPTION_MONITORCALL,
AMED_AARCH64_EXCEPTION_PACFAIL,
AMED_AARCH64_EXCEPTION_PACTRAP,
AMED_AARCH64_EXCEPTION_SPALIGNMENT,
AMED_AARCH64_EXCEPTION_SVEACCESSTRAP,
AMED_AARCH64_EXCEPTION_SOFTWAREBREAKPOINT,
AMED_AARCH64_EXCEPTION_SUPERVISORCALL,
AMED_AARCH64_EXCEPTION_TSTARTACCESSTRAP,
AMED_AARCH64_EXCEPTION_UNCATEGORIZED,
AMED_AARCH64_EXCEPTION_WFXTRAP,
} amed_aarch64_exception;
#define AMED_AARCH64_EXTENSION_MAX_TEXT_LENGTH (23 + 1)
typedef enum _amed_aarch64_extension
{
AMED_AARCH64_EXTENSION_NONE,
AMED_AARCH64_EXTENSION_AES,
AMED_AARCH64_EXTENSION_ATOMIC,
AMED_AARCH64_EXTENSION_BF16,
AMED_AARCH64_EXTENSION_BTI,
AMED_AARCH64_EXTENSION_BIT128PMULL,
AMED_AARCH64_EXTENSION_CRC,
AMED_AARCH64_EXTENSION_DGH,
AMED_AARCH64_EXTENSION_DIT,
AMED_AARCH64_EXTENSION_DOTP,
AMED_AARCH64_EXTENSION_FCADD,
AMED_AARCH64_EXTENSION_FJCVTZS,
AMED_AARCH64_EXTENSION_FP16,
AMED_AARCH64_EXTENSION_FP16MULNOROUNDINGTOFP32,
AMED_AARCH64_EXTENSION_FLAGFORMAT,
AMED_AARCH64_EXTENSION_FLAGMANIPULATE,
AMED_AARCH64_EXTENSION_FRINT,
AMED_AARCH64_EXTENSION_INT8MATMUL,
AMED_AARCH64_EXTENSION_MTE,
AMED_AARCH64_EXTENSION_PAC,
AMED_AARCH64_EXTENSION_PAN,
AMED_AARCH64_EXTENSION_QRDMLAH,
AMED_AARCH64_EXTENSION_RAS,
AMED_AARCH64_EXTENSION_SB,
AMED_AARCH64_EXTENSION_SHA1,
AMED_AARCH64_EXTENSION_SHA256,
AMED_AARCH64_EXTENSION_SHA3,
AMED_AARCH64_EXTENSION_SHA512,
AMED_AARCH64_EXTENSION_SM3,
AMED_AARCH64_EXTENSION_SM4,
AMED_AARCH64_EXTENSION_SSBS,
AMED_AARCH64_EXTENSION_SVE,
AMED_AARCH64_EXTENSION_SVE2,
AMED_AARCH64_EXTENSION_SVE2AES,
AMED_AARCH64_EXTENSION_SVE2BITPERM,
AMED_AARCH64_EXTENSION_SVE2PMULL128,
AMED_AARCH64_EXTENSION_SVE2SHA3,
AMED_AARCH64_EXTENSION_SVE2SM4,
AMED_AARCH64_EXTENSION_SVEFP32MATMUL,
AMED_AARCH64_EXTENSION_SVEFP64MATMUL,
AMED_AARCH64_EXTENSION_UAO,
} amed_aarch64_extension;
#define AMED_AARCH64_ICLASS_MAX_TEXT_LENGTH (35 + 1)
typedef enum _amed_aarch64_iclass
{
AMED_AARCH64_ICLASS_NONE,
AMED_AARCH64_ICLASS_invalid, //!< invalid
AMED_AARCH64_ICLASS_addsub_carry, //!< Add/subtract (with carry)
AMED_AARCH64_ICLASS_addsub_ext, //!< Add/subtract (extended register)
AMED_AARCH64_ICLASS_addsub_imm, //!< Add/subtract (immediate)
AMED_AARCH64_ICLASS_addsub_immtags, //!< Add/subtract (immediate, with tags)
AMED_AARCH64_ICLASS_addsub_shift, //!< Add/subtract (shifted register)
AMED_AARCH64_ICLASS_barriers, //!< Barriers
AMED_AARCH64_ICLASS_bitfield, //!< Bitfield
AMED_AARCH64_ICLASS_branch_imm, //!< Unconditional branch (immediate)
AMED_AARCH64_ICLASS_branch_reg, //!< Unconditional branch (register)
AMED_AARCH64_ICLASS_compbranch, //!< Compare and branch (immediate)
AMED_AARCH64_ICLASS_condbranch, //!< Conditional branch (immediate)
AMED_AARCH64_ICLASS_condcmp_imm, //!< Conditional compare (immediate)
AMED_AARCH64_ICLASS_condcmp_reg, //!< Conditional compare (register)
AMED_AARCH64_ICLASS_condsel, //!< Conditional select
AMED_AARCH64_ICLASS_dp_1src, //!< Data-processing (1 source)
AMED_AARCH64_ICLASS_dp_2src, //!< Data-processing (2 source)
AMED_AARCH64_ICLASS_dp_3src, //!< Data-processing (3 source)
AMED_AARCH64_ICLASS_exception, //!< Exception generation
AMED_AARCH64_ICLASS_extract, //!< Extract
AMED_AARCH64_ICLASS_hints, //!< Hints
AMED_AARCH64_ICLASS_ldapstl_unscaled, //!< LDAPR/STLR (unscaled immediate)
AMED_AARCH64_ICLASS_ldst_pac, //!< Load/store register (pac)
AMED_AARCH64_ICLASS_ldst_unpriv, //!< Load/store register (unprivileged)
AMED_AARCH64_ICLASS_ldstexcl, //!< Load/store exclusive
AMED_AARCH64_ICLASS_ldsttags, //!< Load/store memory tags
AMED_AARCH64_ICLASS_log_imm, //!< Logical (immediate)
AMED_AARCH64_ICLASS_log_shift, //!< Logical (shifted register)
AMED_AARCH64_ICLASS_memop, //!< Atomic memory operations
AMED_AARCH64_ICLASS_movewide, //!< Move wide (immediate)
AMED_AARCH64_ICLASS_pcreladdr, //!< PC-rel. addressing
AMED_AARCH64_ICLASS_perm_undef, //!< Reserved
AMED_AARCH64_ICLASS_pstate, //!< PSTATE
AMED_AARCH64_ICLASS_rmif, //!< Rotate right into flags
AMED_AARCH64_ICLASS_setf, //!< Evaluate into flags
AMED_AARCH64_ICLASS_systeminstrs, //!< System instructions
AMED_AARCH64_ICLASS_systemmove, //!< System register move
AMED_AARCH64_ICLASS_systemresult, //!< System with result
AMED_AARCH64_ICLASS_testbranch, //!< Test and branch (immediate)
AMED_AARCH64_ICLASS_asimdall, //!< Advanced SIMD across lanes
AMED_AARCH64_ICLASS_asimddiff, //!< Advanced SIMD three different
AMED_AARCH64_ICLASS_asimdelem, //!< Advanced SIMD vector x indexed element
AMED_AARCH64_ICLASS_asimdext, //!< Advanced SIMD extract
AMED_AARCH64_ICLASS_asimdimm, //!< Advanced SIMD modified immediate
AMED_AARCH64_ICLASS_asimdins, //!< Advanced SIMD copy
AMED_AARCH64_ICLASS_asimdmisc, //!< Advanced SIMD two-register miscellaneous
AMED_AARCH64_ICLASS_asimdmiscfp16, //!< Advanced SIMD two-register miscellaneous (FP16)
AMED_AARCH64_ICLASS_asimdperm, //!< Advanced SIMD permute
AMED_AARCH64_ICLASS_asimdsame, //!< Advanced SIMD three same
AMED_AARCH64_ICLASS_asimdsame2, //!< Advanced SIMD three-register extension
AMED_AARCH64_ICLASS_asimdsamefp16, //!< Advanced SIMD three same (FP16)
AMED_AARCH64_ICLASS_asimdshf, //!< Advanced SIMD shift by immediate
AMED_AARCH64_ICLASS_asimdtbl, //!< Advanced SIMD table lookup
AMED_AARCH64_ICLASS_asisddiff, //!< Advanced SIMD scalar three different
AMED_AARCH64_ICLASS_asisdelem, //!< Advanced SIMD scalar x indexed element
AMED_AARCH64_ICLASS_asisdlse, //!< Advanced SIMD load/store multiple structures
AMED_AARCH64_ICLASS_asisdlsep, //!< Advanced SIMD load/store multiple structures (post-indexed)
AMED_AARCH64_ICLASS_asisdlso, //!< Advanced SIMD load/store single structure
AMED_AARCH64_ICLASS_asisdlsop, //!< Advanced SIMD load/store single structure (post-indexed)
AMED_AARCH64_ICLASS_asisdmisc, //!< Advanced SIMD scalar two-register miscellaneous
AMED_AARCH64_ICLASS_asisdmiscfp16, //!< Advanced SIMD scalar two-register miscellaneous FP16
AMED_AARCH64_ICLASS_asisdone, //!< Advanced SIMD scalar copy
AMED_AARCH64_ICLASS_asisdpair, //!< Advanced SIMD scalar pairwise
AMED_AARCH64_ICLASS_asisdsame, //!< Advanced SIMD scalar three same
AMED_AARCH64_ICLASS_asisdsame2, //!< Advanced SIMD scalar three same extra
AMED_AARCH64_ICLASS_asisdsamefp16, //!< Advanced SIMD scalar three same FP16
AMED_AARCH64_ICLASS_asisdshf, //!< Advanced SIMD scalar shift by immediate
AMED_AARCH64_ICLASS_crypto3_imm2, //!< Cryptographic three-register, imm2
AMED_AARCH64_ICLASS_crypto3_imm6, //!< Cryptographic three-register, imm6
AMED_AARCH64_ICLASS_crypto4, //!< Cryptographic four-register
AMED_AARCH64_ICLASS_cryptoaes, //!< Cryptographic AES
AMED_AARCH64_ICLASS_cryptosha2, //!< Cryptographic two-register SHA
AMED_AARCH64_ICLASS_cryptosha3, //!< Cryptographic three-register SHA
AMED_AARCH64_ICLASS_cryptosha512_2, //!< Cryptographic two-register SHA 512
AMED_AARCH64_ICLASS_cryptosha512_3, //!< Cryptographic three-register SHA 512
AMED_AARCH64_ICLASS_float2fix, //!< Conversion between floating-point and fixed-point
AMED_AARCH64_ICLASS_float2int, //!< Conversion between floating-point and integer
AMED_AARCH64_ICLASS_floatccmp, //!< Floating-point conditional compare
AMED_AARCH64_ICLASS_floatcmp, //!< Floating-point compare
AMED_AARCH64_ICLASS_floatdp1, //!< Floating-point data-processing (1 source)
AMED_AARCH64_ICLASS_floatdp2, //!< Floating-point data-processing (2 source)
AMED_AARCH64_ICLASS_floatdp3, //!< Floating-point data-processing (3 source)
AMED_AARCH64_ICLASS_floatimm, //!< Floating-point immediate
AMED_AARCH64_ICLASS_floatsel, //!< Floating-point conditional select
AMED_AARCH64_ICLASS_ldst_immpost, //!< Load/store register (immediate post-indexed)
AMED_AARCH64_ICLASS_ldst_immpre, //!< Load/store register (immediate pre-indexed)
AMED_AARCH64_ICLASS_ldst_pos, //!< Load/store register (unsigned immediate)
AMED_AARCH64_ICLASS_ldst_regoff, //!< Load/store register (register offset)
AMED_AARCH64_ICLASS_ldst_unscaled, //!< Load/store register (unscaled immediate)
AMED_AARCH64_ICLASS_ldstnapair_offs, //!< Load/store no-allocate pair (offset)
AMED_AARCH64_ICLASS_ldstpair_off, //!< Load/store register pair (offset)
AMED_AARCH64_ICLASS_ldstpair_post, //!< Load/store register pair (post-indexed)
AMED_AARCH64_ICLASS_ldstpair_pre, //!< Load/store register pair (pre-indexed)
AMED_AARCH64_ICLASS_loadlit, //!< Load register (literal)
AMED_AARCH64_ICLASS_sve_crypto_binary_const, //!< SVE2 crypto constructive binary operations
AMED_AARCH64_ICLASS_sve_crypto_binary_dest, //!< SVE2 crypto destructive binary operations
AMED_AARCH64_ICLASS_sve_crypto_unary, //!< SVE2 crypto unary operations
AMED_AARCH64_ICLASS_sve_fp_2op_i_p_zds, //!< SVE floating-point arithmetic with immediate (predicated)
AMED_AARCH64_ICLASS_sve_fp_2op_p_pd, //!< SVE floating-point compare with zero
AMED_AARCH64_ICLASS_sve_fp_2op_p_vd, //!< SVE floating-point serial reduction (predicated)
AMED_AARCH64_ICLASS_sve_fp_2op_p_zd_a, //!< SVE floating-point round to integral value
AMED_AARCH64_ICLASS_sve_fp_2op_p_zd_b_0, //!< SVE floating-point convert precision
AMED_AARCH64_ICLASS_sve_fp_2op_p_zd_b_1, //!< SVE floating-point unary operations
AMED_AARCH64_ICLASS_sve_fp_2op_p_zd_c, //!< SVE integer convert to floating-point
AMED_AARCH64_ICLASS_sve_fp_2op_p_zd_d, //!< SVE floating-point convert to integer
AMED_AARCH64_ICLASS_sve_fp_2op_p_zds, //!< SVE floating-point arithmetic (predicated)
AMED_AARCH64_ICLASS_sve_fp_2op_u_zd, //!< SVE floating-point reciprocal estimate (unpredicated)
AMED_AARCH64_ICLASS_sve_fp_3op_p_pd, //!< SVE floating-point compare vectors
AMED_AARCH64_ICLASS_sve_fp_3op_p_zds_a, //!< SVE floating-point multiply-accumulate writing addend
AMED_AARCH64_ICLASS_sve_fp_3op_p_zds_b, //!< SVE floating-point multiply-accumulate writing multiplicand
AMED_AARCH64_ICLASS_sve_fp_3op_u_zd, //!< SVE floating-point arithmetic (unpredicated)
AMED_AARCH64_ICLASS_sve_fp_fast_red, //!< SVE floating-point recursive reduction
AMED_AARCH64_ICLASS_sve_fp_fcadd, //!< SVE floating-point complex add (predicated)
AMED_AARCH64_ICLASS_sve_fp_fcmla, //!< SVE floating-point complex multiply-add (predicated)
AMED_AARCH64_ICLASS_sve_fp_fcmla_by_indexed_elem, //!< SVE floating-point complex multiply-add (indexed)
AMED_AARCH64_ICLASS_sve_fp_fcvt2, //!< SVE floating-point convert precision odd elements
AMED_AARCH64_ICLASS_sve_fp_fdot, //!< SVE BFloat16 floating-point dot product
AMED_AARCH64_ICLASS_sve_fp_fdot_by_indexed_elem, //!< SVE BFloat16 floating-point dot product (indexed)
AMED_AARCH64_ICLASS_sve_fp_fma_by_indexed_elem, //!< SVE floating-point multiply-add (indexed)
AMED_AARCH64_ICLASS_sve_fp_fma_long, //!< SVE floating-point multiply-add long
AMED_AARCH64_ICLASS_sve_fp_fma_long_by_indexed_elem, //!< SVE floating-point multiply-add long (indexed)
AMED_AARCH64_ICLASS_sve_fp_fmmla, //!< SVE floating point matrix multiply accumulate
AMED_AARCH64_ICLASS_sve_fp_fmul_by_indexed_elem, //!< SVE floating-point multiply (indexed)
AMED_AARCH64_ICLASS_sve_fp_ftmad, //!< SVE floating-point trig multiply-add coefficient
AMED_AARCH64_ICLASS_sve_fp_pairwise, //!< SVE2 floating-point pairwise operations
AMED_AARCH64_ICLASS_sve_int_arith_imm0, //!< SVE integer add/subtract immediate (unpredicated)
AMED_AARCH64_ICLASS_sve_int_arith_imm1, //!< SVE integer min/max immediate (unpredicated)
AMED_AARCH64_ICLASS_sve_int_arith_imm2, //!< SVE integer multiply immediate (unpredicated)
AMED_AARCH64_ICLASS_sve_int_arith_vl, //!< SVE stack frame adjustment
AMED_AARCH64_ICLASS_sve_int_bin_cons_arit_0, //!< SVE integer add/subtract vectors (unpredicated)
AMED_AARCH64_ICLASS_sve_int_bin_cons_log, //!< SVE bitwise logical operations (unpredicated)
AMED_AARCH64_ICLASS_sve_int_bin_cons_misc_0_a, //!< SVE address generation
AMED_AARCH64_ICLASS_sve_int_bin_cons_misc_0_b, //!< SVE floating-point trig select coefficient
AMED_AARCH64_ICLASS_sve_int_bin_cons_misc_0_c, //!< SVE floating-point exponential accelerator
AMED_AARCH64_ICLASS_sve_int_bin_cons_misc_0_d, //!< SVE constructive prefix (unpredicated)
AMED_AARCH64_ICLASS_sve_int_bin_cons_shift_a, //!< SVE bitwise shift by wide elements (unpredicated)
AMED_AARCH64_ICLASS_sve_int_bin_cons_shift_b, //!< SVE bitwise shift by immediate (unpredicated)
AMED_AARCH64_ICLASS_sve_int_bin_pred_arit_0, //!< SVE integer add/subtract vectors (predicated)
AMED_AARCH64_ICLASS_sve_int_bin_pred_arit_1, //!< SVE integer min/max/difference (predicated)
AMED_AARCH64_ICLASS_sve_int_bin_pred_arit_2, //!< SVE integer multiply vectors (predicated)
AMED_AARCH64_ICLASS_sve_int_bin_pred_div, //!< SVE integer divide vectors (predicated)
AMED_AARCH64_ICLASS_sve_int_bin_pred_log, //!< SVE bitwise logical operations (predicated)
AMED_AARCH64_ICLASS_sve_int_bin_pred_shift_0, //!< SVE bitwise shift by immediate (predicated)
AMED_AARCH64_ICLASS_sve_int_bin_pred_shift_1, //!< SVE bitwise shift by vector (predicated)
AMED_AARCH64_ICLASS_sve_int_bin_pred_shift_2, //!< SVE bitwise shift by wide elements (predicated)
AMED_AARCH64_ICLASS_sve_int_break, //!< SVE partition break condition
AMED_AARCH64_ICLASS_sve_int_brkn, //!< SVE propagate break to next partition
AMED_AARCH64_ICLASS_sve_int_brkp, //!< SVE propagate break from previous partition
AMED_AARCH64_ICLASS_sve_int_cmp_0, //!< SVE integer compare vectors
AMED_AARCH64_ICLASS_sve_int_cmp_1, //!< SVE integer compare with wide elements
AMED_AARCH64_ICLASS_sve_int_count, //!< SVE element count
AMED_AARCH64_ICLASS_sve_int_count_r, //!< SVE inc/dec register by predicate count
AMED_AARCH64_ICLASS_sve_int_count_r_sat, //!< SVE saturating inc/dec register by predicate count
AMED_AARCH64_ICLASS_sve_int_count_v, //!< SVE inc/dec vector by predicate count
AMED_AARCH64_ICLASS_sve_int_count_v_sat, //!< SVE saturating inc/dec vector by predicate count
AMED_AARCH64_ICLASS_sve_int_countvlv0, //!< SVE saturating inc/dec vector by element count
AMED_AARCH64_ICLASS_sve_int_countvlv1, //!< SVE inc/dec vector by element count
AMED_AARCH64_ICLASS_sve_int_cterm, //!< SVE conditionally terminate scalars
AMED_AARCH64_ICLASS_sve_int_dup_fpimm, //!< SVE broadcast floating-point immediate (unpredicated)
AMED_AARCH64_ICLASS_sve_int_dup_fpimm_pred, //!< SVE copy floating-point immediate (predicated)
AMED_AARCH64_ICLASS_sve_int_dup_imm, //!< SVE broadcast integer immediate (unpredicated)
AMED_AARCH64_ICLASS_sve_int_dup_imm_pred, //!< SVE copy integer immediate (predicated)
AMED_AARCH64_ICLASS_sve_int_dup_mask_imm, //!< SVE broadcast bitmask immediate
AMED_AARCH64_ICLASS_sve_int_index_ii, //!< SVE index generation (immediate start, immediate increment)
AMED_AARCH64_ICLASS_sve_int_index_ir, //!< SVE index generation (immediate start, register increment)
AMED_AARCH64_ICLASS_sve_int_index_ri, //!< SVE index generation (register start, immediate increment)
AMED_AARCH64_ICLASS_sve_int_index_rr, //!< SVE index generation (register start, register increment)
AMED_AARCH64_ICLASS_sve_int_log_imm, //!< SVE bitwise logical with immediate (unpredicated)
AMED_AARCH64_ICLASS_sve_int_mladdsub_vvv_pred, //!< SVE integer multiply-add writing multiplicand (predicated)
AMED_AARCH64_ICLASS_sve_int_mlas_vvv_pred, //!< SVE integer multiply-accumulate writing addend (predicated)
AMED_AARCH64_ICLASS_sve_int_movprfx_pred, //!< SVE constructive prefix (predicated)
AMED_AARCH64_ICLASS_sve_int_mul_b, //!< SVE2 integer multiply vectors (unpredicated)
AMED_AARCH64_ICLASS_sve_int_pcount_pred, //!< SVE predicate count
AMED_AARCH64_ICLASS_sve_int_perm_bin_long_perm_zz, //!< SVE permute vector segments
AMED_AARCH64_ICLASS_sve_int_perm_bin_perm_pp, //!< SVE permute predicate elements
AMED_AARCH64_ICLASS_sve_int_perm_bin_perm_zz, //!< SVE permute vector elements
AMED_AARCH64_ICLASS_sve_int_perm_clast_rz, //!< SVE conditionally extract element to general register
AMED_AARCH64_ICLASS_sve_int_perm_clast_vz, //!< SVE conditionally extract element to SIMD&FP scalar
AMED_AARCH64_ICLASS_sve_int_perm_clast_zz, //!< SVE conditionally broadcast element to vector
AMED_AARCH64_ICLASS_sve_int_perm_compact, //!< SVE compress active elements
AMED_AARCH64_ICLASS_sve_int_perm_cpy_r, //!< SVE copy general register to vector (predicated)
AMED_AARCH64_ICLASS_sve_int_perm_cpy_v, //!< SVE copy SIMD&FP scalar register to vector (predicated)
AMED_AARCH64_ICLASS_sve_int_perm_dup_i, //!< SVE broadcast indexed element
AMED_AARCH64_ICLASS_sve_int_perm_dup_r, //!< SVE broadcast general register
AMED_AARCH64_ICLASS_sve_int_perm_extract_i, //!< SVE extract vector (immediate offset, destructive)
AMED_AARCH64_ICLASS_sve_int_perm_insrs, //!< SVE insert general register
AMED_AARCH64_ICLASS_sve_int_perm_insrv, //!< SVE insert SIMD&FP scalar register
AMED_AARCH64_ICLASS_sve_int_perm_last_r, //!< SVE extract element to general register
AMED_AARCH64_ICLASS_sve_int_perm_last_v, //!< SVE extract element to SIMD&FP scalar register
AMED_AARCH64_ICLASS_sve_int_perm_punpk, //!< SVE unpack predicate elements
AMED_AARCH64_ICLASS_sve_int_perm_rev, //!< SVE reverse within elements
AMED_AARCH64_ICLASS_sve_int_perm_reverse_p, //!< SVE reverse predicate elements
AMED_AARCH64_ICLASS_sve_int_perm_reverse_z, //!< SVE reverse vector elements
AMED_AARCH64_ICLASS_sve_int_perm_splice, //!< SVE vector splice (destructive)
AMED_AARCH64_ICLASS_sve_int_perm_tbl, //!< SVE table lookup
AMED_AARCH64_ICLASS_sve_int_perm_tbl_3src, //!< SVE table lookup (three sources)
AMED_AARCH64_ICLASS_sve_int_perm_unpk, //!< SVE unpack vector elements
AMED_AARCH64_ICLASS_sve_int_pfalse, //!< SVE predicate zero
AMED_AARCH64_ICLASS_sve_int_pfirst, //!< SVE predicate first active
AMED_AARCH64_ICLASS_sve_int_pnext, //!< SVE predicate next active
AMED_AARCH64_ICLASS_sve_int_pred_log, //!< SVE predicate logical operations
AMED_AARCH64_ICLASS_sve_int_pred_pattern_a, //!< SVE inc/dec register by element count
AMED_AARCH64_ICLASS_sve_int_pred_pattern_b, //!< SVE saturating inc/dec register by element count
AMED_AARCH64_ICLASS_sve_int_ptest, //!< SVE predicate test
AMED_AARCH64_ICLASS_sve_int_ptrue, //!< SVE predicate initialize
AMED_AARCH64_ICLASS_sve_int_rdffr, //!< SVE predicate read from FFR (predicated)
AMED_AARCH64_ICLASS_sve_int_rdffr_2, //!< SVE predicate read from FFR (unpredicated)
AMED_AARCH64_ICLASS_sve_int_read_vl_a, //!< SVE stack frame size
AMED_AARCH64_ICLASS_sve_int_reduce_0, //!< SVE integer add reduction (predicated)
AMED_AARCH64_ICLASS_sve_int_reduce_1, //!< SVE integer min/max reduction (predicated)
AMED_AARCH64_ICLASS_sve_int_reduce_2, //!< SVE bitwise logical reduction (predicated)
AMED_AARCH64_ICLASS_sve_int_rotate_imm, //!< sve_int_rotate_imm
AMED_AARCH64_ICLASS_sve_int_scmp_vi, //!< SVE integer compare with signed immediate
AMED_AARCH64_ICLASS_sve_int_sel_vvv, //!< SVE select vector elements (predicated)
AMED_AARCH64_ICLASS_sve_int_setffr, //!< SVE FFR initialise
AMED_AARCH64_ICLASS_sve_int_sqdmulh, //!< SVE2 signed saturating doubling multiply high (unpredicated)
AMED_AARCH64_ICLASS_sve_int_tern_log, //!< SVE2 bitwise ternary operations
AMED_AARCH64_ICLASS_sve_int_ucmp_vi, //!< SVE integer compare with unsigned immediate
AMED_AARCH64_ICLASS_sve_int_un_pred_arit_0, //!< SVE integer unary operations (predicated)
AMED_AARCH64_ICLASS_sve_int_un_pred_arit_1, //!< SVE bitwise unary operations (predicated)
AMED_AARCH64_ICLASS_sve_int_while_rr, //!< SVE integer compare scalar count and limit
AMED_AARCH64_ICLASS_sve_int_whilenc, //!< SVE pointer conflict compare
AMED_AARCH64_ICLASS_sve_int_wrffr, //!< SVE FFR write from predicate
AMED_AARCH64_ICLASS_sve_intx_aba, //!< SVE2 integer absolute difference and accumulate
AMED_AARCH64_ICLASS_sve_intx_aba_long, //!< SVE2 integer absolute difference and accumulate long
AMED_AARCH64_ICLASS_sve_intx_accumulate_long_pairs, //!< SVE2 integer pairwise add and accumulate long
AMED_AARCH64_ICLASS_sve_intx_adc_long, //!< SVE2 integer add/subtract long with carry
AMED_AARCH64_ICLASS_sve_intx_arith_binary_pairs, //!< SVE2 integer pairwise arithmetic
AMED_AARCH64_ICLASS_sve_intx_arith_narrow, //!< SVE2 integer add/subtract narrow high part
AMED_AARCH64_ICLASS_sve_intx_bin_pred_shift_sat_round, //!< SVE2 saturating/rounding bitwise shift left (predicated)
AMED_AARCH64_ICLASS_sve_intx_cadd, //!< SVE2 complex integer add
AMED_AARCH64_ICLASS_sve_intx_cdot, //!< SVE2 complex integer dot product
AMED_AARCH64_ICLASS_sve_intx_cdot_by_indexed_elem, //!< SVE2 complex integer dot product (indexed)
AMED_AARCH64_ICLASS_sve_intx_clong, //!< SVE2 integer add/subtract interleaved long
AMED_AARCH64_ICLASS_sve_intx_cmla, //!< SVE2 complex integer multiply-add
AMED_AARCH64_ICLASS_sve_intx_cmla_by_indexed_elem, //!< SVE2 complex integer multiply-add (indexed)
AMED_AARCH64_ICLASS_sve_intx_cons_arith_long, //!< SVE2 integer add/subtract long
AMED_AARCH64_ICLASS_sve_intx_cons_arith_wide, //!< SVE2 integer add/subtract wide
AMED_AARCH64_ICLASS_sve_intx_cons_mul_long, //!< SVE2 integer multiply long
AMED_AARCH64_ICLASS_sve_intx_dot, //!< SVE integer dot product (unpredicated)
AMED_AARCH64_ICLASS_sve_intx_dot_by_indexed_elem, //!< SVE integer dot product (indexed)
AMED_AARCH64_ICLASS_sve_intx_eorx, //!< SVE2 bitwise exclusive-or interleaved
AMED_AARCH64_ICLASS_sve_intx_extract_narrow, //!< SVE2 saturating extract narrow
AMED_AARCH64_ICLASS_sve_intx_histcnt, //!< SVE2 histogram generation (vector)
AMED_AARCH64_ICLASS_sve_intx_histseg, //!< SVE2 histogram generation (segment)
AMED_AARCH64_ICLASS_sve_intx_match, //!< SVE2 character match
AMED_AARCH64_ICLASS_sve_intx_mixed_dot, //!< SVE mixed sign dot product
AMED_AARCH64_ICLASS_sve_intx_mixed_dot_by_indexed_elem, //!< SVE mixed sign dot product (indexed)
AMED_AARCH64_ICLASS_sve_intx_mla_by_indexed_elem, //!< SVE2 integer multiply-add (indexed)
AMED_AARCH64_ICLASS_sve_intx_mla_long_by_indexed_elem, //!< SVE2 integer multiply-add long (indexed)
AMED_AARCH64_ICLASS_sve_intx_mlal_long, //!< SVE2 integer multiply-add long
AMED_AARCH64_ICLASS_sve_intx_mmla, //!< SVE integer matrix multiply accumulate
AMED_AARCH64_ICLASS_sve_intx_mul_by_indexed_elem, //!< SVE2 integer multiply (indexed)
AMED_AARCH64_ICLASS_sve_intx_mul_long_by_indexed_elem, //!< SVE2 integer multiply long (indexed)
AMED_AARCH64_ICLASS_sve_intx_perm_bit, //!< SVE2 bitwise permute
AMED_AARCH64_ICLASS_sve_intx_perm_extract_i, //!< SVE2 extract vector (immediate offset, constructive)
AMED_AARCH64_ICLASS_sve_intx_perm_splice, //!< SVE2 vector splice (constructive)
AMED_AARCH64_ICLASS_sve_intx_pred_arith_binary, //!< SVE2 integer halving add/subtract (predicated)
AMED_AARCH64_ICLASS_sve_intx_pred_arith_binary_sat, //!< SVE2 saturating add/subtract
AMED_AARCH64_ICLASS_sve_intx_pred_arith_unary, //!< SVE2 integer unary operations (predicated)
AMED_AARCH64_ICLASS_sve_intx_qdmla_long_by_indexed_elem, //!< SVE2 saturating multiply-add (indexed)
AMED_AARCH64_ICLASS_sve_intx_qdmlal_long, //!< SVE2 saturating multiply-add long
AMED_AARCH64_ICLASS_sve_intx_qdmlalbt, //!< SVE2 saturating multiply-add interleaved long
AMED_AARCH64_ICLASS_sve_intx_qdmul_long_by_indexed_elem, //!< SVE2 saturating multiply (indexed)
AMED_AARCH64_ICLASS_sve_intx_qdmulh_by_indexed_elem, //!< SVE2 saturating multiply high (indexed)
AMED_AARCH64_ICLASS_sve_intx_qrdcmla_by_indexed_elem, //!< SVE2 complex saturating multiply-add (indexed)
AMED_AARCH64_ICLASS_sve_intx_qrdmlah, //!< SVE2 saturating multiply-add high
AMED_AARCH64_ICLASS_sve_intx_qrdmlah_by_indexed_elem, //!< SVE2 saturating multiply-add high (indexed)
AMED_AARCH64_ICLASS_sve_intx_shift_insert, //!< SVE2 bitwise shift and insert
AMED_AARCH64_ICLASS_sve_intx_shift_long, //!< SVE2 bitwise shift left long
AMED_AARCH64_ICLASS_sve_intx_shift_narrow, //!< SVE2 bitwise shift right narrow
AMED_AARCH64_ICLASS_sve_intx_sra, //!< SVE2 bitwise shift right and accumulate
AMED_AARCH64_ICLASS_sve_mem_32b_fill, //!< SVE load vector register
AMED_AARCH64_ICLASS_sve_mem_32b_gld_sv_a, //!< SVE 32-bit gather load halfwords (scalar plus 32-bit scaled offsets)
AMED_AARCH64_ICLASS_sve_mem_32b_gld_sv_b, //!< SVE 32-bit gather load words (scalar plus 32-bit scaled offsets)
AMED_AARCH64_ICLASS_sve_mem_32b_gld_vi, //!< SVE 32-bit gather load (vector plus immediate)
AMED_AARCH64_ICLASS_sve_mem_32b_gld_vs, //!< SVE 32-bit gather load (scalar plus 32-bit unscaled offsets)
AMED_AARCH64_ICLASS_sve_mem_32b_gldnt_vs, //!< SVE2 32-bit gather non-temporal load (scalar plus 32-bit unscaled offsets)
AMED_AARCH64_ICLASS_sve_mem_32b_pfill, //!< SVE load predicate register
AMED_AARCH64_ICLASS_sve_mem_32b_prfm_sv, //!< SVE 32-bit gather prefetch (scalar plus 32-bit scaled offsets)
AMED_AARCH64_ICLASS_sve_mem_32b_prfm_vi, //!< SVE 32-bit gather prefetch (vector plus immediate)
AMED_AARCH64_ICLASS_sve_mem_64b_gld_sv, //!< SVE 64-bit gather load (scalar plus 32-bit unpacked scaled offsets)
AMED_AARCH64_ICLASS_sve_mem_64b_gld_sv2, //!< SVE 64-bit gather load (scalar plus 64-bit scaled offsets)
AMED_AARCH64_ICLASS_sve_mem_64b_gld_vi, //!< SVE 64-bit gather load (vector plus immediate)
AMED_AARCH64_ICLASS_sve_mem_64b_gld_vs, //!< SVE 64-bit gather load (scalar plus unpacked 32-bit unscaled offsets)
AMED_AARCH64_ICLASS_sve_mem_64b_gld_vs2, //!< SVE 64-bit gather load (scalar plus 64-bit unscaled offsets)
AMED_AARCH64_ICLASS_sve_mem_64b_gldnt_vs, //!< SVE2 64-bit gather non-temporal load (scalar plus unpacked 32-bit unscaled offsets)
AMED_AARCH64_ICLASS_sve_mem_64b_prfm_sv, //!< SVE 64-bit gather prefetch (scalar plus unpacked 32-bit scaled offsets)
AMED_AARCH64_ICLASS_sve_mem_64b_prfm_sv2, //!< SVE 64-bit gather prefetch (scalar plus 64-bit scaled offsets)
AMED_AARCH64_ICLASS_sve_mem_64b_prfm_vi, //!< SVE 64-bit gather prefetch (vector plus immediate)
AMED_AARCH64_ICLASS_sve_mem_cld_si, //!< SVE contiguous load (scalar plus immediate)
AMED_AARCH64_ICLASS_sve_mem_cld_ss, //!< SVE contiguous load (scalar plus scalar)
AMED_AARCH64_ICLASS_sve_mem_cldff_ss, //!< SVE contiguous first-fault load (scalar plus scalar)
AMED_AARCH64_ICLASS_sve_mem_cldnf_si, //!< SVE contiguous non-fault load (scalar plus immediate)
AMED_AARCH64_ICLASS_sve_mem_cldnt_si, //!< SVE contiguous non-temporal load (scalar plus immediate)
AMED_AARCH64_ICLASS_sve_mem_cldnt_ss, //!< SVE contiguous non-temporal load (scalar plus scalar)
AMED_AARCH64_ICLASS_sve_mem_cst_si, //!< SVE contiguous store (scalar plus immediate)
AMED_AARCH64_ICLASS_sve_mem_cst_ss, //!< SVE contiguous store (scalar plus scalar)
AMED_AARCH64_ICLASS_sve_mem_cstnt_si, //!< SVE contiguous non-temporal store (scalar plus immediate)
AMED_AARCH64_ICLASS_sve_mem_cstnt_ss, //!< SVE contiguous non-temporal store (scalar plus scalar)
AMED_AARCH64_ICLASS_sve_mem_eld_si, //!< SVE load multiple structures (scalar plus immediate)
AMED_AARCH64_ICLASS_sve_mem_eld_ss, //!< SVE load multiple structures (scalar plus scalar)
AMED_AARCH64_ICLASS_sve_mem_est_si, //!< SVE store multiple structures (scalar plus immediate)
AMED_AARCH64_ICLASS_sve_mem_est_ss, //!< SVE store multiple structures (scalar plus scalar)
AMED_AARCH64_ICLASS_sve_mem_ld_dup, //!< SVE load and broadcast element
AMED_AARCH64_ICLASS_sve_mem_ldqr_si, //!< SVE load and broadcast quadword (scalar plus immediate)
AMED_AARCH64_ICLASS_sve_mem_ldqr_ss, //!< SVE load and broadcast quadword (scalar plus scalar)
AMED_AARCH64_ICLASS_sve_mem_prfm_si, //!< SVE contiguous prefetch (scalar plus immediate)
AMED_AARCH64_ICLASS_sve_mem_prfm_ss, //!< SVE contiguous prefetch (scalar plus scalar)
AMED_AARCH64_ICLASS_sve_mem_pspill, //!< SVE store predicate register
AMED_AARCH64_ICLASS_sve_mem_spill, //!< SVE store vector register
AMED_AARCH64_ICLASS_sve_mem_sst_sv2, //!< SVE 64-bit scatter store (scalar plus 64-bit scaled offsets)
AMED_AARCH64_ICLASS_sve_mem_sst_sv_a, //!< SVE 64-bit scatter store (scalar plus unpacked 32-bit scaled offsets)
AMED_AARCH64_ICLASS_sve_mem_sst_sv_b, //!< SVE 32-bit scatter store (scalar plus 32-bit scaled offsets)
AMED_AARCH64_ICLASS_sve_mem_sst_vi_a, //!< SVE 64-bit scatter store (vector plus immediate)
AMED_AARCH64_ICLASS_sve_mem_sst_vi_b, //!< SVE 32-bit scatter store (vector plus immediate)
AMED_AARCH64_ICLASS_sve_mem_sst_vs2, //!< SVE 64-bit scatter store (scalar plus 64-bit unscaled offsets)
AMED_AARCH64_ICLASS_sve_mem_sst_vs_a, //!< SVE 64-bit scatter store (scalar plus unpacked 32-bit unscaled offsets)
AMED_AARCH64_ICLASS_sve_mem_sst_vs_b, //!< SVE 32-bit scatter store (scalar plus 32-bit unscaled offsets)
AMED_AARCH64_ICLASS_sve_mem_sstnt_32b_vs, //!< SVE2 32-bit scatter non-temporal store (vector plus scalar)
AMED_AARCH64_ICLASS_sve_mem_sstnt_64b_vs, //!< SVE2 64-bit scatter non-temporal store (vector plus scalar)
} amed_aarch64_iclass;
#define AMED_AARCH64_PSTATEFIELD_MAX_TEXT_LENGTH (7 + 1)
typedef enum _amed_aarch64_pstatefield
{
AMED_AARCH64_PSTATEFIELD_NONE,
AMED_AARCH64_PSTATEFIELD_DAIFClr,
AMED_AARCH64_PSTATEFIELD_DAIFSet,
AMED_AARCH64_PSTATEFIELD_DIT,
AMED_AARCH64_PSTATEFIELD_PAN,
AMED_AARCH64_PSTATEFIELD_SPSel,
AMED_AARCH64_PSTATEFIELD_SSBS,
AMED_AARCH64_PSTATEFIELD_TCO,
AMED_AARCH64_PSTATEFIELD_UAO,
} amed_aarch64_pstatefield;
#define AMED_AARCH64_GROUP_MAX_TEXT_LENGTH (31 + 1)
typedef enum _amed_aarch64_group
{
AMED_AARCH64_GROUP_NONE,
AMED_AARCH64_GROUP_invalid, //!< invalid
AMED_AARCH64_GROUP_control, //!< Branches, Exception Generating and System instructions
AMED_AARCH64_GROUP_dpimm, //!< Data Processing -- Immediate
AMED_AARCH64_GROUP_dpreg, //!< Data Processing -- Register
AMED_AARCH64_GROUP_reserved, //!< Reserved
AMED_AARCH64_GROUP_ldst, //!< Loads and Stores
AMED_AARCH64_GROUP_simd_dp, //!< Data Processing -- Scalar Floating-Point and Advanced SIMD
AMED_AARCH64_GROUP_sve, //!< SVE encodings
AMED_AARCH64_GROUP_sve_alloca, //!< SVE Stack Allocation
AMED_AARCH64_GROUP_sve_cmpgpr, //!< SVE Integer Compare - Scalars
AMED_AARCH64_GROUP_sve_cmpvec, //!< SVE Integer Compare - Vectors
AMED_AARCH64_GROUP_sve_countelt, //!< SVE Element Count
AMED_AARCH64_GROUP_sve_fp_cmpzero, //!< SVE Floating Point Compare - with Zero
AMED_AARCH64_GROUP_sve_fp_fma, //!< SVE Floating Point Multiply-Add
AMED_AARCH64_GROUP_sve_fp_fma_long, //!< SVE Floating Point Widening Multiply-Add
AMED_AARCH64_GROUP_sve_fp_fma_long_by_indexed_elem, //!< SVE Floating Point Widening Multiply-Add - Indexed
AMED_AARCH64_GROUP_sve_fp_pred, //!< SVE Floating Point Arithmetic - Predicated
AMED_AARCH64_GROUP_sve_fp_unary, //!< SVE Floating Point Unary Operations - Predicated
AMED_AARCH64_GROUP_sve_fp_unary_unpred, //!< SVE Floating Point Unary Operations - Unpredicated
AMED_AARCH64_GROUP_sve_index, //!< SVE Index Generation
AMED_AARCH64_GROUP_sve_int_muladd_pred, //!< SVE Integer Multiply-Add - Predicated
AMED_AARCH64_GROUP_sve_int_pred_bin, //!< SVE Integer Binary Arithmetic - Predicated
AMED_AARCH64_GROUP_sve_int_pred_red, //!< SVE Integer Reduction
AMED_AARCH64_GROUP_sve_int_pred_shift, //!< SVE Bitwise Shift - Predicated
AMED_AARCH64_GROUP_sve_int_pred_un, //!< SVE Integer Unary Arithmetic - Predicated
AMED_AARCH64_GROUP_sve_int_unpred_arit_b, //!< SVE2 Integer Multiply - Unpredicated
AMED_AARCH64_GROUP_sve_int_unpred_logical, //!< SVE Bitwise Logical - Unpredicated
AMED_AARCH64_GROUP_sve_int_unpred_misc, //!< SVE Integer Misc - Unpredicated
AMED_AARCH64_GROUP_sve_int_unpred_shift, //!< SVE Bitwise Shift - Unpredicated
AMED_AARCH64_GROUP_sve_intx_acc, //!< SVE2 Accumulate
AMED_AARCH64_GROUP_sve_intx_by_indexed_elem, //!< SVE Multiply - Indexed
AMED_AARCH64_GROUP_sve_intx_cons_widening, //!< SVE2 Widening Integer Arithmetic
AMED_AARCH64_GROUP_sve_intx_constructive, //!< SVE Misc
AMED_AARCH64_GROUP_sve_intx_crypto, //!< SVE2 Crypto Extensions
AMED_AARCH64_GROUP_sve_intx_histseg, //!< SVE2 Histogram Computation - Segment
AMED_AARCH64_GROUP_sve_intx_muladd_unpred, //!< SVE Integer Multiply-Add - Unpredicated
AMED_AARCH64_GROUP_sve_intx_narrowing, //!< SVE2 Narrowing
AMED_AARCH64_GROUP_sve_intx_predicated, //!< SVE2 Integer - Predicated
AMED_AARCH64_GROUP_sve_maskimm, //!< SVE Bitwise Immediate
AMED_AARCH64_GROUP_sve_mem32, //!< SVE Memory - 32-bit Gather and Unsized Contiguous
AMED_AARCH64_GROUP_sve_mem64, //!< SVE Memory - 64-bit Gather
AMED_AARCH64_GROUP_sve_memcld, //!< SVE Memory - Contiguous Load
AMED_AARCH64_GROUP_sve_memst_cs, //!< SVE Memory - Contiguous Store and Unsized Contiguous
AMED_AARCH64_GROUP_sve_memst_nt, //!< SVE Memory - Non-temporal and Multi-register Store
AMED_AARCH64_GROUP_sve_memst_si, //!< SVE Memory - Contiguous Store with Immediate Offset
AMED_AARCH64_GROUP_sve_memst_ss, //!< SVE Memory - Scatter with Optional Sign Extend
AMED_AARCH64_GROUP_sve_memst_ss2, //!< SVE Memory - Scatter
AMED_AARCH64_GROUP_sve_perm_extract, //!< SVE Permute Vector - Extract
AMED_AARCH64_GROUP_sve_perm_pred, //!< SVE Permute Vector - Predicated
AMED_AARCH64_GROUP_sve_perm_predicates, //!< SVE Permute Predicate
AMED_AARCH64_GROUP_sve_perm_unpred, //!< SVE Permute Vector - Unpredicated
AMED_AARCH64_GROUP_sve_pred_count_b, //!< SVE Inc/Dec by Predicate Count
AMED_AARCH64_GROUP_sve_pred_gen_b, //!< SVE Propagate Break
AMED_AARCH64_GROUP_sve_pred_gen_c, //!< SVE Partition Break
AMED_AARCH64_GROUP_sve_pred_gen_d, //!< SVE Predicate Misc
AMED_AARCH64_GROUP_sve_pred_wrffr, //!< SVE Write FFR
AMED_AARCH64_GROUP_sve_wideimm_pred, //!< SVE Integer Wide Immediate - Predicated
AMED_AARCH64_GROUP_sve_wideimm_unpred, //!< SVE Integer Wide Immediate - Unpredicated
} amed_aarch64_group;
#define AMED_AARCH64_SYMBOL_MAX_TEXT_LENGTH (15 + 1)
typedef enum _amed_aarch64_symbol
{
AMED_AARCH64_SYMBOL_NONE,
AMED_AARCH64_SYMBOL_amount,
AMED_AARCH64_SYMBOL_at_op,
AMED_AARCH64_SYMBOL_cond,
AMED_AARCH64_SYMBOL_const,
AMED_AARCH64_SYMBOL_dc_op,
AMED_AARCH64_SYMBOL_extend,
AMED_AARCH64_SYMBOL_fbits_right,
AMED_AARCH64_SYMBOL_ic_op,
AMED_AARCH64_SYMBOL_imm,
AMED_AARCH64_SYMBOL_imm1,
AMED_AARCH64_SYMBOL_imm2,
AMED_AARCH64_SYMBOL_imm6,
AMED_AARCH64_SYMBOL_immr,
AMED_AARCH64_SYMBOL_imms,
AMED_AARCH64_SYMBOL_label,
AMED_AARCH64_SYMBOL_aimm,
AMED_AARCH64_SYMBOL_vfpimm,
AMED_AARCH64_SYMBOL_advimm,
AMED_AARCH64_SYMBOL_imm8,
AMED_AARCH64_SYMBOL_lsb,
AMED_AARCH64_SYMBOL_mask,
AMED_AARCH64_SYMBOL_mod,
AMED_AARCH64_SYMBOL_nzcv,
AMED_AARCH64_SYMBOL_op1,
AMED_AARCH64_SYMBOL_op2,
AMED_AARCH64_SYMBOL_WideImmInverted,
AMED_AARCH64_SYMBOL_WideImmAlias,
AMED_AARCH64_SYMBOL_option,
AMED_AARCH64_SYMBOL_pattern,
AMED_AARCH64_SYMBOL_pimm,
AMED_AARCH64_SYMBOL_prfop,
AMED_AARCH64_SYMBOL_pstatefield,
AMED_AARCH64_SYMBOL_rotate,
AMED_AARCH64_SYMBOL_shift,
AMED_AARCH64_SYMBOL_shift_left,
AMED_AARCH64_SYMBOL_shift_right,
AMED_AARCH64_SYMBOL_shifter,
AMED_AARCH64_SYMBOL_simm,
AMED_AARCH64_SYMBOL_systemreg,
AMED_AARCH64_SYMBOL_targets,
AMED_AARCH64_SYMBOL_tlbi_op,
AMED_AARCH64_SYMBOL_uimm4,
AMED_AARCH64_SYMBOL_uimm6,
AMED_AARCH64_SYMBOL_width,
AMED_AARCH64_SYMBOL_GPR32,
AMED_AARCH64_SYMBOL_GPR64,
AMED_AARCH64_SYMBOL_SIMD8,
AMED_AARCH64_SYMBOL_SIMD16,
AMED_AARCH64_SYMBOL_SIMD32,
AMED_AARCH64_SYMBOL_SIMD64,
AMED_AARCH64_SYMBOL_SIMD128,
AMED_AARCH64_SYMBOL_VECREG,
AMED_AARCH64_SYMBOL_PRDREG,
AMED_AARCH64_SYMBOL_SVEREG,
AMED_AARCH64_SYMBOL_Bd,
AMED_AARCH64_SYMBOL_Bdn,
AMED_AARCH64_SYMBOL_Bm,
AMED_AARCH64_SYMBOL_Bn,
AMED_AARCH64_SYMBOL_Bt,
AMED_AARCH64_SYMBOL_Cm,
AMED_AARCH64_SYMBOL_Cn,
AMED_AARCH64_SYMBOL_Da,
AMED_AARCH64_SYMBOL_Dd,
AMED_AARCH64_SYMBOL_Ddn,
AMED_AARCH64_SYMBOL_Dm,
AMED_AARCH64_SYMBOL_Dn,
AMED_AARCH64_SYMBOL_Dt,
AMED_AARCH64_SYMBOL_Dt1,
AMED_AARCH64_SYMBOL_Dt2,
AMED_AARCH64_SYMBOL_Ha,
AMED_AARCH64_SYMBOL_Hd,
AMED_AARCH64_SYMBOL_Hdn,
AMED_AARCH64_SYMBOL_Hm,
AMED_AARCH64_SYMBOL_Hn,
AMED_AARCH64_SYMBOL_Ht,
AMED_AARCH64_SYMBOL_Pd,
AMED_AARCH64_SYMBOL_Pdm,
AMED_AARCH64_SYMBOL_Pdn,
AMED_AARCH64_SYMBOL_Pg,
AMED_AARCH64_SYMBOL_Pm,
AMED_AARCH64_SYMBOL_Pn,
AMED_AARCH64_SYMBOL_Pt,
AMED_AARCH64_SYMBOL_Qd,
AMED_AARCH64_SYMBOL_Qn,
AMED_AARCH64_SYMBOL_Qt,
AMED_AARCH64_SYMBOL_Qt1,
AMED_AARCH64_SYMBOL_Qt2,
AMED_AARCH64_SYMBOL_Sa,
AMED_AARCH64_SYMBOL_Sd,
AMED_AARCH64_SYMBOL_Sdn,
AMED_AARCH64_SYMBOL_Sm,
AMED_AARCH64_SYMBOL_Sn,
AMED_AARCH64_SYMBOL_St,
AMED_AARCH64_SYMBOL_St1,
AMED_AARCH64_SYMBOL_St2,
AMED_AARCH64_SYMBOL_Va,
AMED_AARCH64_SYMBOL_Vd,
AMED_AARCH64_SYMBOL_Vm,
AMED_AARCH64_SYMBOL_Vn,
AMED_AARCH64_SYMBOL_Vt,
AMED_AARCH64_SYMBOL_Wa,
AMED_AARCH64_SYMBOL_Wd,
AMED_AARCH64_SYMBOL_Wdn,
AMED_AARCH64_SYMBOL_Wm,
AMED_AARCH64_SYMBOL_Wn,
AMED_AARCH64_SYMBOL_Ws,
AMED_AARCH64_SYMBOL_WsPair,
AMED_AARCH64_SYMBOL_Wt,
AMED_AARCH64_SYMBOL_Wt1,
AMED_AARCH64_SYMBOL_Wt2,
AMED_AARCH64_SYMBOL_WtPair,
AMED_AARCH64_SYMBOL_Xa,
AMED_AARCH64_SYMBOL_Xd,
AMED_AARCH64_SYMBOL_Xdn,
AMED_AARCH64_SYMBOL_Xm,
AMED_AARCH64_SYMBOL_Xn,
AMED_AARCH64_SYMBOL_Xs,
AMED_AARCH64_SYMBOL_XsPair,
AMED_AARCH64_SYMBOL_Xt,
AMED_AARCH64_SYMBOL_Xt1,
AMED_AARCH64_SYMBOL_Xt2,
AMED_AARCH64_SYMBOL_XtPair,
AMED_AARCH64_SYMBOL_ZM,
AMED_AARCH64_SYMBOL_Za,
AMED_AARCH64_SYMBOL_Zd,
AMED_AARCH64_SYMBOL_Zda,
AMED_AARCH64_SYMBOL_Zdn,
AMED_AARCH64_SYMBOL_Zk,
AMED_AARCH64_SYMBOL_Zm,
AMED_AARCH64_SYMBOL_Zn,
AMED_AARCH64_SYMBOL_Zn1,
AMED_AARCH64_SYMBOL_Zt,
AMED_AARCH64_SYMBOL_Zt1,
} amed_aarch64_symbol;
#define AMED_AARCH64_NODE_TYPE_MAX_TEXT_LENGTH (11 + 1)
typedef enum _amed_aarch64_node_type
{
AMED_AARCH64_NODE_TYPE_NONE,
AMED_AARCH64_NODE_TYPE_AT_OP,
AMED_AARCH64_NODE_TYPE_DC_OP,
AMED_AARCH64_NODE_TYPE_IC_OP,
AMED_AARCH64_NODE_TYPE_TLBI_OP,
AMED_AARCH64_NODE_TYPE_SYNC_OP,
AMED_AARCH64_NODE_TYPE_CTX_OP,
AMED_AARCH64_NODE_TYPE_PRF_OP,
AMED_AARCH64_NODE_TYPE_BTI_OP,
AMED_AARCH64_NODE_TYPE_PSTATEFIELD,
AMED_AARCH64_NODE_TYPE_BARRIER,
AMED_AARCH64_NODE_TYPE_COND,
AMED_AARCH64_NODE_TYPE_INVCOND,
AMED_AARCH64_NODE_TYPE_BASE,
AMED_AARCH64_NODE_TYPE_VBASE,
AMED_AARCH64_NODE_TYPE_EBASE,
AMED_AARCH64_NODE_TYPE_REG,
AMED_AARCH64_NODE_TYPE_REGSH,
AMED_AARCH64_NODE_TYPE_VREG,
AMED_AARCH64_NODE_TYPE_EREG,
AMED_AARCH64_NODE_TYPE_PREG,
AMED_AARCH64_NODE_TYPE_REGOFF,
AMED_AARCH64_NODE_TYPE_REGOFFSH,
AMED_AARCH64_NODE_TYPE_VREGOFF,
AMED_AARCH64_NODE_TYPE_VREGOFFSH,
AMED_AARCH64_NODE_TYPE_VDS,
AMED_AARCH64_NODE_TYPE_VDT,
AMED_AARCH64_NODE_TYPE_VLIST,
AMED_AARCH64_NODE_TYPE_ELIST,
AMED_AARCH64_NODE_TYPE_COUNT,
AMED_AARCH64_NODE_TYPE_IDX,
AMED_AARCH64_NODE_TYPE_SHIFTER,
AMED_AARCH64_NODE_TYPE_SHIFT,
AMED_AARCH64_NODE_TYPE_EXTEND,
AMED_AARCH64_NODE_TYPE_AMOUNT,
AMED_AARCH64_NODE_TYPE_PATTERN,
AMED_AARCH64_NODE_TYPE_PATTERNSH,
AMED_AARCH64_NODE_TYPE_FPIMM,
AMED_AARCH64_NODE_TYPE_IMM,
AMED_AARCH64_NODE_TYPE_IMMSH,
AMED_AARCH64_NODE_TYPE_IMMOFF,
AMED_AARCH64_NODE_TYPE_IMMOFFSH,
AMED_AARCH64_NODE_TYPE_LABEL,
AMED_AARCH64_NODE_TYPE_ADDR,
AMED_AARCH64_NODE_TYPE_MEM,
AMED_AARCH64_NODE_TYPE_SZ,
AMED_AARCH64_NODE_TYPE_CSPACE,
AMED_AARCH64_NODE_TYPE_SYSREG,
} amed_aarch64_node_type;


The GraphSCCFn
functor implements an algorithm for
calculating the strongly-connected components of a directed graph.
The resulting components are topologically-sorted; i.e., if a component
A comes before a component B in the result, then there is no
path from B to A (but there might be a path from A to B).
Synopsis
functor GraphSCCFn (Nd: ORD_KEY) :> GRAPH_SCC where Nd = Nd
Arguments
Nd: ORD_KEY
-
Nd : ORD_KEY
:: The argument structureNd
defines the type of graph nodes paired with a comparison function that is used by the algorithm to implement finite maps keyed by nodes.
Interface
structure Nd : ORD_KEY
type node = Nd.ord_key
datatype component
= SIMPLE of node
| RECURSIVE of node list
val topOrder' : digraph -> component list
val topOrder : digraph -> component list
Description
structure Nd : ORD_KEY
-
The argument structure.
type node = Nd.ord_key
-
The type of a node in the graph.
datatype component
-
The type of a component in the result. Components are either
SIMPLE
, consisting of a single node, orRECURSIVE
, consisting of a list of nodes that are all connected by cyclic paths. A single node with a self loop is represented by theRECURSIVE
constructor. val topOrder': { roots: node list, follow: node -> node list } -> component list
-
topOrder
{roots, follow}` returns a topologically-sorted list of strongly-connected components for a directed graph. The graph is specified by a list of root nodes and a follow (or successor) function that returns the list of successors for a node. The first component in the result will contain the first node in theroots
list. val topOrder : { root: node, follow: node -> node list } -> component list
-
topOrder {root, follow}
is equivalent to the expression
topOrder' {roots = [root], follow = follow}


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Reports exception instance creation without any arguments specified. When an exception is constructed
without arguments it contains no information about the fault that happened, which makes debugging needlessly hard.
Example:
throw new IOException(); // warning: exception without arguments


--- layout: chapters --- {% include chapter.html chapter=page %} {% assign next_chapter_number = page.chapter_number | plus: 1 %} {% assign next_chapter = site.chapters | where: 'chapter', next_chapter_number | first %} {% if next_chapter %}
Next chapter: {% include chapter-link.html chapter=next_chapter %}
{% endif %}


../ get-person-history-request/ get-person-history-response/ get-person-request/ get-person-response/ search-people-request/ search-people-response/


Christ the King Church choir remembers departed comrades
by Mathias MazingaThe memorial mass was presided over by the parish priest, the Rt Rev Msgr Gerald Kalumba, who urged the current choristers to emulate the values that their deceased colleagues demonstrated.
RELIGION
KAMPALA - Christ the King Church Choir, which leads the singing during the 10 o’clock mass at Christ the King Church, Kampala, has commemorated its deceased members, who ministered with the choir since its establishment in 1935.
Those who were remembered and prayed for during a special memorial mass at Christ the King Church, Kampala include Valerian Mayega (first Ugandan organist and music director), Aloysius Darlington Lubowa (first Ugandan conductor), Pantaleo Babinaga, Melanie Betubiza, Mathias Lutaaya, Blaise Ishungisa, Tony Sengo (organist), Francis Waddimba, Henry Kabuye, Josephine Luyima, Florence Sebalu, Margaret Kabasiita, Mary Wandera, Gertrude Ntege, Rose Namukasa, Agnes Yaniju, Maria Sebina and Rose Rwego Sibo.
Others are Mary Ssali, Pamela Lwanga Zaake, George Mugisha, Theresa Pule, Alice Ndikutuusa, John Menya Ochieng, Canis Mulindwa, Eva Seruyange, Joseph Lukwago, Jane Kayanja, Deogratias Kibuuka, Beav Mubiru, Raymond Bogere, Richard Kimuli, Engineer Wasanyi Serukenya, Betty Kigundu, Jane Francis Nango and Susan Lutwama.
The memorial mass was presided over by the parish priest, the Rt Rev Msgr Gerald Kalumba, who urged the current choristers to emulate the values that their deceased colleagues demonstrated.
Mass was also concelebrated by Fr Kazibwe, a son of organist Valerian Mayega, who himself is an accomplished organist.


Grunt plugin to generate table-of-contents based documentation sites (ala Backbone/Underscore) from Markdown.
See how this README looks as a tocdoc.
This plugin requires Grunt ~0.4.1
If you haven't used Grunt before, be sure to check out the Getting Started guide, as it explains how to create a Gruntfile as well as install and use Grunt plugins. Once you're familiar with that process, you may install this plugin with this command:
npm install grunt-tocdoc --save-dev
Once the plugin has been installed, it may be enabled inside your Gruntfile with this line of JavaScript:
grunt.loadNpmTasks('grunt-tocdoc');
In your project's Gruntfile, add a section named tocdoc
to the data object passed into grunt.initConfig()
.
grunt.initConfig({
tocdoc: {
options: {
// Task-specific options go here.
},
docSite: {
// Target-specific file lists and/or options go here.
},
},
})
Type: String
Default value: 'tocdoc.css'
The location in the filesystem (relative to your Gruntfile) where the required CSS file will be written.
Type: String
Default value: 'tocdoc.css'
The url where the HTML page should look for its required CSS. This may need to be different than the cssFilePath
if you are not writing them both to the root of your project.
Type: Array
Default value: null
An array of paths to JavaScript files to load on the generated HTML page.
In this example, the default options are used to generate API documention from a set of markdown files. So if the overview.md
and api.md
files are valid Markdown, then index.html
will list the overview content first, the api content second, and display a scrollable table of contents on the left-hand side. It will also output a file called tocdoc.css
side-by-side with your Gruntfile
to provide the necessary styles for your doc site.
grunt.initConfig({
tocdoc: {
options: {},
docSite: {
files: {
'index.html': ['overview.md', 'api.md'],
}
}
}
})
In this example, custom options are used to specify a different location for the css file because the generated documentation resides in a subdirectory. Note that cssFilePath
and cssUrl
are not the same in this case. The file path is relative to the Gruntfile
while the cssUrl
is relative to the html page.
grunt.initConfig({
tocdoc: {
options: {
cssFilePath: 'docs/styles.css',
cssUrl: 'styles.css',
scripts: ['js/jquery.js', 'js/my.jquery.plugin.js']
},
docSite: {
files: {
'docs/index.html': ['overview.md', 'api.md'],
}
}
}
})
Because grunt-tocdoc is based on Bootstrap, you have access to a wide range of CSS components you can use as needed. For instance, if you want to create a download button you can do so like this.
Download AwesomeLibrary.js
And it will look like this:
(Example is only visible on the tocdoc version of the readme.)
In lieu of a formal styleguide, take care to maintain the existing coding style. Add unit tests for any new or changed functionality. Lint and test your code using Grunt.
Initial release.