const std = @import("../std.zig");
const CpuFeature = std.Target.Cpu.Feature;
const CpuModel = std.Target.Cpu.Model;
pub const Feature = enum {
@"32bit",
@"8msecext",
a76,
aapcs_frame_chain,
aapcs_frame_chain_leaf,
aclass,
acquire_release,
aes,
atomics_32,
avoid_movs_shop,
avoid_partial_cpsr,
bf16,
big_endian_instructions,
cde,
cdecp0,
cdecp1,
cdecp2,
cdecp3,
cdecp4,
cdecp5,
cdecp6,
cdecp7,
cheap_predicable_cpsr,
clrbhb,
crc,
crypto,
d32,
db,
dfb,
disable_postra_scheduler,
dont_widen_vmovs,
dotprod,
dsp,
execute_only,
expand_fp_mlx,
exynos,
fix_cmse_cve_2021_35465,
fix_cortex_a57_aes_1742098,
fp16,
fp16fml,
fp64,
fp_armv8,
fp_armv8d16,
fp_armv8d16sp,
fp_armv8sp,
fpao,
fpregs,
fpregs16,
fpregs64,
fullfp16,
fuse_aes,
fuse_literals,
harden_sls_blr,
harden_sls_nocomdat,
harden_sls_retbr,
has_v4t,
has_v5t,
has_v5te,
has_v6,
has_v6k,
has_v6m,
has_v6t2,
has_v7,
has_v7clrex,
has_v8,
has_v8_1a,
has_v8_1m_main,
has_v8_2a,
has_v8_3a,
has_v8_4a,
has_v8_5a,
has_v8_6a,
has_v8_7a,
has_v8_8a,
has_v8_9a,
has_v8m,
has_v8m_main,
has_v9_1a,
has_v9_2a,
has_v9_3a,
has_v9_4a,
has_v9a,
hwdiv,
hwdiv_arm,
i8mm,
iwmmxt,
iwmmxt2,
lob,
long_calls,
loop_align,
m3,
mclass,
mp,
muxed_units,
mve,
mve1beat,
mve2beat,
mve4beat,
mve_fp,
nacl_trap,
neon,
neon_fpmovs,
neonfp,
no_branch_predictor,
no_bti_at_return_twice,
no_movt,
no_neg_immediates,
noarm,
nonpipelined_vfp,
pacbti,
perfmon,
prefer_ishst,
prefer_vmovsr,
prof_unpr,
r4,
ras,
rclass,
read_tp_hard,
reserve_r9,
ret_addr_stack,
sb,
sha2,
slow_fp_brcc,
slow_load_D_subreg,
slow_odd_reg,
slow_vdup32,
slow_vgetlni32,
slowfpvfmx,
slowfpvmlx,
soft_float,
splat_vfp_neon,
strict_align,
swift,
thumb2,
thumb_mode,
trustzone,
use_mipipeliner,
use_misched,
v2,
v2a,
v3,
v3m,
v4,
v4t,
v5t,
v5te,
v5tej,
v6,
v6j,
v6k,
v6kz,
v6m,
v6sm,
v6t2,
v7a,
v7em,
v7k,
v7m,
v7r,
v7s,
v7ve,
v8_1a,
v8_1m_main,
v8_2a,
v8_3a,
v8_4a,
v8_5a,
v8_6a,
v8_7a,
v8_8a,
v8_9a,
v8a,
v8m,
v8m_main,
v8r,
v9_1a,
v9_2a,
v9_3a,
v9_4a,
v9a,
vfp2,
vfp2sp,
vfp3,
vfp3d16,
vfp3d16sp,
vfp3sp,
vfp4,
vfp4d16,
vfp4d16sp,
vfp4sp,
virtualization,
vldn_align,
vmlx_forwarding,
vmlx_hazards,
wide_stride_vfp,
xscale,
zcz,
};
pub const featureSet = CpuFeature.feature_set_fns(Feature).featureSet;
pub const featureSetHas = CpuFeature.feature_set_fns(Feature).featureSetHas;
pub const featureSetHasAny = CpuFeature.feature_set_fns(Feature).featureSetHasAny;
pub const featureSetHasAll = CpuFeature.feature_set_fns(Feature).featureSetHasAll;
pub const all_features = blk: {
@setEvalBranchQuota(10000);
const len = @typeInfo(Feature).Enum.fields.len;
std.debug.assert(len <= CpuFeature.Set.needed_bit_count);
var result: [len]CpuFeature = undefined;
result[@intFromEnum(Feature.@"32bit")] = .{
.llvm_name = "32bit",
.description = "Prefer 32-bit Thumb instrs",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.@"8msecext")] = .{
.llvm_name = "8msecext",
.description = "Enable support for ARMv8-M Security Extensions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.a76)] = .{
.llvm_name = "a76",
.description = "Cortex-A76 ARM processors",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.aapcs_frame_chain)] = .{
.llvm_name = "aapcs-frame-chain",
.description = "Create an AAPCS compliant frame chain",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.aapcs_frame_chain_leaf)] = .{
.llvm_name = "aapcs-frame-chain-leaf",
.description = "Create an AAPCS compliant frame chain for leaf functions",
.dependencies = featureSet(&[_]Feature{
.aapcs_frame_chain,
}),
};
result[@intFromEnum(Feature.aclass)] = .{
.llvm_name = "aclass",
.description = "Is application profile ('A' series)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.acquire_release)] = .{
.llvm_name = "acquire-release",
.description = "Has v8 acquire/release (lda/ldaex etc) instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.aes)] = .{
.llvm_name = "aes",
.description = "Enable AES support",
.dependencies = featureSet(&[_]Feature{
.neon,
}),
};
result[@intFromEnum(Feature.atomics_32)] = .{
.llvm_name = "atomics-32",
.description = "Assume that lock-free 32-bit atomics are available",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.avoid_movs_shop)] = .{
.llvm_name = "avoid-movs-shop",
.description = "Avoid movs instructions with shifter operand",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.avoid_partial_cpsr)] = .{
.llvm_name = "avoid-partial-cpsr",
.description = "Avoid CPSR partial update for OOO execution",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.bf16)] = .{
.llvm_name = "bf16",
.description = "Enable support for BFloat16 instructions",
.dependencies = featureSet(&[_]Feature{
.neon,
}),
};
result[@intFromEnum(Feature.big_endian_instructions)] = .{
.llvm_name = "big-endian-instructions",
.description = "Expect instructions to be stored big-endian.",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.cde)] = .{
.llvm_name = "cde",
.description = "Support CDE instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8m_main,
}),
};
result[@intFromEnum(Feature.cdecp0)] = .{
.llvm_name = "cdecp0",
.description = "Coprocessor 0 ISA is CDEv1",
.dependencies = featureSet(&[_]Feature{
.cde,
}),
};
result[@intFromEnum(Feature.cdecp1)] = .{
.llvm_name = "cdecp1",
.description = "Coprocessor 1 ISA is CDEv1",
.dependencies = featureSet(&[_]Feature{
.cde,
}),
};
result[@intFromEnum(Feature.cdecp2)] = .{
.llvm_name = "cdecp2",
.description = "Coprocessor 2 ISA is CDEv1",
.dependencies = featureSet(&[_]Feature{
.cde,
}),
};
result[@intFromEnum(Feature.cdecp3)] = .{
.llvm_name = "cdecp3",
.description = "Coprocessor 3 ISA is CDEv1",
.dependencies = featureSet(&[_]Feature{
.cde,
}),
};
result[@intFromEnum(Feature.cdecp4)] = .{
.llvm_name = "cdecp4",
.description = "Coprocessor 4 ISA is CDEv1",
.dependencies = featureSet(&[_]Feature{
.cde,
}),
};
result[@intFromEnum(Feature.cdecp5)] = .{
.llvm_name = "cdecp5",
.description = "Coprocessor 5 ISA is CDEv1",
.dependencies = featureSet(&[_]Feature{
.cde,
}),
};
result[@intFromEnum(Feature.cdecp6)] = .{
.llvm_name = "cdecp6",
.description = "Coprocessor 6 ISA is CDEv1",
.dependencies = featureSet(&[_]Feature{
.cde,
}),
};
result[@intFromEnum(Feature.cdecp7)] = .{
.llvm_name = "cdecp7",
.description = "Coprocessor 7 ISA is CDEv1",
.dependencies = featureSet(&[_]Feature{
.cde,
}),
};
result[@intFromEnum(Feature.cheap_predicable_cpsr)] = .{
.llvm_name = "cheap-predicable-cpsr",
.description = "Disable +1 predication cost for instructions updating CPSR",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.clrbhb)] = .{
.llvm_name = "clrbhb",
.description = "Enable Clear BHB instruction",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.crc)] = .{
.llvm_name = "crc",
.description = "Enable support for CRC instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.crypto)] = .{
.llvm_name = "crypto",
.description = "Enable support for Cryptography extensions",
.dependencies = featureSet(&[_]Feature{
.aes,
.sha2,
}),
};
result[@intFromEnum(Feature.d32)] = .{
.llvm_name = "d32",
.description = "Extend FP to 32 double registers",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.db)] = .{
.llvm_name = "db",
.description = "Has data barrier (dmb/dsb) instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.dfb)] = .{
.llvm_name = "dfb",
.description = "Has full data barrier (dfb) instruction",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.disable_postra_scheduler)] = .{
.llvm_name = "disable-postra-scheduler",
.description = "Don't schedule again after register allocation",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.dont_widen_vmovs)] = .{
.llvm_name = "dont-widen-vmovs",
.description = "Don't widen VMOVS to VMOVD",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.dotprod)] = .{
.llvm_name = "dotprod",
.description = "Enable support for dot product instructions",
.dependencies = featureSet(&[_]Feature{
.neon,
}),
};
result[@intFromEnum(Feature.dsp)] = .{
.llvm_name = "dsp",
.description = "Supports DSP instructions in ARM and/or Thumb2",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.execute_only)] = .{
.llvm_name = "execute-only",
.description = "Enable the generation of execute only code.",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.expand_fp_mlx)] = .{
.llvm_name = "expand-fp-mlx",
.description = "Expand VFP/NEON MLA/MLS instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.exynos)] = .{
.llvm_name = "exynos",
.description = "Samsung Exynos processors",
.dependencies = featureSet(&[_]Feature{
.crc,
.crypto,
.expand_fp_mlx,
.fuse_aes,
.fuse_literals,
.hwdiv,
.hwdiv_arm,
.prof_unpr,
.ret_addr_stack,
.slow_fp_brcc,
.slow_vdup32,
.slow_vgetlni32,
.slowfpvfmx,
.slowfpvmlx,
.splat_vfp_neon,
.wide_stride_vfp,
.zcz,
}),
};
result[@intFromEnum(Feature.fix_cmse_cve_2021_35465)] = .{
.llvm_name = "fix-cmse-cve-2021-35465",
.description = "Mitigate against the cve-2021-35465 security vulnurability",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.fix_cortex_a57_aes_1742098)] = .{
.llvm_name = "fix-cortex-a57-aes-1742098",
.description = "Work around Cortex-A57 Erratum 1742098 / Cortex-A72 Erratum 1655431 (AES)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.fp16)] = .{
.llvm_name = "fp16",
.description = "Enable half-precision floating point",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.fp16fml)] = .{
.llvm_name = "fp16fml",
.description = "Enable full half-precision floating point fml instructions",
.dependencies = featureSet(&[_]Feature{
.fullfp16,
}),
};
result[@intFromEnum(Feature.fp64)] = .{
.llvm_name = "fp64",
.description = "Floating point unit supports double precision",
.dependencies = featureSet(&[_]Feature{
.fpregs64,
}),
};
result[@intFromEnum(Feature.fp_armv8)] = .{
.llvm_name = "fp-armv8",
.description = "Enable ARMv8 FP",
.dependencies = featureSet(&[_]Feature{
.fp_armv8d16,
.fp_armv8sp,
.vfp4,
}),
};
result[@intFromEnum(Feature.fp_armv8d16)] = .{
.llvm_name = "fp-armv8d16",
.description = "Enable ARMv8 FP with only 16 d-registers",
.dependencies = featureSet(&[_]Feature{
.fp_armv8d16sp,
.vfp4d16,
}),
};
result[@intFromEnum(Feature.fp_armv8d16sp)] = .{
.llvm_name = "fp-armv8d16sp",
.description = "Enable ARMv8 FP with only 16 d-registers and no double precision",
.dependencies = featureSet(&[_]Feature{
.vfp4d16sp,
}),
};
result[@intFromEnum(Feature.fp_armv8sp)] = .{
.llvm_name = "fp-armv8sp",
.description = "Enable ARMv8 FP with no double precision",
.dependencies = featureSet(&[_]Feature{
.fp_armv8d16sp,
.vfp4sp,
}),
};
result[@intFromEnum(Feature.fpao)] = .{
.llvm_name = "fpao",
.description = "Enable fast computation of positive address offsets",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.fpregs)] = .{
.llvm_name = "fpregs",
.description = "Enable FP registers",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.fpregs16)] = .{
.llvm_name = "fpregs16",
.description = "Enable 16-bit FP registers",
.dependencies = featureSet(&[_]Feature{
.fpregs,
}),
};
result[@intFromEnum(Feature.fpregs64)] = .{
.llvm_name = "fpregs64",
.description = "Enable 64-bit FP registers",
.dependencies = featureSet(&[_]Feature{
.fpregs,
}),
};
result[@intFromEnum(Feature.fullfp16)] = .{
.llvm_name = "fullfp16",
.description = "Enable full half-precision floating point",
.dependencies = featureSet(&[_]Feature{
.fp_armv8d16sp,
.fpregs16,
}),
};
result[@intFromEnum(Feature.fuse_aes)] = .{
.llvm_name = "fuse-aes",
.description = "CPU fuses AES crypto operations",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.fuse_literals)] = .{
.llvm_name = "fuse-literals",
.description = "CPU fuses literal generation operations",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.harden_sls_blr)] = .{
.llvm_name = "harden-sls-blr",
.description = "Harden against straight line speculation across indirect calls",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.harden_sls_nocomdat)] = .{
.llvm_name = "harden-sls-nocomdat",
.description = "Generate thunk code for SLS mitigation in the normal text section",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.harden_sls_retbr)] = .{
.llvm_name = "harden-sls-retbr",
.description = "Harden against straight line speculation across RETurn and BranchRegister instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.has_v4t)] = .{
.llvm_name = "v4t",
.description = "Support ARM v4T instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.has_v5t)] = .{
.llvm_name = "v5t",
.description = "Support ARM v5T instructions",
.dependencies = featureSet(&[_]Feature{
.has_v4t,
}),
};
result[@intFromEnum(Feature.has_v5te)] = .{
.llvm_name = "v5te",
.description = "Support ARM v5TE, v5TEj, and v5TExp instructions",
.dependencies = featureSet(&[_]Feature{
.has_v5t,
}),
};
result[@intFromEnum(Feature.has_v6)] = .{
.llvm_name = "v6",
.description = "Support ARM v6 instructions",
.dependencies = featureSet(&[_]Feature{
.has_v5te,
}),
};
result[@intFromEnum(Feature.has_v6k)] = .{
.llvm_name = "v6k",
.description = "Support ARM v6k instructions",
.dependencies = featureSet(&[_]Feature{
.has_v6,
}),
};
result[@intFromEnum(Feature.has_v6m)] = .{
.llvm_name = "v6m",
.description = "Support ARM v6M instructions",
.dependencies = featureSet(&[_]Feature{
.has_v6,
}),
};
result[@intFromEnum(Feature.has_v6t2)] = .{
.llvm_name = "v6t2",
.description = "Support ARM v6t2 instructions",
.dependencies = featureSet(&[_]Feature{
.has_v6k,
.has_v8m,
.thumb2,
}),
};
result[@intFromEnum(Feature.has_v7)] = .{
.llvm_name = "v7",
.description = "Support ARM v7 instructions",
.dependencies = featureSet(&[_]Feature{
.has_v6t2,
.has_v7clrex,
}),
};
result[@intFromEnum(Feature.has_v7clrex)] = .{
.llvm_name = "v7clrex",
.description = "Has v7 clrex instruction",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.has_v8)] = .{
.llvm_name = "v8",
.description = "Support ARM v8 instructions",
.dependencies = featureSet(&[_]Feature{
.acquire_release,
.has_v7,
.perfmon,
}),
};
result[@intFromEnum(Feature.has_v8_1a)] = .{
.llvm_name = "v8.1a",
.description = "Support ARM v8.1a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8,
}),
};
result[@intFromEnum(Feature.has_v8_1m_main)] = .{
.llvm_name = "v8.1m.main",
.description = "Support ARM v8-1M Mainline instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8m_main,
}),
};
result[@intFromEnum(Feature.has_v8_2a)] = .{
.llvm_name = "v8.2a",
.description = "Support ARM v8.2a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_1a,
}),
};
result[@intFromEnum(Feature.has_v8_3a)] = .{
.llvm_name = "v8.3a",
.description = "Support ARM v8.3a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_2a,
}),
};
result[@intFromEnum(Feature.has_v8_4a)] = .{
.llvm_name = "v8.4a",
.description = "Support ARM v8.4a instructions",
.dependencies = featureSet(&[_]Feature{
.dotprod,
.has_v8_3a,
}),
};
result[@intFromEnum(Feature.has_v8_5a)] = .{
.llvm_name = "v8.5a",
.description = "Support ARM v8.5a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_4a,
.sb,
}),
};
result[@intFromEnum(Feature.has_v8_6a)] = .{
.llvm_name = "v8.6a",
.description = "Support ARM v8.6a instructions",
.dependencies = featureSet(&[_]Feature{
.bf16,
.has_v8_5a,
.i8mm,
}),
};
result[@intFromEnum(Feature.has_v8_7a)] = .{
.llvm_name = "v8.7a",
.description = "Support ARM v8.7a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_6a,
}),
};
result[@intFromEnum(Feature.has_v8_8a)] = .{
.llvm_name = "v8.8a",
.description = "Support ARM v8.8a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_7a,
}),
};
result[@intFromEnum(Feature.has_v8_9a)] = .{
.llvm_name = "v8.9a",
.description = "Support ARM v8.9a instructions",
.dependencies = featureSet(&[_]Feature{
.clrbhb,
.has_v8_8a,
}),
};
result[@intFromEnum(Feature.has_v8m)] = .{
.llvm_name = "v8m",
.description = "Support ARM v8M Baseline instructions",
.dependencies = featureSet(&[_]Feature{
.has_v6m,
}),
};
result[@intFromEnum(Feature.has_v8m_main)] = .{
.llvm_name = "v8m.main",
.description = "Support ARM v8M Mainline instructions",
.dependencies = featureSet(&[_]Feature{
.has_v7,
}),
};
result[@intFromEnum(Feature.has_v9_1a)] = .{
.llvm_name = "v9.1a",
.description = "Support ARM v9.1a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_6a,
.has_v9a,
}),
};
result[@intFromEnum(Feature.has_v9_2a)] = .{
.llvm_name = "v9.2a",
.description = "Support ARM v9.2a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_7a,
.has_v9_1a,
}),
};
result[@intFromEnum(Feature.has_v9_3a)] = .{
.llvm_name = "v9.3a",
.description = "Support ARM v9.3a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_8a,
.has_v9_2a,
}),
};
result[@intFromEnum(Feature.has_v9_4a)] = .{
.llvm_name = "v9.4a",
.description = "Support ARM v9.4a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_9a,
.has_v9_3a,
}),
};
result[@intFromEnum(Feature.has_v9a)] = .{
.llvm_name = "v9a",
.description = "Support ARM v9a instructions",
.dependencies = featureSet(&[_]Feature{
.has_v8_5a,
}),
};
result[@intFromEnum(Feature.hwdiv)] = .{
.llvm_name = "hwdiv",
.description = "Enable divide instructions in Thumb",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.hwdiv_arm)] = .{
.llvm_name = "hwdiv-arm",
.description = "Enable divide instructions in ARM mode",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.i8mm)] = .{
.llvm_name = "i8mm",
.description = "Enable Matrix Multiply Int8 Extension",
.dependencies = featureSet(&[_]Feature{
.neon,
}),
};
result[@intFromEnum(Feature.iwmmxt)] = .{
.llvm_name = "iwmmxt",
.description = "ARMv5te architecture",
.dependencies = featureSet(&[_]Feature{
.v5te,
}),
};
result[@intFromEnum(Feature.iwmmxt2)] = .{
.llvm_name = "iwmmxt2",
.description = "ARMv5te architecture",
.dependencies = featureSet(&[_]Feature{
.v5te,
}),
};
result[@intFromEnum(Feature.lob)] = .{
.llvm_name = "lob",
.description = "Enable Low Overhead Branch extensions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.long_calls)] = .{
.llvm_name = "long-calls",
.description = "Generate calls via indirect call instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.loop_align)] = .{
.llvm_name = "loop-align",
.description = "Prefer 32-bit alignment for loops",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.m3)] = .{
.llvm_name = "m3",
.description = "Cortex-M3 ARM processors",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.mclass)] = .{
.llvm_name = "mclass",
.description = "Is microcontroller profile ('M' series)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.mp)] = .{
.llvm_name = "mp",
.description = "Supports Multiprocessing extension",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.muxed_units)] = .{
.llvm_name = "muxed-units",
.description = "Has muxed AGU and NEON/FPU",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.mve)] = .{
.llvm_name = "mve",
.description = "Support M-Class Vector Extension with integer ops",
.dependencies = featureSet(&[_]Feature{
.dsp,
.fpregs16,
.fpregs64,
.has_v8_1m_main,
}),
};
result[@intFromEnum(Feature.mve1beat)] = .{
.llvm_name = "mve1beat",
.description = "Model MVE instructions as a 1 beat per tick architecture",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.mve2beat)] = .{
.llvm_name = "mve2beat",
.description = "Model MVE instructions as a 2 beats per tick architecture",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.mve4beat)] = .{
.llvm_name = "mve4beat",
.description = "Model MVE instructions as a 4 beats per tick architecture",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.mve_fp)] = .{
.llvm_name = "mve.fp",
.description = "Support M-Class Vector Extension with integer and floating ops",
.dependencies = featureSet(&[_]Feature{
.fullfp16,
.mve,
}),
};
result[@intFromEnum(Feature.nacl_trap)] = .{
.llvm_name = "nacl-trap",
.description = "NaCl trap",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.neon)] = .{
.llvm_name = "neon",
.description = "Enable NEON instructions",
.dependencies = featureSet(&[_]Feature{
.vfp3,
}),
};
result[@intFromEnum(Feature.neon_fpmovs)] = .{
.llvm_name = "neon-fpmovs",
.description = "Convert VMOVSR, VMOVRS, VMOVS to NEON",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.neonfp)] = .{
.llvm_name = "neonfp",
.description = "Use NEON for single precision FP",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.no_branch_predictor)] = .{
.llvm_name = "no-branch-predictor",
.description = "Has no branch predictor",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.no_bti_at_return_twice)] = .{
.llvm_name = "no-bti-at-return-twice",
.description = "Don't place a BTI instruction after a return-twice",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.no_movt)] = .{
.llvm_name = "no-movt",
.description = "Don't use movt/movw pairs for 32-bit imms",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.no_neg_immediates)] = .{
.llvm_name = "no-neg-immediates",
.description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.noarm)] = .{
.llvm_name = "noarm",
.description = "Does not support ARM mode execution",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.nonpipelined_vfp)] = .{
.llvm_name = "nonpipelined-vfp",
.description = "VFP instructions are not pipelined",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.pacbti)] = .{
.llvm_name = "pacbti",
.description = "Enable Pointer Authentication and Branch Target Identification",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.perfmon)] = .{
.llvm_name = "perfmon",
.description = "Enable support for Performance Monitor extensions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.prefer_ishst)] = .{
.llvm_name = "prefer-ishst",
.description = "Prefer ISHST barriers",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.prefer_vmovsr)] = .{
.llvm_name = "prefer-vmovsr",
.description = "Prefer VMOVSR",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.prof_unpr)] = .{
.llvm_name = "prof-unpr",
.description = "Is profitable to unpredicate",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.r4)] = .{
.llvm_name = "r4",
.description = "Cortex-R4 ARM processors",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.ras)] = .{
.llvm_name = "ras",
.description = "Enable Reliability, Availability and Serviceability extensions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.rclass)] = .{
.llvm_name = "rclass",
.description = "Is realtime profile ('R' series)",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.read_tp_hard)] = .{
.llvm_name = "read-tp-hard",
.description = "Reading thread pointer from register",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.reserve_r9)] = .{
.llvm_name = "reserve-r9",
.description = "Reserve R9, making it unavailable as GPR",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.ret_addr_stack)] = .{
.llvm_name = "ret-addr-stack",
.description = "Has return address stack",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.sb)] = .{
.llvm_name = "sb",
.description = "Enable v8.5a Speculation Barrier",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.sha2)] = .{
.llvm_name = "sha2",
.description = "Enable SHA1 and SHA256 support",
.dependencies = featureSet(&[_]Feature{
.neon,
}),
};
result[@intFromEnum(Feature.slow_fp_brcc)] = .{
.llvm_name = "slow-fp-brcc",
.description = "FP compare + branch is slow",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.slow_load_D_subreg)] = .{
.llvm_name = "slow-load-D-subreg",
.description = "Loading into D subregs is slow",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.slow_odd_reg)] = .{
.llvm_name = "slow-odd-reg",
.description = "VLDM/VSTM starting with an odd register is slow",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.slow_vdup32)] = .{
.llvm_name = "slow-vdup32",
.description = "Has slow VDUP32 - prefer VMOV",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.slow_vgetlni32)] = .{
.llvm_name = "slow-vgetlni32",
.description = "Has slow VGETLNi32 - prefer VMOV",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.slowfpvfmx)] = .{
.llvm_name = "slowfpvfmx",
.description = "Disable VFP / NEON FMA instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.slowfpvmlx)] = .{
.llvm_name = "slowfpvmlx",
.description = "Disable VFP / NEON MAC instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.soft_float)] = .{
.llvm_name = "soft-float",
.description = "Use software floating point features.",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.splat_vfp_neon)] = .{
.llvm_name = "splat-vfp-neon",
.description = "Splat register from VFP to NEON",
.dependencies = featureSet(&[_]Feature{
.dont_widen_vmovs,
}),
};
result[@intFromEnum(Feature.strict_align)] = .{
.llvm_name = "strict-align",
.description = "Disallow all unaligned memory access",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.swift)] = .{
.llvm_name = "swift",
.description = "Swift ARM processors",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.thumb2)] = .{
.llvm_name = "thumb2",
.description = "Enable Thumb2 instructions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.thumb_mode)] = .{
.llvm_name = "thumb-mode",
.description = "Thumb mode",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.trustzone)] = .{
.llvm_name = "trustzone",
.description = "Enable support for TrustZone security extensions",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.use_mipipeliner)] = .{
.llvm_name = "use-mipipeliner",
.description = "Use the MachinePipeliner",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.use_misched)] = .{
.llvm_name = "use-misched",
.description = "Use the MachineScheduler",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.v2)] = .{
.llvm_name = null,
.description = "ARMv2 architecture",
.dependencies = featureSet(&[_]Feature{
.strict_align,
}),
};
result[@intFromEnum(Feature.v2a)] = .{
.llvm_name = null,
.description = "ARMv2a architecture",
.dependencies = featureSet(&[_]Feature{
.strict_align,
}),
};
result[@intFromEnum(Feature.v3)] = .{
.llvm_name = null,
.description = "ARMv3 architecture",
.dependencies = featureSet(&[_]Feature{
.strict_align,
}),
};
result[@intFromEnum(Feature.v3m)] = .{
.llvm_name = null,
.description = "ARMv3m architecture",
.dependencies = featureSet(&[_]Feature{
.strict_align,
}),
};
result[@intFromEnum(Feature.v4)] = .{
.llvm_name = "armv4",
.description = "ARMv4 architecture",
.dependencies = featureSet(&[_]Feature{
.strict_align,
}),
};
result[@intFromEnum(Feature.v4t)] = .{
.llvm_name = "armv4t",
.description = "ARMv4t architecture",
.dependencies = featureSet(&[_]Feature{
.has_v4t,
.strict_align,
}),
};
result[@intFromEnum(Feature.v5t)] = .{
.llvm_name = "armv5t",
.description = "ARMv5t architecture",
.dependencies = featureSet(&[_]Feature{
.has_v5t,
.strict_align,
}),
};
result[@intFromEnum(Feature.v5te)] = .{
.llvm_name = "armv5te",
.description = "ARMv5te architecture",
.dependencies = featureSet(&[_]Feature{
.has_v5te,
.strict_align,
}),
};
result[@intFromEnum(Feature.v5tej)] = .{
.llvm_name = "armv5tej",
.description = "ARMv5tej architecture",
.dependencies = featureSet(&[_]Feature{
.has_v5te,
.strict_align,
}),
};
result[@intFromEnum(Feature.v6)] = .{
.llvm_name = "armv6",
.description = "ARMv6 architecture",
.dependencies = featureSet(&[_]Feature{
.dsp,
.has_v6,
}),
};
result[@intFromEnum(Feature.v6j)] = .{
.llvm_name = "armv6j",
.description = "ARMv7a architecture",
.dependencies = featureSet(&[_]Feature{
.v6,
}),
};
result[@intFromEnum(Feature.v6k)] = .{
.llvm_name = "armv6k",
.description = "ARMv6k architecture",
.dependencies = featureSet(&[_]Feature{
.has_v6k,
}),
};
result[@intFromEnum(Feature.v6kz)] = .{
.llvm_name = "armv6kz",
.description = "ARMv6kz architecture",
.dependencies = featureSet(&[_]Feature{
.has_v6k,
.trustzone,
}),
};
result[@intFromEnum(Feature.v6m)] = .{
.llvm_name = "armv6-m",
.description = "ARMv6m architecture",
.dependencies = featureSet(&[_]Feature{
.db,
.has_v6m,
.mclass,
.noarm,
.strict_align,
.thumb_mode,
}),
};
result[@intFromEnum(Feature.v6sm)] = .{
.llvm_name = "armv6s-m",
.description = "ARMv6sm architecture",
.dependencies = featureSet(&[_]Feature{
.db,
.has_v6m,
.mclass,
.noarm,
.strict_align,
.thumb_mode,
}),
};
result[@intFromEnum(Feature.v6t2)] = .{
.llvm_name = "armv6t2",
.description = "ARMv6t2 architecture",
.dependencies = featureSet(&[_]Feature{
.dsp,
.has_v6t2,
}),
};
result[@intFromEnum(Feature.v7a)] = .{
.llvm_name = "armv7-a",
.description = "ARMv7a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.db,
.dsp,
.has_v7,
.neon,
.perfmon,
}),
};
result[@intFromEnum(Feature.v7em)] = .{
.llvm_name = "armv7e-m",
.description = "ARMv7em architecture",
.dependencies = featureSet(&[_]Feature{
.db,
.dsp,
.has_v7,
.hwdiv,
.mclass,
.noarm,
.thumb_mode,
}),
};
result[@intFromEnum(Feature.v7k)] = .{
.llvm_name = "armv7k",
.description = "ARMv7a architecture",
.dependencies = featureSet(&[_]Feature{
.v7a,
}),
};
result[@intFromEnum(Feature.v7m)] = .{
.llvm_name = "armv7-m",
.description = "ARMv7m architecture",
.dependencies = featureSet(&[_]Feature{
.db,
.has_v7,
.hwdiv,
.mclass,
.noarm,
.thumb_mode,
}),
};
result[@intFromEnum(Feature.v7r)] = .{
.llvm_name = "armv7-r",
.description = "ARMv7r architecture",
.dependencies = featureSet(&[_]Feature{
.db,
.dsp,
.has_v7,
.hwdiv,
.perfmon,
.rclass,
}),
};
result[@intFromEnum(Feature.v7s)] = .{
.llvm_name = "armv7s",
.description = "ARMv7a architecture",
.dependencies = featureSet(&[_]Feature{
.v7a,
}),
};
result[@intFromEnum(Feature.v7ve)] = .{
.llvm_name = "armv7ve",
.description = "ARMv7ve architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.db,
.dsp,
.has_v7,
.mp,
.neon,
.perfmon,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8_1a)] = .{
.llvm_name = "armv8.1-a",
.description = "ARMv81a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8_1a,
.mp,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8_1m_main)] = .{
.llvm_name = "armv8.1-m.main",
.description = "ARMv81mMainline architecture",
.dependencies = featureSet(&[_]Feature{
.@"8msecext",
.acquire_release,
.db,
.has_v8_1m_main,
.hwdiv,
.lob,
.mclass,
.noarm,
.ras,
.thumb_mode,
}),
};
result[@intFromEnum(Feature.v8_2a)] = .{
.llvm_name = "armv8.2-a",
.description = "ARMv82a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8_2a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8_3a)] = .{
.llvm_name = "armv8.3-a",
.description = "ARMv83a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8_3a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8_4a)] = .{
.llvm_name = "armv8.4-a",
.description = "ARMv84a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8_4a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8_5a)] = .{
.llvm_name = "armv8.5-a",
.description = "ARMv85a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8_5a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8_6a)] = .{
.llvm_name = "armv8.6-a",
.description = "ARMv86a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8_6a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8_7a)] = .{
.llvm_name = "armv8.7-a",
.description = "ARMv87a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8_7a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8_8a)] = .{
.llvm_name = "armv8.8-a",
.description = "ARMv88a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8_8a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8_9a)] = .{
.llvm_name = "armv8.9-a",
.description = "ARMv89a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8_9a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8a)] = .{
.llvm_name = "armv8-a",
.description = "ARMv8a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v8,
.mp,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v8m)] = .{
.llvm_name = "armv8-m.base",
.description = "ARMv8mBaseline architecture",
.dependencies = featureSet(&[_]Feature{
.@"8msecext",
.acquire_release,
.db,
.has_v7clrex,
.has_v8m,
.hwdiv,
.mclass,
.noarm,
.strict_align,
.thumb_mode,
}),
};
result[@intFromEnum(Feature.v8m_main)] = .{
.llvm_name = "armv8-m.main",
.description = "ARMv8mMainline architecture",
.dependencies = featureSet(&[_]Feature{
.@"8msecext",
.acquire_release,
.db,
.has_v8m_main,
.hwdiv,
.mclass,
.noarm,
.thumb_mode,
}),
};
result[@intFromEnum(Feature.v8r)] = .{
.llvm_name = "armv8-r",
.description = "ARMv8r architecture",
.dependencies = featureSet(&[_]Feature{
.crc,
.db,
.dfb,
.dsp,
.fp_armv8,
.has_v8,
.mp,
.neon,
.rclass,
.virtualization,
}),
};
result[@intFromEnum(Feature.v9_1a)] = .{
.llvm_name = "armv9.1-a",
.description = "ARMv91a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.db,
.dsp,
.fp_armv8,
.has_v9_1a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v9_2a)] = .{
.llvm_name = "armv9.2-a",
.description = "ARMv92a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.db,
.dsp,
.fp_armv8,
.has_v9_2a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v9_3a)] = .{
.llvm_name = "armv9.3-a",
.description = "ARMv93a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.crypto,
.db,
.dsp,
.fp_armv8,
.has_v9_3a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v9_4a)] = .{
.llvm_name = "armv9.4-a",
.description = "ARMv94a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.db,
.dsp,
.fp_armv8,
.has_v9_4a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.v9a)] = .{
.llvm_name = "armv9-a",
.description = "ARMv9a architecture",
.dependencies = featureSet(&[_]Feature{
.aclass,
.crc,
.db,
.dsp,
.fp_armv8,
.has_v9a,
.mp,
.ras,
.trustzone,
.virtualization,
}),
};
result[@intFromEnum(Feature.vfp2)] = .{
.llvm_name = "vfp2",
.description = "Enable VFP2 instructions",
.dependencies = featureSet(&[_]Feature{
.fp64,
.vfp2sp,
}),
};
result[@intFromEnum(Feature.vfp2sp)] = .{
.llvm_name = "vfp2sp",
.description = "Enable VFP2 instructions with no double precision",
.dependencies = featureSet(&[_]Feature{
.fpregs,
}),
};
result[@intFromEnum(Feature.vfp3)] = .{
.llvm_name = "vfp3",
.description = "Enable VFP3 instructions",
.dependencies = featureSet(&[_]Feature{
.vfp3d16,
.vfp3sp,
}),
};
result[@intFromEnum(Feature.vfp3d16)] = .{
.llvm_name = "vfp3d16",
.description = "Enable VFP3 instructions with only 16 d-registers",
.dependencies = featureSet(&[_]Feature{
.vfp2,
.vfp3d16sp,
}),
};
result[@intFromEnum(Feature.vfp3d16sp)] = .{
.llvm_name = "vfp3d16sp",
.description = "Enable VFP3 instructions with only 16 d-registers and no double precision",
.dependencies = featureSet(&[_]Feature{
.vfp2sp,
}),
};
result[@intFromEnum(Feature.vfp3sp)] = .{
.llvm_name = "vfp3sp",
.description = "Enable VFP3 instructions with no double precision",
.dependencies = featureSet(&[_]Feature{
.d32,
.vfp3d16sp,
}),
};
result[@intFromEnum(Feature.vfp4)] = .{
.llvm_name = "vfp4",
.description = "Enable VFP4 instructions",
.dependencies = featureSet(&[_]Feature{
.vfp3,
.vfp4d16,
.vfp4sp,
}),
};
result[@intFromEnum(Feature.vfp4d16)] = .{
.llvm_name = "vfp4d16",
.description = "Enable VFP4 instructions with only 16 d-registers",
.dependencies = featureSet(&[_]Feature{
.vfp3d16,
.vfp4d16sp,
}),
};
result[@intFromEnum(Feature.vfp4d16sp)] = .{
.llvm_name = "vfp4d16sp",
.description = "Enable VFP4 instructions with only 16 d-registers and no double precision",
.dependencies = featureSet(&[_]Feature{
.fp16,
.vfp3d16sp,
}),
};
result[@intFromEnum(Feature.vfp4sp)] = .{
.llvm_name = "vfp4sp",
.description = "Enable VFP4 instructions with no double precision",
.dependencies = featureSet(&[_]Feature{
.vfp3sp,
.vfp4d16sp,
}),
};
result[@intFromEnum(Feature.virtualization)] = .{
.llvm_name = "virtualization",
.description = "Supports Virtualization extension",
.dependencies = featureSet(&[_]Feature{
.hwdiv,
.hwdiv_arm,
}),
};
result[@intFromEnum(Feature.vldn_align)] = .{
.llvm_name = "vldn-align",
.description = "Check for VLDn unaligned access",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.vmlx_forwarding)] = .{
.llvm_name = "vmlx-forwarding",
.description = "Has multiplier accumulator forwarding",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.vmlx_hazards)] = .{
.llvm_name = "vmlx-hazards",
.description = "Has VMLx hazards",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.wide_stride_vfp)] = .{
.llvm_name = "wide-stride-vfp",
.description = "Use a wide stride when allocating VFP registers",
.dependencies = featureSet(&[_]Feature{}),
};
result[@intFromEnum(Feature.xscale)] = .{
.llvm_name = "xscale",
.description = "ARMv5te architecture",
.dependencies = featureSet(&[_]Feature{
.v5te,
}),
};
result[@intFromEnum(Feature.zcz)] = .{
.llvm_name = "zcz",
.description = "Has zero-cycle zeroing instructions",
.dependencies = featureSet(&[_]Feature{}),
};
const ti = @typeInfo(Feature);
for (&result, 0..) |*elem, i| {
elem.index = i;
elem.name = ti.Enum.fields[i].name;
}
break :blk result;
};
pub const cpu = struct {
pub const arm1020e = CpuModel{
.name = "arm1020e",
.llvm_name = "arm1020e",
.features = featureSet(&[_]Feature{
.v5te,
}),
};
pub const arm1020t = CpuModel{
.name = "arm1020t",
.llvm_name = "arm1020t",
.features = featureSet(&[_]Feature{
.v5t,
}),
};
pub const arm1022e = CpuModel{
.name = "arm1022e",
.llvm_name = "arm1022e",
.features = featureSet(&[_]Feature{
.v5te,
}),
};
pub const arm10e = CpuModel{
.name = "arm10e",
.llvm_name = "arm10e",
.features = featureSet(&[_]Feature{
.v5te,
}),
};
pub const arm10tdmi = CpuModel{
.name = "arm10tdmi",
.llvm_name = "arm10tdmi",
.features = featureSet(&[_]Feature{
.v5t,
}),
};
pub const arm1136j_s = CpuModel{
.name = "arm1136j_s",
.llvm_name = "arm1136j-s",
.features = featureSet(&[_]Feature{
.v6,
}),
};
pub const arm1136jf_s = CpuModel{
.name = "arm1136jf_s",
.llvm_name = "arm1136jf-s",
.features = featureSet(&[_]Feature{
.slowfpvmlx,
.v6,
.vfp2,
}),
};
pub const arm1156t2_s = CpuModel{
.name = "arm1156t2_s",
.llvm_name = "arm1156t2-s",
.features = featureSet(&[_]Feature{
.v6t2,
}),
};
pub const arm1156t2f_s = CpuModel{
.name = "arm1156t2f_s",
.llvm_name = "arm1156t2f-s",
.features = featureSet(&[_]Feature{
.slowfpvmlx,
.v6t2,
.vfp2,
}),
};
pub const arm1176jz_s = CpuModel{
.name = "arm1176jz_s",
.llvm_name = "arm1176jz-s",
.features = featureSet(&[_]Feature{
.v6kz,
}),
};
pub const arm1176jzf_s = CpuModel{
.name = "arm1176jzf_s",
.llvm_name = "arm1176jzf-s",
.features = featureSet(&[_]Feature{
.slowfpvmlx,
.v6kz,
.vfp2,
}),
};
pub const arm710t = CpuModel{
.name = "arm710t",
.llvm_name = "arm710t",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const arm720t = CpuModel{
.name = "arm720t",
.llvm_name = "arm720t",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const arm7tdmi = CpuModel{
.name = "arm7tdmi",
.llvm_name = "arm7tdmi",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const arm7tdmi_s = CpuModel{
.name = "arm7tdmi_s",
.llvm_name = "arm7tdmi-s",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const arm8 = CpuModel{
.name = "arm8",
.llvm_name = "arm8",
.features = featureSet(&[_]Feature{
.v4,
}),
};
pub const arm810 = CpuModel{
.name = "arm810",
.llvm_name = "arm810",
.features = featureSet(&[_]Feature{
.v4,
}),
};
pub const arm9 = CpuModel{
.name = "arm9",
.llvm_name = "arm9",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const arm920 = CpuModel{
.name = "arm920",
.llvm_name = "arm920",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const arm920t = CpuModel{
.name = "arm920t",
.llvm_name = "arm920t",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const arm922t = CpuModel{
.name = "arm922t",
.llvm_name = "arm922t",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const arm926ej_s = CpuModel{
.name = "arm926ej_s",
.llvm_name = "arm926ej-s",
.features = featureSet(&[_]Feature{
.v5te,
}),
};
pub const arm940t = CpuModel{
.name = "arm940t",
.llvm_name = "arm940t",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const arm946e_s = CpuModel{
.name = "arm946e_s",
.llvm_name = "arm946e-s",
.features = featureSet(&[_]Feature{
.v5te,
}),
};
pub const arm966e_s = CpuModel{
.name = "arm966e_s",
.llvm_name = "arm966e-s",
.features = featureSet(&[_]Feature{
.v5te,
}),
};
pub const arm968e_s = CpuModel{
.name = "arm968e_s",
.llvm_name = "arm968e-s",
.features = featureSet(&[_]Feature{
.v5te,
}),
};
pub const arm9e = CpuModel{
.name = "arm9e",
.llvm_name = "arm9e",
.features = featureSet(&[_]Feature{
.v5te,
}),
};
pub const arm9tdmi = CpuModel{
.name = "arm9tdmi",
.llvm_name = "arm9tdmi",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const baseline = CpuModel{
.name = "baseline",
.llvm_name = "generic",
.features = featureSet(&[_]Feature{
.v7a,
}),
};
pub const cortex_a12 = CpuModel{
.name = "cortex_a12",
.llvm_name = "cortex-a12",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.mp,
.ret_addr_stack,
.trustzone,
.v7a,
.vfp4,
.virtualization,
.vmlx_forwarding,
}),
};
pub const cortex_a15 = CpuModel{
.name = "cortex_a15",
.llvm_name = "cortex-a15",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.mp,
.muxed_units,
.ret_addr_stack,
.splat_vfp_neon,
.trustzone,
.v7a,
.vfp4,
.virtualization,
.vldn_align,
}),
};
pub const cortex_a17 = CpuModel{
.name = "cortex_a17",
.llvm_name = "cortex-a17",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.mp,
.ret_addr_stack,
.trustzone,
.v7a,
.vfp4,
.virtualization,
.vmlx_forwarding,
}),
};
pub const cortex_a32 = CpuModel{
.name = "cortex_a32",
.llvm_name = "cortex-a32",
.features = featureSet(&[_]Feature{
.v8a,
}),
};
pub const cortex_a35 = CpuModel{
.name = "cortex_a35",
.llvm_name = "cortex-a35",
.features = featureSet(&[_]Feature{
.v8a,
}),
};
pub const cortex_a5 = CpuModel{
.name = "cortex_a5",
.llvm_name = "cortex-a5",
.features = featureSet(&[_]Feature{
.mp,
.ret_addr_stack,
.slow_fp_brcc,
.slowfpvfmx,
.slowfpvmlx,
.trustzone,
.v7a,
.vfp4,
.vmlx_forwarding,
}),
};
pub const cortex_a53 = CpuModel{
.name = "cortex_a53",
.llvm_name = "cortex-a53",
.features = featureSet(&[_]Feature{
.fpao,
.v8a,
}),
};
pub const cortex_a55 = CpuModel{
.name = "cortex_a55",
.llvm_name = "cortex-a55",
.features = featureSet(&[_]Feature{
.dotprod,
.v8_2a,
}),
};
pub const cortex_a57 = CpuModel{
.name = "cortex_a57",
.llvm_name = "cortex-a57",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.cheap_predicable_cpsr,
.fix_cortex_a57_aes_1742098,
.fpao,
.v8a,
}),
};
pub const cortex_a7 = CpuModel{
.name = "cortex_a7",
.llvm_name = "cortex-a7",
.features = featureSet(&[_]Feature{
.mp,
.ret_addr_stack,
.slow_fp_brcc,
.slowfpvfmx,
.slowfpvmlx,
.trustzone,
.v7a,
.vfp4,
.virtualization,
.vmlx_forwarding,
.vmlx_hazards,
}),
};
pub const cortex_a710 = CpuModel{
.name = "cortex_a710",
.llvm_name = "cortex-a710",
.features = featureSet(&[_]Feature{
.bf16,
.fp16fml,
.i8mm,
.v9a,
}),
};
pub const cortex_a72 = CpuModel{
.name = "cortex_a72",
.llvm_name = "cortex-a72",
.features = featureSet(&[_]Feature{
.fix_cortex_a57_aes_1742098,
.v8a,
}),
};
pub const cortex_a73 = CpuModel{
.name = "cortex_a73",
.llvm_name = "cortex-a73",
.features = featureSet(&[_]Feature{
.v8a,
}),
};
pub const cortex_a75 = CpuModel{
.name = "cortex_a75",
.llvm_name = "cortex-a75",
.features = featureSet(&[_]Feature{
.dotprod,
.v8_2a,
}),
};
pub const cortex_a76 = CpuModel{
.name = "cortex_a76",
.llvm_name = "cortex-a76",
.features = featureSet(&[_]Feature{
.a76,
.dotprod,
.fullfp16,
.v8_2a,
}),
};
pub const cortex_a76ae = CpuModel{
.name = "cortex_a76ae",
.llvm_name = "cortex-a76ae",
.features = featureSet(&[_]Feature{
.a76,
.dotprod,
.fullfp16,
.v8_2a,
}),
};
pub const cortex_a77 = CpuModel{
.name = "cortex_a77",
.llvm_name = "cortex-a77",
.features = featureSet(&[_]Feature{
.dotprod,
.fullfp16,
.v8_2a,
}),
};
pub const cortex_a78 = CpuModel{
.name = "cortex_a78",
.llvm_name = "cortex-a78",
.features = featureSet(&[_]Feature{
.dotprod,
.fullfp16,
.v8_2a,
}),
};
pub const cortex_a78c = CpuModel{
.name = "cortex_a78c",
.llvm_name = "cortex-a78c",
.features = featureSet(&[_]Feature{
.dotprod,
.fullfp16,
.v8_2a,
}),
};
pub const cortex_a8 = CpuModel{
.name = "cortex_a8",
.llvm_name = "cortex-a8",
.features = featureSet(&[_]Feature{
.nonpipelined_vfp,
.ret_addr_stack,
.slow_fp_brcc,
.slowfpvfmx,
.slowfpvmlx,
.trustzone,
.v7a,
.vmlx_forwarding,
.vmlx_hazards,
}),
};
pub const cortex_a9 = CpuModel{
.name = "cortex_a9",
.llvm_name = "cortex-a9",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.expand_fp_mlx,
.fp16,
.mp,
.muxed_units,
.neon_fpmovs,
.prefer_vmovsr,
.ret_addr_stack,
.trustzone,
.v7a,
.vldn_align,
.vmlx_forwarding,
.vmlx_hazards,
}),
};
pub const cortex_m0 = CpuModel{
.name = "cortex_m0",
.llvm_name = "cortex-m0",
.features = featureSet(&[_]Feature{
.no_branch_predictor,
.v6m,
}),
};
pub const cortex_m0plus = CpuModel{
.name = "cortex_m0plus",
.llvm_name = "cortex-m0plus",
.features = featureSet(&[_]Feature{
.no_branch_predictor,
.v6m,
}),
};
pub const cortex_m1 = CpuModel{
.name = "cortex_m1",
.llvm_name = "cortex-m1",
.features = featureSet(&[_]Feature{
.no_branch_predictor,
.v6m,
}),
};
pub const cortex_m23 = CpuModel{
.name = "cortex_m23",
.llvm_name = "cortex-m23",
.features = featureSet(&[_]Feature{
.no_branch_predictor,
.no_movt,
.v8m,
}),
};
pub const cortex_m3 = CpuModel{
.name = "cortex_m3",
.llvm_name = "cortex-m3",
.features = featureSet(&[_]Feature{
.loop_align,
.m3,
.no_branch_predictor,
.use_misched,
.v7m,
}),
};
pub const cortex_m33 = CpuModel{
.name = "cortex_m33",
.llvm_name = "cortex-m33",
.features = featureSet(&[_]Feature{
.dsp,
.fix_cmse_cve_2021_35465,
.fp_armv8d16sp,
.loop_align,
.no_branch_predictor,
.slowfpvfmx,
.slowfpvmlx,
.use_misched,
.v8m_main,
}),
};
pub const cortex_m35p = CpuModel{
.name = "cortex_m35p",
.llvm_name = "cortex-m35p",
.features = featureSet(&[_]Feature{
.dsp,
.fix_cmse_cve_2021_35465,
.fp_armv8d16sp,
.loop_align,
.no_branch_predictor,
.slowfpvfmx,
.slowfpvmlx,
.use_misched,
.v8m_main,
}),
};
pub const cortex_m4 = CpuModel{
.name = "cortex_m4",
.llvm_name = "cortex-m4",
.features = featureSet(&[_]Feature{
.loop_align,
.no_branch_predictor,
.slowfpvfmx,
.slowfpvmlx,
.use_misched,
.v7em,
.vfp4d16sp,
}),
};
pub const cortex_m55 = CpuModel{
.name = "cortex_m55",
.llvm_name = "cortex-m55",
.features = featureSet(&[_]Feature{
.fix_cmse_cve_2021_35465,
.fp_armv8d16,
.loop_align,
.mve_fp,
.no_branch_predictor,
.slowfpvmlx,
.use_misched,
.v8_1m_main,
}),
};
pub const cortex_m7 = CpuModel{
.name = "cortex_m7",
.llvm_name = "cortex-m7",
.features = featureSet(&[_]Feature{
.fp_armv8d16,
.use_mipipeliner,
.use_misched,
.v7em,
}),
};
pub const cortex_m85 = CpuModel{
.name = "cortex_m85",
.llvm_name = "cortex-m85",
.features = featureSet(&[_]Feature{
.fp_armv8d16,
.mve_fp,
.pacbti,
.use_misched,
.v8_1m_main,
}),
};
pub const cortex_r4 = CpuModel{
.name = "cortex_r4",
.llvm_name = "cortex-r4",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.r4,
.ret_addr_stack,
.v7r,
}),
};
pub const cortex_r4f = CpuModel{
.name = "cortex_r4f",
.llvm_name = "cortex-r4f",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.r4,
.ret_addr_stack,
.slow_fp_brcc,
.slowfpvfmx,
.slowfpvmlx,
.v7r,
.vfp3d16,
}),
};
pub const cortex_r5 = CpuModel{
.name = "cortex_r5",
.llvm_name = "cortex-r5",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.hwdiv_arm,
.ret_addr_stack,
.slow_fp_brcc,
.slowfpvfmx,
.slowfpvmlx,
.v7r,
.vfp3d16,
}),
};
pub const cortex_r52 = CpuModel{
.name = "cortex_r52",
.llvm_name = "cortex-r52",
.features = featureSet(&[_]Feature{
.fpao,
.use_misched,
.v8r,
}),
};
pub const cortex_r7 = CpuModel{
.name = "cortex_r7",
.llvm_name = "cortex-r7",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.fp16,
.hwdiv_arm,
.mp,
.ret_addr_stack,
.slow_fp_brcc,
.slowfpvfmx,
.slowfpvmlx,
.v7r,
.vfp3d16,
}),
};
pub const cortex_r8 = CpuModel{
.name = "cortex_r8",
.llvm_name = "cortex-r8",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.fp16,
.hwdiv_arm,
.mp,
.ret_addr_stack,
.slow_fp_brcc,
.slowfpvfmx,
.slowfpvmlx,
.v7r,
.vfp3d16,
}),
};
pub const cortex_x1 = CpuModel{
.name = "cortex_x1",
.llvm_name = "cortex-x1",
.features = featureSet(&[_]Feature{
.dotprod,
.fullfp16,
.v8_2a,
}),
};
pub const cortex_x1c = CpuModel{
.name = "cortex_x1c",
.llvm_name = "cortex-x1c",
.features = featureSet(&[_]Feature{
.dotprod,
.fullfp16,
.v8_2a,
}),
};
pub const cyclone = CpuModel{
.name = "cyclone",
.llvm_name = "cyclone",
.features = featureSet(&[_]Feature{
.avoid_movs_shop,
.avoid_partial_cpsr,
.disable_postra_scheduler,
.neonfp,
.ret_addr_stack,
.slowfpvfmx,
.slowfpvmlx,
.swift,
.use_misched,
.v8a,
.zcz,
}),
};
pub const ep9312 = CpuModel{
.name = "ep9312",
.llvm_name = "ep9312",
.features = featureSet(&[_]Feature{
.v4t,
}),
};
pub const exynos_m1 = CpuModel{
.name = "exynos_m1",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.exynos,
.v8a,
}),
};
pub const exynos_m2 = CpuModel{
.name = "exynos_m2",
.llvm_name = null,
.features = featureSet(&[_]Feature{
.exynos,
.v8a,
}),
};
pub const exynos_m3 = CpuModel{
.name = "exynos_m3",
.llvm_name = "exynos-m3",
.features = featureSet(&[_]Feature{
.exynos,
.v8a,
}),
};
pub const exynos_m4 = CpuModel{
.name = "exynos_m4",
.llvm_name = "exynos-m4",
.features = featureSet(&[_]Feature{
.dotprod,
.exynos,
.fullfp16,
.v8_2a,
}),
};
pub const exynos_m5 = CpuModel{
.name = "exynos_m5",
.llvm_name = "exynos-m5",
.features = featureSet(&[_]Feature{
.dotprod,
.exynos,
.fullfp16,
.v8_2a,
}),
};
pub const generic = CpuModel{
.name = "generic",
.llvm_name = "generic",
.features = featureSet(&[_]Feature{}),
};
pub const iwmmxt = CpuModel{
.name = "iwmmxt",
.llvm_name = "iwmmxt",
.features = featureSet(&[_]Feature{
.v5te,
}),
};
pub const krait = CpuModel{
.name = "krait",
.llvm_name = "krait",
.features = featureSet(&[_]Feature{
.avoid_partial_cpsr,
.hwdiv,
.hwdiv_arm,
.muxed_units,
.ret_addr_stack,
.v7a,
.vfp4,
.vldn_align,
.vmlx_forwarding,
}),
};
pub const kryo = CpuModel{
.name = "kryo",
.llvm_name = "kryo",
.features = featureSet(&[_]Feature{
.v8a,
}),
};
pub const mpcore = CpuModel{
.name = "mpcore",
.llvm_name = "mpcore",
.features = featureSet(&[_]Feature{
.slowfpvmlx,
.v6k,
.vfp2,
}),
};
pub const mpcorenovfp = CpuModel{
.name = "mpcorenovfp",
.llvm_name = "mpcorenovfp",
.features = featureSet(&[_]Feature{
.v6k,
}),
};
pub const neoverse_n1 = CpuModel{
.name = "neoverse_n1",
.llvm_name = "neoverse-n1",
.features = featureSet(&[_]Feature{
.dotprod,
.v8_2a,
}),
};
pub const neoverse_n2 = CpuModel{
.name = "neoverse_n2",
.llvm_name = "neoverse-n2",
.features = featureSet(&[_]Feature{
.bf16,
.i8mm,
.v8_5a,
}),
};
pub const neoverse_v1 = CpuModel{
.name = "neoverse_v1",
.llvm_name = "neoverse-v1",
.features = featureSet(&[_]Feature{
.bf16,
.fullfp16,
.i8mm,
.v8_4a,
}),
};
pub const sc000 = CpuModel{
.name = "sc000",
.llvm_name = "sc000",
.features = featureSet(&[_]Feature{
.no_branch_predictor,
.v6m,
}),
};
pub const sc300 = CpuModel{
.name = "sc300",
.llvm_name = "sc300",
.features = featureSet(&[_]Feature{
.m3,
.no_branch_predictor,
.use_misched,
.v7m,
}),
};
pub const strongarm = CpuModel{
.name = "strongarm",
.llvm_name = "strongarm",
.features = featureSet(&[_]Feature{
.v4,
}),
};
pub const strongarm110 = CpuModel{
.name = "strongarm110",
.llvm_name = "strongarm110",
.features = featureSet(&[_]Feature{
.v4,
}),
};
pub const strongarm1100 = CpuModel{
.name = "strongarm1100",
.llvm_name = "strongarm1100",
.features = featureSet(&[_]Feature{
.v4,
}),
};
pub const strongarm1110 = CpuModel{
.name = "strongarm1110",
.llvm_name = "strongarm1110",
.features = featureSet(&[_]Feature{
.v4,
}),
};
pub const swift = CpuModel{
.name = "swift",
.llvm_name = "swift",
.features = featureSet(&[_]Feature{
.avoid_movs_shop,
.avoid_partial_cpsr,
.disable_postra_scheduler,
.hwdiv,
.hwdiv_arm,
.mp,
.neonfp,
.prefer_ishst,
.prof_unpr,
.ret_addr_stack,
.slow_load_D_subreg,
.slow_odd_reg,
.slow_vdup32,
.slow_vgetlni32,
.slowfpvfmx,
.slowfpvmlx,
.swift,
.use_misched,
.v7a,
.vfp4,
.vmlx_hazards,
.wide_stride_vfp,
}),
};
pub const xscale = CpuModel{
.name = "xscale",
.llvm_name = "xscale",
.features = featureSet(&[_]Feature{
.v5te,
}),
};
};


VW ID Space Vizzion concept previews new electric estate
by Matt de PrezVolkswagen has revealed a new electric concept car at the LA Motor Show this week, the ID Space Vizzion.
It is a five-door estate car that showcases the upcoming ID5 estate, which is due to launch in 2021.
The ID Space Vizzion has a range of 367 miles (WLTP) and has a similar platform size to an Audi A6 Avant.
Its driveline is compacted into the floor, enabling for more passenger and luggage space.
Up to 586-litres of boot space is available.
Power comes from an 82kWh battery pack integrated in the floor. It can charge to 80% within 30 minutes on a 150kW rapid charger.
The interior reflects a new direction for the brand with a simplistic layout and minimal switchgear.
A large 15.6-inch infotainment screen dominates the centre console, while a smaller instrument display provides crucial information to the driver.
There is also an augmented reality head-up display that provides all relevant driving information.
VW says the platform can support both rear- and all-wheel-drive.
The electric motor generates 275PS, while the four-wheel-drive version uses two motors to deliver 335PS.
The ID Space Vizzion is the seventh concept car of the ID family and forms part of the VW Group’s desire to produce one million EVs per year by the end of 2022.


A simple, nice-looking call to action box. Boxing is about respect. getting it for yourself, and taking it away from the other guy. no, this is mount everest.
A simple, nice-looking call to action box. Boxing is about respect. getting it for yourself, and taking it away from the other guy. no, this is mount everest.


Sage Shaw - CU Boulder
Structure and Interpretation of Computer Programs (1986) (Lectures) (Book)
By the end of this talk you will...
This is C code. When line 9 executes, what value is printed?
#include <stdio.h>
int main(){
int a, b;
a = 5;
goto *(&&LABEL + 7);
LABEL:
a = 1;
b = a;
printf("%d\n", b);
int* testLabel;
TEST: testLabel = &&TEST;
//TEST:printf("%ld\n", &&TEST - &&LABEL);
}
Credit: Human Resource Machine by Tomorrow Corporation
GOTO Considered Harmful - Edgar Dijkstra 1969
"For a number of years I have been familiar with the observation that the quality of programmers is a decreasing function of the density of GOTO statements in the programs they produce."
GOTO Considered Harmful - Edgar Dijkstra 1969
"The GOTO statement as it stands is just too primitive; it is too much an invitation to make a mess of one's program."
"GOTO Considered Harmful" Considered Harmful - Frank Rubin 1987
"To many people, 'structured programming' and 'GOTO-less programming' have become synonymous. This has caused incalculable harm to the field of programming, which has lost an efficacious tool. It is like butchers banning knives because workers sometimes cut themselves."
Structured Programming with GOTO Statements - Donald Knuth 1974
"The discussion brings out opposing points of view about whether or not GOTO statements should be abolished; some merit is found on both sides of this question. Finally, an attempt is made to define the true nature of structured programming, and to recommend fruitful directions for further study."
This is hard because of GOTO
.
#include <stdio.h>
int main(){
int a, b;
a = 5;
goto *(&&LABEL + 7);
LABEL:
a = 1;
b = a;
printf("%d\n", b);
int* testLabel;
TEST: testLabel = &&TEST;
//TEST:printf("%ld\n", &&TEST - &&LABEL);
}
Why is this hard?
This is from the Math Subject GRE practice book.
A program (function) should do only one thing, and do it well.
Functions should be composable.
Functions should be functions.
$f: A \to B$ such that $f(x) = \dots$
$x \mapsto x - \frac{f(x)}{f'(x)}$
def newton_method(x0, f, df):
x = x0
print(x)
for _ in range(10):
x = x - f(x)/df(x)
print(x)
f = lambda x: (x-1)**2
df = lambda x: 2*(x-1)
newton_method(2, f, df)
def newton_method(x0, f, df, max_iter=10):
x = x0
print(x)
for _ in range(max_iter):
x = x - f(x)/df(x)
print(x)
f = lambda x: (x-1)**2
df = lambda x: 2*(x-1)
newton_method(2, f, df, max_iter=4)
def newton_method(x0, f, df,
max_iter=10, tol=1e-5):
x = x0
print(x)
for _ in range(max_iter):
x = x - f(x)/df(x)
print(x)
if abs(f(x)) <= tol:
break
f = lambda x: (x-1)**2
df = lambda x: 2*(x-1)
newton_method(2, f, df, tol=1e-3)
def newton_method(x0, f, df, max_iter=10,
tol=1e-5, tol_type='abs'):
assert tol_type.lower() in ('abs', 'cauchy')
x = x0
x_old = x
print(x)
for _ in range(max_iter):
x, x_old = x - f(x)/df(x), x
print(x)
if tol_type is 'abs':
if abs(f(x)) <= tol:
break
elif tol_type is 'cauchy':
if abs(x - x_old) < tol:
break
f = lambda x: (x-1)**2
df = lambda x: 2*(x-1)
newton_method(2, f, df, tol=1e-3, tol_type='cauchy')
def newton_method(x0, f, df,
max_iter=10, tol=1e-5,
tol_type='abs'):
assert tol_type.lower() in ('abs', 'cauchy')
x = x0
x_old = x
xs = [x]
for _ in range(max_iter):
x, x_old = x - f(x)/df(x), x
xs.append(x)
if tol_type is 'abs':
if abs(f(x)) <= tol:
break
elif tol_type is 'cauchy':
if abs(x - x_old) < tol:
break
return xs
f = lambda x: (x-1)**2
df = lambda x: 2*(x-1)
for x in newton_method(2, f, df,
tol=1e-3, tol_type='cauchy'):
print(x)
def newton_method(x0, f, df,
max_iter=10, tol=1e-5,
tol_type='abs', return_all=False):
assert tol_type.lower() in ('abs', 'cauchy')
x = x0
x_old = x
if return_all:
xs = [x]
for _ in range(max_iter):
x, x_old = x - f(x)/df(x), x
if return_all:
xs.append(x)
if tol_type is 'abs':
if abs(f(x)) <= tol:
break
elif tol_type is 'cauchy':
if abs(x - x_old) < tol:
break
if return_all:
return xs
return x
f = lambda x: (x-1)**2
df = lambda x: 2*(x-1)
for x in newton_method(2, f, df, tol=1e-3,
tol_type='cauchy', return_all=True):
print(x)
print()
print(newton_method(2, f, df, tol=1e-3, tol_type='cauchy'))
Let's try something more functional.
def example_generator():
yield 1
yield 2
yield 3
print(list(example_generator()))
my_gen = example_generator()
a = next(my_gen)
print(a)
for _ in range(4):
print(next(my_gen))
[1, 2, 3]
1
2
3
---------------------------------------------------------------------------
StopIteration Traceback (most recent call last)
in
9 print(a)
10 for _ in range(4):
---> 11 print(next(my_gen))
StopIteration:
def newton_sequence(x0, f, df):
x = x0
while True:
yield x
x -= f(x)/df(x)
from itertools import *
from functools import *
import more_itertools #not built-in
max_iter
def take_10(iterable):
for _ in range(10):
yield next(iterable)
def take_n(iterable, n=10):
for _ in range(n):
yield next(iterable)
def filter_max_iter(max_iter=10**3):
def my_filter(seq):
return islice(seq, 0, max_iter)
return my_filter
x0 = 8
f = lambda x: (x-1)*(x-5)
df = lambda x: 2*x - 6
my_filter = filter_max_iter(4)
list(
my_filter(
newton_sequence(x0, f, df)))
>>>[8, 5.9, 5.139655172413793, 5.004557642613021]
def pipeline_eval(x, *func_list):
def apply(x, f):
return f(x)
return reduce(apply, func_list, x)
f = lambda x: x+1
g = lambda x: x**2
print(pipeline_eval(2, f, g))
print(pipeline_eval(2, g, f))
>>>9
>>>5
x0 = 8
f = lambda x: (x-1)*(x-5)
df = lambda x: 2*x - 6
pipeline_eval(newton_sequence(x0, f, df),
filter_max_iter(4),
list)
>>>[8, 5.9, 5.139655172413793, 5.004557642613021]
def filter_f_tol(f, tol=1e-10):
def predicate(x):
return abs(f(x)) > tol
return partial(takewhile, predicate)
x0 = 8
f = lambda x: (x-1)*(x-5)
df = lambda x: 2*x - 6
pipeline_eval(newton_sequence(x0, f, df),
filter_max_iter(20),
filter_f_tol(f, tol=1e-4),
list)
>>>[8, 5.9, 5.139655172413793, 5.004557642613021]
def distance(x1, x2):
return abs(x1 - x2)
def filter_cauchy_tol(distance=distance, tol=1e-10):
predicate = lambda tup: distance(*tup) > tol
my_filter = pipeline(collect_pairs,
partial(takewhile, predicate),
pairs_to_element)
return my_filter
x0 = 8
f = lambda x: (x-1)*(x-5)
df = lambda x: 2*x - 6
pipeline_eval(newton_sequence(x0, f, df),
filter_max_iter(20),
filter_cauchy_tol(tol=1e-2),
list)
>>>[8, 5.9, 5.139655172413793, 5.004557642613021]
def newton_root_find(x0, f, df,
max_iter=20, tol=1e-15):
return pipeline_eval(
newton_sequence(x0, f, df),
filter_f_tol(f = lambda x: abs(f(x)), tol=tol),
filter_max_iter(max_iter),
more_itertools.last)
newton_root_find(8, f, df)
>>>5.000000000006711
Reusability
def multi_newton_sequence(x0, jac, hes):
def muli_newton_improve(x):
return x - la.solve(hes(*x), jac(*x))
return iterate_seq(x0, muli_newton_improve)
def vec_dist(x, y):
return la.norm(x - y)
def multi_newton_root_find(x0, jac, hes):
return pipeline_eval(
muli_newton_sequence(x0, jac, hes),
filter_max_iter(max_iter=10),
filter_cauchy_tol(distance = vec_dist),
last)
Reusability
def secant_sequence(x0, x1, f):
yield x0
yield x1
while True:
x0, x1 = x1, x1 - f(x1)*(x1 - x0)/(f(x1) - f(x0))
yield x1
What's really going on?
filter_max_iter(max_iter=20)
filter_f_tol(f = lambda x: abs(f(x)))
filter_cauchy_tol(tol=1e-10)
identity = lambda x: x
Monoid: A set with a binary operation and an identity element.
Markov Simulation
Markov Class
state_space = [1,2,3,4,5,6]
P = sym.Matrix([
[0, 6, 0, 0, 0, 0],
[3, 0, 0, 3, 0, 0],
[0, 0, 0, 0, 6, 0],
[0, 3, 0, 0, 3, 0],
[0, 0, 2, 2, 0, 2],
[0, 0, 0, 0, 6, 0]])/6
markov = Markov(state_space, P)
pipeline_eval(markov.chain(4),
take(10),
list)
>>>[4, 2, 4, 2, 1, 2, 4, 2, 4, 5]
def until(condition, seq):
for element in seq:
yield element
if condition(element):
break
def seq_len(seq): return sum(1 for _ in seq)
def sub1(x): return x - 1
def trial():
return pipeline_eval(
markov.chain(4),
partial(until, lambda state: state in [1, 6]),
seq_len,
sub1) # count steps
N = 10**5
average = sum(trial() for _ in range(N))/N
>>>5.0182
Markov Simulation
def count_if(state):
return state == 6
def trial():
return pipeline_eval(
markov.chain(4),
partial(until, lambda state: state in [1]),
partial(map, count_if),
sum)
N = 10**5
average = sum(trial() for _ in range(N))/N
print(average)
>>>2.01536
Markov Simulation
def found_food(final_state):
return final_state == 1
def trial():
return pipeline_eval(
markov.chain(4),
partial(until, lambda state: state in [1, 6]),
last,
found_food)
N = 10**5
prob = sum(trial() for _ in range(N))/N
print(prob)
>>>0.49996
Is state necessary?
Image credit: Victor Zhou
def affine(wb_pair, x):
return wb_pair[0]@x + wb_pair[1]
def network_eval(weights_and_biases, x, f=np.tanh):
if len(weights_and_biases) == 0:
return x
else:
layer_output = f(affine(weights_and_biases[0],x))
return network_eval(weights_and_biases[1:],
layer_output, f=f)
$$ \text{cost}(W) = \int ||N(\mathbf{x}, W) - \mathbf{y}(\mathbf{x})||^2 \ d \mathbf{x} $$
def nn_gradient_sample(weights_and_biases, x, y, f, df,
cost_derivative):
return nn_gradient_recursion(
weights_and_biases,
x, y, f=f, df=df,
cost_derivative=cost_derivative)[1]
def nn_gradient_recursion(weights_and_biases, a, y, f, df,
cost_derivative):
if len(weights_and_biases) == 0:
return cost_derivative(a,y), ()
z = affine(weights_and_biases[0], a)
grad_a, grad_list = nn_gradient_recursion(
weights_and_biases[1:],
f(z), y, f=f, df=df)
delta = grad_a * df(z)
# W and b gradient for this layer
my_grad = (np.outer(delta, a), delta)
return (weights_and_biases[0][0].T@delta,
(my_grad,) + grad_list)
def nn_gradient(weights_and_biases,
input_data,
cost_derivative):
return sum(np.array(
nn_gradient_sample(weights_and_biases,
*data))
for data in input_data) / len(input_data)
def nn_stochastic_gradient_descent_sequence(params0,
batch_stream, learning_rate, cost_derivative):
def param_improve(params):
batch = next(batch_stream)
return params - learning_rate*nn_gradient(params,
batch, cost_derivative)
return iterate_seq(params0, param_improve)
xor_error_eval = partial(map, partial(batch_error,
data_xor))
errors = pipeline_eval(
nn_gradient_descent_sequence(
W0_B0,
data_xor,
learning_rate = learning_rate,
cost_derivative=cross_entropy_cost_derivative),
filter_max_iter(2000),
xor_error_eval)),
list)
Questions for the audience?


Event Location:
Interhotel Cherno More
33 Slivnitsa Blvd
Varna, , Bulgaria
Abstract:
It's no secret that a deadlock - it's not very good. This is an exceptional situation, when two concurrent queries request same resources, but in a different order. Classic deadlock can occur when two concurrent transactions modifying data from the two tables in a different order. Unfortunately in a real life deadlocks can be more complex and unobvious. One of the rules, which I always keep in mind, sounds: " You can not design a database, in which the occurrence of deadlock is impossible". And we should deal with them. The algorithm is simple: catch, analyze, fix. But in practice the process can be challenging and can require different types of analysis. In this session we will analyse and solve as many deadlock as we can in 60 min.
Speaker(s): Denis Reznik,
Abstract:
One of Microsoft SQL Server 2014’s big features was the all new In-Memory OLTP (or Hekaton) addition to the SQL Server engine. Microsoft estimates a query performance increase of 5-to-20 times by just putting your disk-based tables into the RAM of your server! If we can gain that much of a performance increase that easily, then why aren’t Memory-Optimized tables the default go-to solution for all your performance problems? Because, of-course, it isn’t as easy as just a drag-and-drop to move your tables from disk into memory… Transforming your disk-based tables to Memory-Optimized tables takes careful planning and a good understanding of the limitations and restrictions of In-Memory OLTP. In this demo-filled session, we will take a look underneath the hood of Memory-Optimized tables, helping you with the first steps towards light speed querying!
Speaker(s): Enrico van de Laar,
Abstract:
Data science, predictive analytics, insights, statistics… There are so many buzzwords around these days. These words are frequently used in an introduction to some technical article, at the beginning of a presentation, and even in regular talk. However, when it comes down to a real analysis, you typically get reports with very nice Power BI graphs, but without real forecasting. It is up to you to recognize the patterns and then probably make some kind of interpolation by yourself. Data mining is the part that is based on statistics and can really make forecasts automatically. Data mining is part of SSAS installed in multidimensional mode. Is it possible to get the best from both words? This advanced session explains the forecasting algorithms and shows how you can integrate geographic and temporal predictions in Power View and Power Map visualizations and interactive animations. Popular buzzwords finally get some real meat behind them.
Speaker(s): Dejan Sarka,
Abstract:
DBA trade is still in-demand and will remain as long as databases are alive! If you are an average IT person/Developer/SysAdmin who has been managing development and databases in your organisation, now you want to manage SQL Server databases using tricks of DBA trade and you've got no idea what to do with it! In this session we will overview range of topics that every DBA handles, such as: backup/restore strategy, high availability, scalability and performance tuning. We will touch base on how best SQL Server technology will offer home-grown tools to keep your BAU tasks. Not giving opportunity of riding a super-duper car, but best learning techniques on how to manage your SQL Server database and make it efficient enough to run like a fast car on performance aspects. You will get o know what is needed to get that new features to implement, how best they can fit in. All the examples and demos in this session are originated from real-world work from my Consulting experience.
Speaker(s): Satya Jayanty,
Abstract:
Many BI developers use SSIS. It's great tool. But exists many routine tasks. For example, you need create package for incremental updating of 10 tables. You did it. But structure of tables was changed. Or you need add to package 5 (or may be 50) additional tables. In this situation you need help. And you have new assistant. His name is BIML (Business Intelligence Markup Language).
Speaker(s): Andrey Korshikov,
Abstract:
Managing many SQL server instances is difficult and more importantly it requires a lot of efforts from the DBAs. How can we reduce and save these efforts? Let’s dive into a session covering some great examples and best practices of multi-server management – from building a Central Management Server through gathering performance data with customized Management Data Warehouse. We will do also a showcase for proactive capacity management and see many other ideas for automating of the daily DBA tasks.
Speaker(s): Kaloyan Kosev,
Abstract:
When I've encountered with replication first time, I've thought "Hmm, replication is not so hard for configuring and troubleshooting". It was mistake :).The replication is not as easy to understand from the first time. The next moment when you got problem with it, such as desync of data between publishers and subscribers and vise versa. Replication sometimes is not readily to troubleshooting. In the presentation I'll tell you about transactional replication, about what is it, how to configure different replication schemas and how to determine the cause of problem which can arise.
Speaker(s): Evgeny Khabarov,
Abstract:
In this session we will walk through the world of Extended Events and their power in monitoring SQL server instances. We will explore some real-world scenarios and see how we can benefit from Xevents in solving them. You will be able to see how to track a specific application behavior and how to troubleshoot connectivity issues
Speaker(s): Miroslav Dimitrov,
Abstract:
Keynote and opening
Speaker(s): Mihail Mateev,
Abstract:
This presentation is about the high availability solutions in SQL Server starting w/ SQL 2005 SP1 until the latest versions. It is for those who just started working with SQL Server and interested about the different options. The followings will be covered: - DBM - FCI - AAG - Log Shipping - Replications Presentation will try to show all in cost and feature set point of view along with their pro's and con's. Demos: - DBM: basic setup + failover + monitoring - FCI: basic setup + failover - AAG: basic setup + failover + monitoring
Speaker(s): Janos Berke,
Abstract:
SQL Server 2014 is all about in-memory. Not that previous versions did not hold as much as data as possible inside of memory through caching, but now we enter a new era: columnar storage, in-memory tables and compiled stored procedures are different from what we have seen so far. In this session, you will see how you can leverage those new features and how you can come by existing limitations. Come back to office with the knowledge how to boost the performance of your ETL, queries and reports into the new era.
Speaker(s): Markus Ehrenmueller-Jensen,
Abstract:
To integrate data quality in ETL-Jobs some preliminary considerations and preparatory work are necessary. The session shows the preparing steps on DataQualityClient, continues with configuration of some validation-rules and then uses the configuration for a first data-import in SSIS. The DQS meta-information (stored in a DQS-project) is subsequently evaluated by Data-Stuard (a new role of staff member in the company’s organigramm). The result of the evaluation is imported via DQS_stagingDB into DQS_Main Database. This provides import after import, i.e. with each ETL-job there is a continuous improvement of data quality.
Speaker(s): Alexander Karl,
Abstract:
In this presentation we will start with description of the Data Mining Process, then we will Introduce the Microsoft Time Series Algorithm for Forecasting. Then we will demonstrate production of forecast by: SQL Server Data Tools (SSDT) Project. And we will show haw to implement complete process as part of your application by using ADOMD on real data.
Speaker(s): Daniel Joskovski,
Abstract:
Basic fеаtures specific for MS-SQL. Overview of basic fеаtures and tips that will help developers that are just entering SQL programming or transitioning from other RDBMS to get to know the power of T-SQL.
Speaker(s): Rosen Kolev,
Abstract:
Defining the business problem. Contrasting OLTP and OLAP environments. Overview of the Data Warehousing concepts and architectures. Exploring the SQL Server components and features as part of a Data Warehousing solution. SQL server Integration Services for Data Integration. Comparing the various Microsoft Business Intelligence tools for data-driven decision making and business analysis.
Speaker(s): Sylvia Takvorian,
Abstract:
I am sure you all know that troubleshooting problems related to locking and blocking (hey, sometimes there are deadlocks too) can be a real nightmare! In this session, you will be able to see and understand why and how locking actually works, what problems it causes and how can we use isolation levels and various other techniques to resolve them!
Speaker(s): Boris Hristov,
Abstract:
SQL Server indexing is an art. Choosing the right index for the right solution might just not be enough. Options are also without boundaries, but still there are several rules you must always apply to design an effective indexing strategy.
Speaker(s): Ivan Donev,
Abstract:
There are queries that we usually play a mouse and cat game with, while trying to catch them! When the query is performing badly every time it executes, it is easy to find and tune it. But it could be difficult to isolate those that have inconsistent execution behavior. What is the problem with them, do we need to re-write, to plan guide or to create yet another index? Well, you need to find them first. In this session you will learn how to find and tune queries with inconsistent execution behavior and how to tune them. Getting a predictable query response time is one of the main goals of performance tuning and optimization and this session will definitely help you achieve that goal.
Speaker(s): Margarita Naumova,
Abstract:
In this session, we’ll explore what it takes to create the right BI Semantic Models to help your users get the answers they need and insightful results with Power View.
Speaker(s): Boriana Petrova,
This is a list of speakers from the XML Guidebook records. The details and URLs were valid at the time of the event.
LinkedIn: http://bg.linkedin.com/pub/margarita-naumova/9/965/206
Contact: www.maginaumova.com; http://blogs.technet.com/b/magi/
Magi Naumova is SQL Server Architect and Consultant, speaker and trainer, Microsoft Certified Master, MVP Data Platform, MCT, Founder of SQL Master Academy, founder and leader of the Bulgarian SQL User group. She has more than 15 years SQL Server training and consulting experience. Magi is a former member of Microsoft Services Worldwide Technical Leadership Team, а Microsoft Women worth watching http://zd.net/1lwNYKH Currently she speaks, writes, trains and consults people on SQL Server technology. She runs a Data Platform consulting company part of which is SQL Master Academy training program. It helps hundreds of specialists to feel knowledgeable in their daily work or to find an inspirational career path in the world of SQL Server.
LinkedIn: https://www.linkedin.com/in/markus-ehrenmueller/
Contact: http://www.savorydata.com
Markus Ehrenmueller-Jensen, as the founder of Savory Data, has a long history of providing customer solutions in the areas of data engineering, data science, and Business Intelligence. He is a certified software engineer, a graduated business educator, and professor of Databases Project Management at HTL Leonding, and is certified as an MCSE MCT. He is a published author and writes articles for well-known journals. He co-founded PASS Austria and organizes SQLSaturdays in Austria. Markus is a founding member of Power BI Usergroup Austria. Since 2017 Markus was awarded as an Microsoft Data Platform MVP.
LinkedIn: https://bg.linkedin.com/in/dimitrovmiroslav
Contact: http://www.sqlshack.com/author/miroslav-dimitrov/
Miroslav Dimitrov is a Senior Big Data and Analytics Engineer at DXC Technology, regular speaker at various events and Microsoft Certified Trainer. He is MCSE: Data Platform for SQL Server and MCITP on SQL 2008. In the last years he had worked on great variety of customers' environments and involved in complex transitions and transformation projects as well as developing private and public cloud solutions. Miroslav is also leading database courses at Sofia University.
LinkedIn: https://hu.linkedin.com/in/janosberke
Contact: http://www.iamberke.com
I am an IT professional with over a decade of technical and management experience. I am using SQL Server since version 6.5. Currently I am a consultant and helping companies in SQL Server design, migrations, operation and developments as well as providing customized training .
LinkedIn: https://uk.linkedin.com/sqlmaster
Contact: http://www.sqlserver-qa.net
My experience surrounded with high focus on the data platform with a track record of defining strategy, designing and delivering digital transformation migrations with major enhancements to current working methods. Worked in a capacity of Head of Data Engineering, Enterprise Data Architect and Solutions Key career accomplishment recognition as an industry expert technical excellence from the Microsoft as Data Platform Most Valuable Professional (MVP) recognition since the year 2006 (13 years as MVP and counting), which recognizes exceptional technical community leaders worldwide who actively deliver, present share their extraordinary contributions, high quality, and real-world expertise. Twitter pod (http://twitter.com/sqlmast
LinkedIn: https://bg.linkedin.com/in/kosev
Kaloyan Kosev is a SQL Server expert working with enterprise companies for the last 9 years. His daily work routine is a mixture of troubleshooting bugs and issues, consulting and advising clients and presenting to students. Within his free time he is trying to balance between SQL and x-sports.
LinkedIn: https://www.linkedin.com/in/borianapetrova/
Contact: http://itraining.bg/category/itraining-blog/
Microsoft Certified Trainer with over 10 years experience as an IT instructor and Consultant. She has many qualifications and professional certifications, including: Excel MVP, MCT, MCITP, MCTS, MOS Master. In 2008 she is among the TOP 25 of the best instructors in Microsoft World Company business evaluation and measurement - Knowledge Advisors.
LinkedIn: https://www.linkedin.com/in/ivandonev/
I am a Data platform MVP with more than 10 years of real-life experience with SQL Server and its stack of services. Besides the support and project work, I am also a trainer, conference speaker and user group organizer (and volunteer).
Contact: http://rosenkolev.blogspot.com/
Microsoft .NET developer with over 5 years experience in programming mobile, web and desktop applications. Likes to learn new things and revisit old ones.
Contact: http://blogs.solidq.com/dsarka/Home.aspx
Dejan Sarka, MCT and Data Platform MVP, is an independent trainer and consultant that focuses on development of database and business intelligence applications. Besides projects, he spends about half of his time on training and mentoring. He is the founder of the Slovenian SQL Server and .NET Users Group. Dejan Sarka is the main author or co-author of eighteen books about databases and SQL Server. Dejan Sarka has also developed many courses and seminars for Microsoft, Radacad, SolidQ, and Pluralsight.
LinkedIn: http://bg.linkedin.com/in/borishristov
Contact: http://borishristov.com/blog/
Boris is a SQL Server Consultant, but also an Author for Pluralsight and a SQL Server MVP. He is frequently speaking at conferences all accross Europe and is heavily involved in training students and organizations in what he calls quot;The Art of SQL Serverquot;. Boris is frequently blogging and is the host of SQLHangouts.
LinkedIn: http://www.linkedin.com/in/stakvorian
Sylvia Takvorian is a Senior Data Warehouse and .NET Consultant at Adastra with over 7 years of experience in various projects in banking, financial services and e–commerce industries. She is Microsoft certified professional (MCSA), experienced in designing, developing and automating ETL processes and Business Intelligence solutions with a wide range of technical tools including but not limited to Microsoft SQL Server, IBM InfoSphere DataStage, IBM DB2 and Teradata.
Разработчик и администратор SQL Server. Область применения знаний в основном устранение проблем с производительностью систем, в основе которых лежит SQL Server.
Alexander Karl is database-developer and certified MCT for Windows and SQL Server with .net-CDE GmbH. For more than 18 years he has been working with Database-, Datawarehouse- and Reporting-Solutions for companies from medium-sized enterprises to Group level. His spectrum includes Serversizing, Programming to optimize performances as well as Report- and Chartdesign; in trainings and seminars he conveys participants well-founded theoretical knowledge complemented with his practical.
LinkedIn: http://nl.linkedin.com/pub/enrico-van-de-laar/33/882/756/
Contact: https://www.enricovandelaar.com
Enrico has been working with data in all kinds of formats and sizes for over 15 years. He is a Data Advanced Analytics Consultant for Dataheroes where he helps organisations take their first steps in the world of Advanced Analytics. Enrico is a Data Platform MVP since 2014 and a frequent speaker on various data related events all over the world. He authored the book “Pro SQL Server Wait Statistics” and blogs about technologies like Microsoft SQL Server and Azure Machine Learning on his blog at www.enricovandelaar.com
LinkedIn: http://www.linkedin.com/pub/denis-reznik/3/502/234
Contact: http://reznik.uneta.com.ua
Denis Reznik is a Data Architect at Intapp, Inc. He has more than ten years experience in software development, database design, and performance tuning for cloud and on-premises solutions. In 2010 Denis became Microsoft Data Platform MVP and maintains MVP status today. Apart from his professional career, Denis actively participates in the development of the Ukrainian Data Community.
Работать с SQL Server начал в 2003 году. Довелось работать и сдавать сертификационные экзамены по версиям SQL Server от 2000 до 2012. Участник конференций SQLSaturday, Платформа, DevCon и TechEd. География выступлений от Тампы до Красноярска, от Санкт-Петербурга до Тбилиси. Основатель сообществ Krasnodar SQLamp;BI Usergroup и Global Russian Virtual Chapter. На данный момент являюсь PASS Regional Mentor for Central Eastern Europe.
Daniel Joskovski work in IT since 1985, he is a database-centric application developer and architect, instructor, course author, user group leader. Over the Past 17 Years as MCT he#39;s been teaching Microsoft SQL Server and .NET Development courses to premier customers in Macedonia, Serbia, Norway, Kosovo and Albania. From 2009 He is being awarded with Microsoft MVP award for SQL Server 8 times in a row. At the moment Daniel works for CloudCoder DOOEL Skopje.
LinkedIn: http://www.linkedin.com/pub/mihail-mateev/1/6b3/4b1
Contact: https://mmateev.wordpress.com/
Mihail Mateev is a technical consultant, community enthusiast, PASS Regional Mentor for CEE, chapter lead, Microsoft Azure MVP, Microsoft Regional Director. He works as a Senior Solutions Architect at EPAM Systems, focused on Data Platform, IoT and cloud related solutions. He also worked many years like a Technical evangelist in the Infragistics. Last years Mihail was focused on various areas related to technology Microsoft: Data Platform, Visual Studio, ASP.Net, Windows client apps, Data Platform, and Microsoft Azure. Michael also has a PhD in cloud computing area. He is a university lecturer on Smart Homes and Smart Energy IoT Solutions.
The following is a list of sponsors that helped fund the event.


Cheshire3 Objects: Protocol Handler |
A protocol handler is the first object which is encountered in any given operation. The handler acts as a black box which parses the request, does a lot of magic and gives back the response. Of course that magic is simply knowing about the top level of objects within the system and turning the request into a workflow which will collect the information necessary to respond.
Protocol Handlers do not have a standardised API as they are dependant on the framework in which they're included. Apache based handlers will generally be RequestHandlers, but for binary protocols such as Z39.50 they need to be ConnectionHandlers. An IRC protocol handler, on the other hand, would be entirely different.


On the first night of spring break '10, I decided to try out some Adderall. I had just bought 10 pills at school that day from a friend, for $4 per 20mg Adderall IR pill.
I've always thought of myself as a 'hallucinogen guy'; I've thought that other drugs may put you in a good mood or make you feel good, but shrooms and LSD are relatively harmless to the body, and have the potential to give you meaningful experiences. But on this first friday night of spring break '10, I learned how awesome amphetamines are.
I think that a good way to describe the effects is that it was a combination of the 'good' aspects of: a 300-400mg caffeine dose (increased focus, energy, less boredom, faster thinking) and hydrocodone (my body felt good in a way that's best described as 'smooth', and a sense of well-being). It's worth noting that I didn't get any effects similar to: caffeine's jitters/anxiety or hydrocodone's 'stoning' effect.
Here's a timeline of what happened, and i was taking notes as things happened, so it's not just my 'best guess' at a timeline.
T+0:00 (7:43pm); I took 20mg of generic Adderall IR (the pink 'COR135' kind. Many people claim that the pink generic kind effects them differently from the brand name Adderall. Normally this would seem like hogwash, but apparently a LOT of people feel this way). I hadn't eaten for 7-12 hours beforehand, so I believe my stomach was empty.
T+0:30; nothing yet, other than some very subtle 'effects' which are likely placebo. I'm playing Counter-Strike Source on my PC while waiting for effects.
T+0:45; (Sorry, I can't read this one-word note, but I know that there were no strong effects yet)
T+1:00; Effects are here. I feel as though my focus is incredibly channeled. My notes were 'power/tunnel/focus vision/consciousness'. Obviously that's not a complete sentence, but I feel that it was a good description of what I was feeling. Whatever I looked at, I was VERY focused on, as though my vision and my consciousness itself were entirely honed in on whatever I was focusing on. This was only noticeable when staring at something, not when actually doing things. My calculus practice test is VERY interesting due to the adderall, I'm enjoying this more than I usually enjoy computer games.
T+1:10; Listening to 'The Crystal Method' (great band), and their music sounds even more amazing than ever. Their music style sometimes has many 'layers' to it, and it feels like my (high-quality) headphones are playing 5 songs at once, and I can enjoy each of them with my undivided attention. Also, my room is still fairly cold (62f), but I don't feel cold anymore. My body is feeling really goooooood and smooth, like it does on hydrocodone. I still find the calculus work very interesting/fun.
T+1:20; Heart rate: 85 BPM. This experience is so awesome that I decide to supplement my experience with a 200mg caffeine pill. I walk downstairs to get some water to take my pill with, and I talk with my dad. It's funny, it felt like I had to focus on speaking INCREDIBLY SLOW and it still sounded a bit faster than normal.
T+1:30; As I wrote in my notes, 'It feels like I'm living 20-25 minutes for every 10 minutes of clock-time'
T+1:40; It snuck up on me, but I realized that I had to piss really badly.
 The song 'Everything' is written about ecstasy (lyrics are: 'Everything sounds better, everything looks brighter' etc.), and I feel like I finally can understand what the lyrics are talking about, now that I've taken adderall and seen what amphetamine's effects are like. Music still sounds very good, though slow tracks make me impatient.
T+2:20; My room is cold(59f) with the windows open, but I've stripped down to my T-shirt and still actually feel warm.
 I'm still contently doing calculus homework, which is definitely an effect of the drug.
T+3:15-3:45; I decide to masturbate on the drug, to see what it's like. Here are my notes: 'Jacking it: Progress is slow, and brief pauses (in masturbating) pull me way backwards (further from orgasm).  Amphetamine was definitely still effecting me, as I could tell from how long it was taking to hit orgasm.' In my personal experience, this was similar to masturbation on opiates.
T+4:00; Effects seem to be slowing down.
T+4:30; Playing Counter Strike Source online. It seemed as though I had superior fine motor control when aiming, etc.
T+8:15; It's now 3am, and though I'm not tired, I force myself to sleep, so as to not mess up tomorrow. Keep in mind caffeine could be partially responsible for my non-tiredness, but honestly, I'm not effected much at all by 200mg 7 hours later.
I did not feel bad the day after. Adderall is one helluva drug, but be careful, because it's tempting to use it more than I really should.
Experience Reports are the writings and opinions of the individual authors who submit them.
Some of the activities described are dangerous and/or illegal and none are recommended by Erowid.


Sweetsounds music store: Your destination for musical instruments and supplies. At Sweet sounds Music Store every customer is a star.
Sweet Sounds Music Store opened its doors on May 2016, we hvave proudly served our customers for the past few months! we are still growing and look forward to building more friendships and providing our customers with great services and products!!
The crew of Sweet Sounds have a combined 30 years of experience! thats with only 3 people on the roster. John is our great music instructor and Robert along with James are great with acquiring your hard to find items along with your every day regular items.


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--- layout: post title: Analytics aren't just for your marketing efforts date: 2014-10-20 10:42:52.000000000 -04:00 type: post published: true status: publish categories: - Analytics tags: - analytics - customer support - marketing - product - roadmaps meta: _wpcom_is_markdown: '1' _edit_last: '1' _thumbnail_id: '45' image: '' _yoast_wpseo_metadesc: Treat the instrumentation of your product as seriously as you measure your marketing efforts. _publicize_twitter_user: "@chris_vannoy" _yoast_wpseo_focuskw: product analytics _yoast_wpseo_linkdex: '68' _wpas_done_all: '1' thumb: http://jekyll-blog-cv.s3.amazonaws.com/graph-background.jpg ---
Note: This post originally appeared on the blog of my since-shuttered analytics firm: Axiomatic. That said, if you need some analytics work, get in touch
Most modern marketers at this point know they should be measuring the performance of their efforts, but the interesting thing I've discussed with many people lately is how few are properly tuning their analytics to measure the performance of the product itself.
At best, most slap a default Google Analytics tracking code on the product pages and walk away. Especially with the modern web's AJAX-y and web application bent, that's simply not going to cut it if you want to get a good idea of how your product is actually being used.
Properly instrumented, the metrics of what your customers actually do in your application can inform a whole host of things:
Your UI/UX: Tagged up properly, you'll not only know which features get used, but how your customers got to those features. Imagine cutting down a three-steps-deep path to a well-loved feature to a single click. How much more would your users love you (and stick around)?
Your marketing: Once you know - again, not guess - which features truly resonate with your users, you can begin closing that feedback loop back into your marketing efforts. After all, most of the time how you - the product owner - views your application doesn't match how your customers view and use your application at all.
Retention and customer support: Which forms in your application give users the most problems? Do you know? If not, imagine if you did. You can beef up the documentation and inline help pointers, reach out to account holders that seem to have more trouble than others and smooth out any non-erroring bumps in the road.
Just as we now live in a world where we measure our marketing efforts, you should be instrumenting your product itself so you can stop guessing at what you should work on next and instead know what work will have the biggest impact on your product - and your business.


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