Expression object for divisions of a sparse vector by a scalar.The SVecScalarDivExpr class represents the compile time expression for divisions of sparse vectors by scalar values.
More...
#include <SVecScalarDivExpr.h>
Inherits blaze::VecScalarDivExpr< SparseVector< SVecScalarDivExpr< VT, ST, TF >, TF > >, and blaze::Computation.
|
| class | ConstIterator |
| | Iterator over the elements of the sparse vector/scalar multiplication expression. More...
|
| |
|
| enum | : bool { smpAssignable = false
} |
| | Compilation switch for the expression template assignment strategy.
|
| |
|
using | This = SVecScalarDivExpr< VT, ST, TF > |
| | Type of this SVecScalarDivExpr instance.
|
| |
|
using | ResultType = DivTrait_< RT, ST > |
| | Result type for expression template evaluations.
|
| |
|
using | TransposeType = TransposeType_< ResultType > |
| | Transpose type for expression template evaluations.
|
| |
|
using | ElementType = ElementType_< ResultType > |
| | Resulting element type.
|
| |
|
using | ReturnType = const IfTrue_< returnExpr, ExprReturnType, ElementType > |
| | Return type for expression template evaluations.
|
| |
|
using | CompositeType = IfTrue_< useAssign, const ResultType, const SVecScalarDivExpr &> |
| | Data type for composite expression templates.
|
| |
|
using | LeftOperand = If_< IsExpression< VT >, const VT, const VT &> |
| | Composite type of the left-hand side sparse vector expression.
|
| |
|
using | RightOperand = ST |
| | Composite type of the right-hand side scalar value.
|
| |
|
using | VectorType = SVecScalarDivExpr< VT, ST, TF > |
| | Type of the vector.
|
| |
|
| enum | : bool { returnExpr = !IsTemporary<RN>::value
} |
| | Compilation switch for the selection of the subscript operator return type. More...
|
| |
| enum | : bool { useAssign = RequiresEvaluation<VT>::value
} |
| | Compilation switch for the serial evaluation strategy of the multiplication expression. More...
|
| |
|
using | RT = ResultType_< VT > |
| | Result type of the sparse vector expression.
|
| |
|
using | RN = ReturnType_< VT > |
| | Return type of the sparse vector expression.
|
| |
|
using | CT = CompositeType_< VT > |
| | Composite type of the sparse vector expression.
|
| |
|
using | ExprReturnType = DivExprTrait_< RN, ST > |
| | Expression return type for the subscript operator.
|
| |
template<typename VT, typename ST, bool TF>
class blaze::SVecScalarDivExpr< VT, ST, TF >
Expression object for divisions of a sparse vector by a scalar.
The SVecScalarDivExpr class represents the compile time expression for divisions of sparse vectors by scalar values.
◆ anonymous enum
template<typename VT , typename ST , bool TF>
Compilation switch for the selection of the subscript operator return type.
The returnExpr compile time constant expression is a compilation switch for the selection of the ReturnType. If the vector operand returns a temporary vector or matrix, returnExpr will be set to false and the subscript operator will return it's result by value. Otherwise returnExpr will be set to true and the subscript operator may return it's result as an expression.
◆ anonymous enum
template<typename VT , typename ST , bool TF>
Compilation switch for the serial evaluation strategy of the multiplication expression.
The useAssign compile time constant expression represents a compilation switch for the serial evaluation strategy of the multiplication expression. In case either the sparse vector operand requires an intermediate evaluation, useAssign will be set to 1 and the multiplication expression will be evaluated via the assign function family. Otherwise useAssign will be set to 0 and the expression will be evaluated via the subscript operator.
◆ SVecScalarDivExpr()
template<typename VT , typename ST , bool TF>
Constructor for the SVecScalarDivExpr class.
- Parameters
-
| vector | The left-hand side sparse vector of the division expression. |
| scalar | The right-hand side scalar of the division expression. |
◆ at()
template<typename VT , typename ST , bool TF>
Checked access to the vector elements.
- Parameters
-
| index | Access index. The index has to be in the range . |
- Returns
- The resulting value.
- Exceptions
-
| std::out_of_range | Invalid vector access index. |
◆ begin()
template<typename VT , typename ST , bool TF>
Returns an iterator to the first non-zero element of the sparse vector.
- Returns
- Iterator to the first non-zero element of the sparse vector.
◆ canAlias()
template<typename VT , typename ST , bool TF>
template<typename T >
Returns whether the expression can alias with the given address alias.
- Parameters
-
| alias | The alias to be checked. |
- Returns
- true in case the expression can alias, false otherwise.
◆ end()
template<typename VT , typename ST , bool TF>
Returns an iterator just past the last non-zero element of the sparse vector.
- Returns
- Iterator just past the last non-zero element of the sparse vector.
◆ find()
template<typename VT , typename ST , bool TF>
Searches for a specific vector element.
- Parameters
-
| index | The index of the search element. |
- Returns
- Iterator to the element in case the index is found, end() iterator otherwise.
◆ isAliased()
template<typename VT , typename ST , bool TF>
template<typename T >
Returns whether the expression is aliased with the given address alias.
- Parameters
-
| alias | The alias to be checked. |
- Returns
- true in case an alias effect is detected, false otherwise.
◆ leftOperand()
template<typename VT , typename ST , bool TF>
Returns the left-hand side sparse vector operand.
- Returns
- The left-hand side sparse vector operand.
◆ lowerBound()
template<typename VT , typename ST , bool TF>
Returns an iterator to the first index not less then the given index.
- Parameters
-
| index | The index of the search element. |
- Returns
- Iterator to the first index not less then the given index, end() iterator otherwise.
◆ nonZeros()
template<typename VT , typename ST , bool TF>
Returns the number of non-zero elements in the sparse vector.
- Returns
- The number of non-zero elements in the sparse vector.
◆ operator[]()
template<typename VT , typename ST , bool TF>
Subscript operator for the direct access to the vector elements.
- Parameters
-
| index | Access index. The index has to be in the range . |
- Returns
- The resulting value.
◆ operator~() [1/2]
Conversion operator for non-constant vectors.
- Returns
- Reference of the actual type of the vector.
◆ operator~() [2/2]
Conversion operator for constant vectors.
- Returns
- Const reference of the actual type of the vector.
◆ rightOperand()
template<typename VT , typename ST , bool TF>
Returns the right-hand side scalar operand.
- Returns
- The right-hand side scalar operand.
◆ size()
template<typename VT , typename ST , bool TF>
Returns the current size/dimension of the vector.
- Returns
- The size of the vector.
◆ upperBound()
template<typename VT , typename ST , bool TF>
Returns an iterator to the first index greater then the given index.
- Parameters
-
| index | The index of the search element. |
- Returns
- Iterator to the first index greater then the given index, end() iterator otherwise.
The documentation for this class was generated from the following files:


The work is dangerous. Six miners died in an accident in October. But locals say there is no other work for the region's men.


THANK YOU FOR PLAYING.
your turker id
the HIT name:
nodeGame
your exit code, as written below
your browser name and version
Notice: you do not need the exit code to submit the HIT, but only in case of trouble with the payment.


Path-builder
Created a competitive strategy game with a basic artificial intelligence
for single-player mode. Worked in team of 2
Web Checkers
Created a web-based American Checkers game. Worked in team of 5
Wheel of Fortune
Simulated TV’s Wheel of Fortune game.


{% extends 'base.html' %} {% block title %}{% if logout %}Logged out{% else %}Not permitted{% endif %} | {{ site.title | safe }}{% endblock title %} {% block content %} {% if logout %}
Your login session has expired.
You can sign in again to continue, or sign out to view the site as a guest.
You have been banned from this site.
It looks like you don't have permission to do that.
This might happen if you're trying to view a private subforum.
Click here to return to the home page.


CrimPapers
Articles published on 16 October 2018
On 16 October 2018, 11 new articles were published in 10 journals.
Interagency Cooperation in the Era of Homeland Policing: Are Agencies Answering the Call?
Organizational Convenience For White-Collar Crime: Opportunity Expansion By Offender Behavior by Petter Gottschalk
The Life and the Adventures of A Haunted Convict by Caroline I. Jalain
Victims of Sexual Assault Perpetrated By Female Youth: An Exploratory Study of Gender Differences by Kristen M. Budd, David M. Bierie
Puberty and Girls’ Delinquency: A Test of Competing Models Explaining the Relationship Between Pubertal Development and Delinquent Behavior by Eric T. Klopack, Ronald L. Simons, Leslie Gordon Simons
Lead Exposure, Concentrated Disadvantage, and Violent Crime Rates by Tara E. Martin, Scott E. Wolfe
Prioritising the Investigation of Organised Crime by Trudy Sullivan, Julia Smith, Franz Ombler, Helen Brayley-Morris
Conceptions of Success: Understandings of Successful Policing of Human Trafficking
Exposure to Interpersonal Violence During Pregnancy and Its Association With Women’s Prenatal Care Utilization: A Meta-Analytic Review by Brittany Jamieson
Perspectives of Juvenile Offenders Undergoing Victim-Offender Mediation With Their Own Family Members: A Qualitative Study by Taufik Mohammad, Azlinda Azman
Violence Against Women and Children Following the 2011 Great East Japan Disaster: Making the Invisible Visible Through Research by Mieko Yoshihama, Tomoko Yunomae, Azumi Tsuge, Keiko Ikeda, Reiko Masai


Twig variable is searching based on template index, which supports much more use cases
#1356
(Daniel Espendiller)


--- layout: index ---
This is a community managed project. People send the versions in via GitHub. We've had a few hosting company employees sending in updates as they deploy them, which is cool.
Yeah loads, but for now we still rely on humans.
Read the contributing guide on GitHub.


This is a new commercial port, the western part of which is for militarty use only.

It is very close to the Roman city of Leptis Magna.
Planned arrival at the port is best advised at least 24 hours prior. Call the Port Authority via VHF channel 16 when within range. You will be advised when and where to berth. Entrance is only permitted in daylight.
Water and fuel are available by prior arrangements.


To learn more about me, head over to my personal website.
This is a GitHub hosted site where you can learn about my GitHub projects:
An experimental Meteor, AWS hosted cloud service


>From Union Bank Of Switzerland UBS Warburg Branch, London. 1 & 2 Finsbury Avenue, EC2M 2PP, London. United Kingdom. E-mail Via To<EMAIL_ADDRESS>Dear , I am Mr.Beck Christopher, working with Union Bank of Switzerland UBS, Warburg Branch, London. I have urgent and very confidential business proposition for you. On June 6th 1998, an American Oil Consultant Contractor with Mauritius Mining Corporation MR. JOSEPH BUTTON made a numbered Time Fixed Deposit for Twelve Calendar months valued at Twenty-Five Million United States Dollars Only (US$25M) in my branch. Upon maturity, I sent a routine notification to his forwarding address but got no reply. After a month, we sent a reminder and finally we discovered from his contract employers, the Island of Mauritius Mining Corporation that MR. JOSEPH BUTTON died on 11th September Bomb Blast in America 2001. On further investigation, I found out that he died without making a WILL and all attempts to trace his next of kin were fruitless. I therefore made further investigation and discovered that MR. JOSEPH BUTTON did not declare any kin or relations in all his official documents including his Bank Deposit paper work in my Bank. This Sum of US$25M Is still sitting in my Bank and the interest is being rolled Over with the principal sum at the end of each year, no one will ever come forward to claim it. According to the Island of Mauritius Law, at the expiration of Five (5) years, the money will be reverted to the ownership of the Mauritius Government if nobody applies to claim the fund. Consequently, my proposal is that I will like you as a Foreigner to stand in as the next of kin to MR.JOSEPH BUTTON so that the fruits of this old man labor will not get into the hands of some corrupt government officials. This is simple, I will like you to provide immediately your full names and address so that the Attorney can first arrange from Probate a Letter of Administration, which will put you in place as the next of kin. Secondly, a bank account in any part of the World which you will provide will then facilitate the transfer of this money to you as the beneficiary /next of kin, the money will be paid into your account for us to share in the ratio of 60% for me and 40% for you. There is no risk at all as all the paper work for this transaction will be done by the Attorney and my position guarantees the successful execution of this transaction. If you are interested, please reply immediately via the private- email address<EMAIL_ADDRESS>Upon your response, I shall then provide you with more details and relevant documents that will help you understand the transaction. Awaiting your urgent. Thanks and God bless you. Regards. Mr.Beck Christopher UBS Warburg. ___________________________________________________________________________ Mail sent from WebMail service at PHP-Nuke Powered Site - http://yoursite.com


Home
Your Account
Your Profile
Help and Contact us
Logout
Financial Summary
Holdings
Saving Account
Total Account Balance INR {{account_balance}}
Outstanding
Active Credit Cards
Total Unbilled Amount INR 0.00
Welcome to Banking Chatbot


Speculative Load Hardening¶
A Spectre Variant #1 Mitigation Technique¶
Author: Chandler Carruth -<EMAIL_ADDRESS>Problem Statement¶
Recently, Google Project Zero and other researchers have found information leak vulnerabilities by exploiting speculative execution in modern CPUs. These exploits are currently broken down into three variants:
- GPZ Variant #1 (a.k.a. Spectre Variant #1): Bounds check (or predicate) bypass
- GPZ Variant #2 (a.k.a. Spectre Variant #2): Branch target injection
- GPZ Variant #3 (a.k.a. Meltdown): Rogue data cache load
For more details, see the Google Project Zero blog post and the Spectre research paper:
- https://googleprojectzero.blogspot.com/2018/01/reading-privileged-memory-with-side.html
- https://spectreattack.com/spectre.pdf
The core problem of GPZ Variant #1 is that speculative execution uses branch prediction to select the path of instructions speculatively executed. This path is speculatively executed with the available data, and may load from memory and leak the loaded values through various side channels that survive even when the speculative execution is unwound due to being incorrect. Mispredicted paths can cause code to be executed with data inputs that never occur in correct executions, making checks against malicious inputs ineffective and allowing attackers to use malicious data inputs to leak secret data. Here is an example, extracted and simplified from the Project Zero paper:
struct array {
unsigned long length;
unsigned char data[];
};
struct array *arr1 = ...; // small array
struct array *arr2 = ...; // array of size 0x400
unsigned long untrusted_offset_from_caller = ...;
if (untrusted_offset_from_caller < arr1->length) {
unsigned char value = arr1->data[untrusted_offset_from_caller];
unsigned long index2 = ((value&1)*0x100)+0x200;
unsigned char value2 = arr2->data[index2];
}
The key of the attack is to call this with untrusted_offset_from_caller
that
is far outside of the bounds when the branch predictor will predict that it
will be in-bounds. In that case, the body of the if
will be executed
speculatively, and may read secret data into value
and leak it via a
cache-timing side channel when a dependent access is made to populate value2
.
High Level Mitigation Approach¶
While several approaches are being actively pursued to mitigate specific branches and/or loads inside especially risky software (most notably various OS kernels), these approaches require manual and/or static analysis aided auditing of code and explicit source changes to apply the mitigation. They are unlikely to scale well to large applications. We are proposing a comprehensive mitigation approach that would apply automatically across an entire program rather than through manual changes to the code. While this is likely to have a high performance cost, some applications may be in a good position to take this performance / security tradeoff.
The specific technique we propose is to cause loads to be checked using branchless code to ensure that they are executing along a valid control flow path. Consider the following C-pseudo-code representing the core idea of a predicate guarding potentially invalid loads:
void leak(int data);
void example(int* pointer1, int* pointer2) {
if (condition) {
// ... lots of code ...
leak(*pointer1);
} else {
// ... more code ...
leak(*pointer2);
}
}
This would get transformed into something resembling the following:
uintptr_t all_ones_mask = std::numerical_limits<uintptr_t>::max();
uintptr_t all_zeros_mask = 0;
void leak(int data);
void example(int* pointer1, int* pointer2) {
uintptr_t predicate_state = all_ones_mask;
if (condition) {
// Assuming ?: is implemented using branchless logic...
predicate_state = !condition ? all_zeros_mask : predicate_state;
// ... lots of code ...
//
// Harden the pointer so it can't be loaded
pointer1 &= predicate_state;
leak(*pointer1);
} else {
predicate_state = condition ? all_zeros_mask : predicate_state;
// ... more code ...
//
// Alternative: Harden the loaded value
int value2 = *pointer2 & predicate_state;
leak(value2);
}
}
The result should be that if the if (condition) {
branch is mis-predicted,
there is a data dependency on the condition used to zero out any pointers
prior to loading through them or to zero out all of the loaded bits. Even
though this code pattern may still execute speculatively, invalid speculative
executions are prevented from leaking secret data from memory (but note that
this data might still be loaded in safe ways, and some regions of memory are
required to not hold secrets, see below for detailed limitations). This
approach only requires the underlying hardware have a way to implement a
branchless and unpredicted conditional update of a register's value. All modern
architectures have support for this, and in fact such support is necessary to
correctly implement constant time cryptographic primitives.
Crucial properties of this approach:
- It is not preventing any particular side-channel from working. This is important as there are an unknown number of potential side channels and we expect to continue discovering more. Instead, it prevents the observation of secret data in the first place.
- It accumulates the predicate state, protecting even in the face of nested correctly predicted control flows.
- It passes this predicate state across function boundaries to provide interprocedural protection.
- When hardening the address of a load, it uses a destructive or non-reversible modification of the address to prevent an attacker from reversing the check using attacker-controlled inputs.
- It does not completely block speculative execution, and merely prevents mis-speculated paths from leaking secrets from memory (and stalls speculation until this can be determined).
- It is completely general and makes no fundamental assumptions about the underlying architecture other than the ability to do branchless conditional data updates and a lack of value prediction.
- It does not require programmers to identify all possible secret data using static source code annotations or code vulnerable to a variant #1 style attack.
Limitations of this approach:
- It requires re-compiling source code to insert hardening instruction sequences. Only software compiled in this mode is protected.
- The performance is heavily dependent on a particular architecture's implementation strategy. We outline a potential x86 implementation below and characterize its performance.
- It does not defend against secret data already loaded from memory and residing in registers or leaked through other side-channels in non-speculative execution. Code dealing with this, e.g cryptographic routines, already uses constant-time algorithms and code to prevent side-channels. Such code should also scrub registers of secret data following these guidelines.
- To achieve reasonable performance, many loads may not be checked, such as those with compile-time fixed addresses. This primarily consists of accesses at compile-time constant offsets of global and local variables. Code which needs this protection and intentionally stores secret data must ensure the memory regions used for secret data are necessarily dynamic mappings or heap allocations. This is an area which can be tuned to provide more comprehensive protection at the cost of performance.
- Hardened loads may still load data from valid addresses if not attacker-controlled addresses. To prevent these from reading secret data, the low 2gb of the address space and 2gb above and below any executable pages should be protected.
Credit:
- The core idea of tracing misspeculation through data and marking pointers to block misspeculated loads was developed as part of a HACS 2018 discussion between Chandler Carruth, Paul Kocher, Thomas Pornin, and several other individuals.
- Core idea of masking out loaded bits was part of the original mitigation suggested by Jann Horn when these attacks were reported.
Indirect Branches, Calls, and Returns¶
It is possible to attack control flow other than conditional branches with variant #1 style mispredictions.
- A prediction towards a hot call target of a virtual method can lead to it being speculatively executed when an expected type is used (often called "type confusion").
- A hot case may be speculatively executed due to prediction instead of the correct case for a switch statement implemented as a jump table.
- A hot common return address may be predicted incorrectly when returning from a function.
These code patterns are also vulnerable to Spectre variant #2, and as such are best mitigated with a retpoline on x86 platforms. When a mitigation technique like retpoline is used, speculation simply cannot proceed through an indirect control flow edge (or it cannot be mispredicted in the case of a filled RSB) and so it is also protected from variant #1 style attacks. However, some architectures, micro-architectures, or vendors do not employ the retpoline mitigation, and on future x86 hardware (both Intel and AMD) it is expected to become unnecessary due to hardware-based mitigation.
When not using a retpoline, these edges will need independent protection from variant #1 style attacks. The analogous approach to that used for conditional control flow should work:
uintptr_t all_ones_mask = std::numerical_limits<uintptr_t>::max();
uintptr_t all_zeros_mask = 0;
void leak(int data);
void example(int* pointer1, int* pointer2) {
uintptr_t predicate_state = all_ones_mask;
switch (condition) {
case 0:
// Assuming ?: is implemented using branchless logic...
predicate_state = (condition != 0) ? all_zeros_mask : predicate_state;
// ... lots of code ...
//
// Harden the pointer so it can't be loaded
pointer1 &= predicate_state;
leak(*pointer1);
break;
case 1:
predicate_state = (condition != 1) ? all_zeros_mask : predicate_state;
// ... more code ...
//
// Alternative: Harden the loaded value
int value2 = *pointer2 & predicate_state;
leak(value2);
break;
// ...
}
}
The core idea remains the same: validate the control flow using data-flow and use that validation to check that loads cannot leak information along misspeculated paths. Typically this involves passing the desired target of such control flow across the edge and checking that it is correct afterwards. Note that while it is tempting to think that this mitigates variant #2 attacks, it does not.
Variant #1.1 and #1.2 attacks: "Bounds Check Bypass Store"¶
Beyond the core variant #1 attack, there are techniques to extend this attack. The primary technique is known as "Bounds Check Bypass Store" and is discussed in this research paper: https://people.csail.mit.edu/vlk/spectre11.pdf
We will analyze these two variants independently. First, variant #1.1 works by speculatively storing over the return address after a bounds check bypass. This speculative store then ends up being used by the CPU during speculative execution of the return, potentially directing speculative execution to arbitrary gadgets in the binary. Let's look at an example.
unsigned char local_buffer[4];
unsigned char *untrusted_data_from_caller = ...;
unsigned long untrusted_size_from_caller = ...;
if (untrusted_size_from_caller < sizeof(local_buffer)) {
// Speculative execution enters here with a too-large size.
memcpy(local_buffer, untrusted_data_from_caller,
untrusted_size_from_caller);
// The stack has now been smashed, writing an attacker-controlled
// address over the return adress.
minor_processing(local_buffer);
return;
// Control will speculate to the attacker-written address.
}
However, this can be mitigated by hardening the load of the return address just like any other load. This is sometimes complicated because x86 for example implicitly loads the return address off the stack. However, the implementation technique below is specifically designed to mitigate this implicit load by using the stack pointer to communicate misspeculation between functions. This additionally causes a misspeculation to have an invalid stack pointer and never be able to read the speculatively stored return address. See the detailed discussion below.
For variant #1.2, the attacker speculatively stores into the vtable or jump table used to implement an indirect call or indirect jump. Because this is speculative, this will often be possible even when these are stored in read-only pages. For example:
class FancyObject : public BaseObject {
public:
void DoSomething() override;
};
void f(unsigned long attacker_offset, unsigned long attacker_data) {
FancyObject object = getMyObject();
unsigned long *arr[4] = getFourDataPointers();
if (attacker_offset < 4) {
// We have bypassed the bounds check speculatively.
unsigned long *data = arr[attacker_offset];
// Now we have computed a pointer inside of `object`, the vptr.
*data = attacker_data;
// The vptr points to the virtual table and we speculatively clobber that.
g(object); // Hand the object to some other routine.
}
}
// In another file, we call a method on the object.
void g(BaseObject &object) {
object.DoSomething();
// This speculatively calls the address stored over the vtable.
}
Mitigating this requires hardening loads from these locations, or mitigating the indirect call or indirect jump. Any of these are sufficient to block the call or jump from using a speculatively stored value that has been read back.
For both of these, using retpolines would be equally sufficient. One possible hybrid approach is to use retpolines for indirect call and jump, while relying on SLH to mitigate returns.
Another approach that is sufficient for both of these is to harden all of the speculative stores. However, as most stores aren't interesting and don't inherently leak data, this is expected to be prohibitively expensive given the attack it is defending against.
Implementation Details¶
There are a number of complex details impacting the implementation of this technique, both on a particular architecture and within a particular compiler. We discuss proposed implementation techniques for the x86 architecture and the LLVM compiler. These are primarily to serve as an example, as other implementation techniques are very possible.
x86 Implementation Details¶
On the x86 platform we break down the implementation into three core components: accumulating the predicate state through the control flow graph, checking the loads, and checking control transfers between procedures.
Accumulating Predicate State¶
Consider baseline x86 instructions like the following, which test three conditions and if all pass, loads data from memory and potentially leaks it through some side channel:
# %bb.0: # %entry
pushq %rax
testl %edi, %edi
jne .LBB0_4
# %bb.1: # %then1
testl %esi, %esi
jne .LBB0_4
# %bb.2: # %then2
testl %edx, %edx
je .LBB0_3
.LBB0_4: # %exit
popq %rax
retq
.LBB0_3: # %danger
movl (%rcx), %edi
callq leak
popq %rax
retq
When we go to speculatively execute the load, we want to know whether any of the dynamically executed predicates have been misspeculated. To track that, along each conditional edge, we need to track the data which would allow that edge to be taken. On x86, this data is stored in the flags register used by the conditional jump instruction. Along both edges after this fork in control flow, the flags register remains alive and contains data that we can use to build up our accumulated predicate state. We accumulate it using the x86 conditional move instruction which also reads the flag registers where the state resides. These conditional move instructions are known to not be predicted on any x86 processors, making them immune to misprediction that could reintroduce the vulnerability. When we insert the conditional moves, the code ends up looking like the following:
# %bb.0: # %entry
pushq %rax
xorl %eax, %eax # Zero out initial predicate state.
movq $-1, %r8 # Put all-ones mask into a register.
testl %edi, %edi
jne .LBB0_1
# %bb.2: # %then1
cmovneq %r8, %rax # Conditionally update predicate state.
testl %esi, %esi
jne .LBB0_1
# %bb.3: # %then2
cmovneq %r8, %rax # Conditionally update predicate state.
testl %edx, %edx
je .LBB0_4
.LBB0_1:
cmoveq %r8, %rax # Conditionally update predicate state.
popq %rax
retq
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
...
Here we create the "empty" or "correct execution" predicate state by zeroing
%rax
, and we create a constant "incorrect execution" predicate value by
putting -1
into %r8
. Then, along each edge coming out of a conditional
branch we do a conditional move that in a correct execution will be a no-op,
but if misspeculated, will replace the %rax
with the value of %r8
.
Misspeculating any one of the three predicates will cause %rax
to hold the
"incorrect execution" value from %r8
as we preserve incoming values when
execution is correct rather than overwriting it.
We now have a value in %rax
in each basic block that indicates if at some
point previously a predicate was mispredicted. And we have arranged for that
value to be particularly effective when used below to harden loads.
Indirect Call, Branch, and Return Predicates¶
There is no analogous flag to use when tracing indirect calls, branches, and returns. The predicate state must be accumulated through some other means. Fundamentally, this is the reverse of the problem posed in CFI: we need to check where we came from rather than where we are going. For function-local jump tables, this is easily arranged by testing the input to the jump table within each destination (not yet implemented, use retpolines):
pushq %rax
xorl %eax, %eax # Zero out initial predicate state.
movq $-1, %r8 # Put all-ones mask into a register.
jmpq *.LJTI0_0(,%rdi,8) # Indirect jump through table.
.LBB0_2: # %sw.bb
testq $0, %rdi # Validate index used for jump table.
cmovneq %r8, %rax # Conditionally update predicate state.
...
jmp _Z4leaki # TAILCALL
.LBB0_3: # %sw.bb1
testq $1, %rdi # Validate index used for jump table.
cmovneq %r8, %rax # Conditionally update predicate state.
...
jmp _Z4leaki # TAILCALL
.LBB0_5: # %sw.bb10
testq $2, %rdi # Validate index used for jump table.
cmovneq %r8, %rax # Conditionally update predicate state.
...
jmp _Z4leaki # TAILCALL
...
.section .rodata,"a",@progbits
.p2align 3
.LJTI0_0:
.quad .LBB0_2
.quad .LBB0_3
.quad .LBB0_5
...
Returns have a simple mitigation technique on x86-64 (or other ABIs which have what is called a "red zone" region beyond the end of the stack). This region is guaranteed to be preserved across interrupts and context switches, making the return address used in returning to the current code remain on the stack and valid to read. We can emit code in the caller to verify that a return edge was not mispredicted:
callq other_function
return_addr:
testq -8(%rsp), return_addr # Validate return address.
cmovneq %r8, %rax # Update predicate state.
For an ABI without a "red zone" (and thus unable to read the return address from the stack), we can compute the expected return address prior to the call into a register preserved across the call and use that similarly to the above.
Indirect calls (and returns in the absence of a red zone ABI) pose the most significant challenge to propagate. The simplest technique would be to define a new ABI such that the intended call target is passed into the called function and checked in the entry. Unfortunately, new ABIs are quite expensive to deploy in C and C++. While the target function could be passed in TLS, we would still require complex logic to handle a mixture of functions compiled with and without this extra logic (essentially, making the ABI backwards compatible). Currently, we suggest using retpolines here and will continue to investigate ways of mitigating this.
Optimizations, Alternatives, and Tradeoffs¶
Merely accumulating predicate state involves significant cost. There are several key optimizations we employ to minimize this and various alternatives that present different tradeoffs in the generated code.
First, we work to reduce the number of instructions used to track the state:
- Rather than inserting a
cmovCC
instruction along every conditional edge in the original program, we track each set of condition flags we need to capture prior to entering each basic block and reuse a commoncmovCC
sequence for those.- We could further reuse suffixes when there are multiple
cmovCC
instructions required to capture the set of flags. Currently this is believed to not be worth the cost as paired flags are relatively rare and suffixes of them are exceedingly rare.
- We could further reuse suffixes when there are multiple
- A common pattern in x86 is to have multiple conditional jump instructions
that use the same flags but handle different conditions. Naively, we could
consider each fallthrough between them an "edge" but this causes a much more
complex control flow graph. Instead, we accumulate the set of conditions
necessary for fallthrough and use a sequence of
cmovCC
instructions in a single fallthrough edge to track it.
Second, we trade register pressure for simpler cmovCC
instructions by
allocating a register for the "bad" state. We could read that value from memory
as part of the conditional move instruction, however, this creates more
micro-ops and requires the load-store unit to be involved. Currently, we place
the value into a virtual register and allow the register allocator to decide
when the register pressure is sufficient to make it worth spilling to memory
and reloading.
Hardening Loads¶
Once we have the predicate accumulated into a special value for correct vs. misspeculated, we need to apply this to loads in a way that ensures they do not leak secret data. There are two primary techniques for this: we can either harden the loaded value to prevent observation, or we can harden the address itself to prevent the load from occuring. These have significantly different performance tradeoffs.
Hardening loaded values¶
The most appealing way to harden loads is to mask out all of the bits loaded.
The key requirement is that for each bit loaded, along the misspeculated path
that bit is always fixed at either 0 or 1 regardless of the value of the bit
loaded. The most obvious implementation uses either an and
instruction with
an all-zero mask along misspeculated paths and an all-one mask along correct
paths, or an or
instruction with an all-one mask along misspeculated paths
and an all-zero mask along correct paths. Other options become less appealing
such as multiplying by zero, or multiple shift instructions. For reasons we
elaborate on below, we end up suggesting you use or
with an all-ones mask,
making the x86 instruction sequence look like the following:
...
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
movl (%rsi), %edi # Load potentially secret data from %rsi.
orl %eax, %edi
Other useful patterns may be to fold the load into the or
instruction itself
at the cost of a register-to-register copy.
There are some challenges with deploying this approach:
- Many loads on x86 are folded into other instructions. Separating them would add very significant and costly register pressure with prohibitive performance cost.
- Loads may not target a general purpose register requiring extra instructions to map the state value into the correct register class, and potentially more expensive instructions to mask the value in some way.
- The flags registers on x86 are very likely to be live, and challenging to preserve cheaply.
- There are many more values loaded than pointers & indices used for loads. As a consequence, hardening the result of a load requires substantially more instructions than hardening the address of the load (see below).
Despite these challenges, hardening the result of the load critically allows the load to proceed and thus has dramatically less impact on the total speculative / out-of-order potential of the execution. There are also several interesting techniques to try and mitigate these challenges and make hardening the results of loads viable in at least some cases. However, we generally expect to fall back when unprofitable from hardening the loaded value to the next approach of hardening the address itself.
Loads folded into data-invariant operations can be hardened after the operation¶
The first key to making this feasible is to recognize that many operations on x86 are "data-invariant". That is, they have no (known) observable behavior differences due to the particular input data. These instructions are often used when implementing cryptographic primitives dealing with private key data because they are not believed to provide any side-channels. Similarly, we can defer hardening until after them as they will not in-and-of-themselves introduce a speculative execution side-channel. This results in code sequences that look like:
...
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
addl (%rsi), %edi # Load and accumulate without leaking.
orl %eax, %edi
While an addition happens to the loaded (potentially secret) value, that doesn't leak any data and we then immediately harden it.
Hardening of loaded values deferred down the data-invariant expression graph¶
We can generalize the previous idea and sink the hardening down the expression graph across as many data-invariant operations as desirable. This can use very conservative rules for whether something is data-invariant. The primary goal should be to handle multiple loads with a single hardening instruction:
...
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
addl (%rsi), %edi # Load and accumulate without leaking.
addl 4(%rsi), %edi # Continue without leaking.
addl 8(%rsi), %edi
orl %eax, %edi # Mask out bits from all three loads.
Preserving the flags while hardening loaded values on Haswell, Zen, and newer processors¶
Sadly, there are no useful instructions on x86 that apply a mask to all 64 bits
without touching the flag registers. However, we can harden loaded values that
are narrower than a word (fewer than 32-bits on 32-bit systems and fewer than
64-bits on 64-bit systems) by zero-extending the value to the full word size
and then shifting right by at least the number of original bits using the BMI2
shrx
instruction:
...
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
addl (%rsi), %edi # Load and accumulate 32 bits of data.
shrxq %rax, %rdi, %rdi # Shift out all 32 bits loaded.
Because on x86 the zero-extend is free, this can efficiently harden the loaded value.
Hardening the address of the load¶
When hardening the loaded value is inapplicable, most often because the
instruction directly leaks information (like cmp
or jmpq
), we switch to
hardening the address of the load instead of the loaded value. This avoids
increasing register pressure by unfolding the load or paying some other high
cost.
To understand how this works in practice, we need to examine the exact
semantics of the x86 addressing modes which, in its fully general form, looks
like (%base,%index,scale)offset
. Here %base
and %index
are 64-bit
registers that can potentially be any value, and may be attacker controlled,
and scale
and offset
are fixed immediate values. scale
must be 1
, 2
,
4
, or 8
, and offset
can be any 32-bit sign extended value. The exact
computation performed to find the address is then: %base + (scale * %index) + offset
under 64-bit 2's complement modular arithmetic.
One issue with this approach is that, after hardening, the %base + (scale * %index)
subexpression will compute a value near zero (-1 + (scale * -1)
) and
then a large, positive offset
will index into memory within the first two
gigabytes of address space. While these offsets are not attacker controlled,
the attacker could chose to attack a load which happens to have the desired
offset and then successfully read memory in that region. This significantly
raises the burden on the attacker and limits the scope of attack but does not
eliminate it. To fully close the attack we must work with the operating system
to preclude mapping memory in the low two gigabytes of address space.
64-bit load checking instructions¶
We can use the following instruction sequences to check loads. We set up %r8
in these examples to hold the special value of -1
which will be cmov
ed over
%rax
in misspeculated paths.
Single register addressing mode:
...
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
orq %rax, %rsi # Mask the pointer if misspeculating.
movl (%rsi), %edi
Two register addressing mode:
...
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
orq %rax, %rsi # Mask the pointer if misspeculating.
orq %rax, %rcx # Mask the index if misspeculating.
movl (%rsi,%rcx), %edi
This will result in a negative address near zero or in offset
wrapping the
address space back to a small positive address. Small, negative addresses will
fault in user-mode for most operating systems, but targets which need the high
address space to be user accessible may need to adjust the exact sequence used
above. Additionally, the low addresses will need to be marked unreadable by the
OS to fully harden the load.
RIP-relative addressing is even easier to break¶
There is a common addressing mode idiom that is substantially harder to check:
addressing relative to the instruction pointer. We cannot change the value of
the instruction pointer register and so we have the harder problem of forcing
%base + scale * %index + offset
to be an invalid address, by only changing
%index
. The only advantage we have is that the attacker also cannot modify
%base
. If we use the fast instruction sequence above, but only apply it to
the index, we will always access %rip + (scale * -1) + offset
. If the
attacker can find a load which with this address happens to point to secret
data, then they can reach it. However, the loader and base libraries can also
simply refuse to map the heap, data segments, or stack within 2gb of any of the
text in the program, much like it can reserve the low 2gb of address space.
The flag registers again make everything hard¶
Unfortunately, the technique of using orq
-instructions has a serious flaw on
x86. The very thing that makes it easy to accumulate state, the flag registers
containing predicates, causes serious problems here because they may be alive
and used by the loading instruction or subsequent instructions. On x86, the
orq
instruction sets the flags and will override anything already there.
This makes inserting them into the instruction stream very hazardous.
Unfortunately, unlike when hardening the loaded value, we have no fallback here
and so we must have a fully general approach available.
The first thing we must do when generating these sequences is try to analyze the surrounding code to prove that the flags are not in fact alive or being used. Typically, it has been set by some other instruction which just happens to set the flags register (much like ours!) with no actual dependency. In those cases, it is safe to directly insert these instructions. Alternatively we may be able to move them earlier to avoid clobbering the used value.
However, this may ultimately be impossible. In that case, we need to preserve the flags around these instructions:
...
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
pushfq
orq %rax, %rcx # Mask the pointer if misspeculating.
orq %rax, %rdx # Mask the index if misspeculating.
popfq
movl (%rcx,%rdx), %edi
Using the pushf
and popf
instructions saves the flags register around our
inserted code, but comes at a high cost. First, we must store the flags to the
stack and reload them. Second, this causes the stack pointer to be adjusted
dynamically, requiring a frame pointer be used for referring to temporaries
spilled to the stack, etc.
On newer x86 processors we can use the lahf
and sahf
instructions to save
all of the flags besides the overflow flag in a register rather than on the
stack. We can then use seto
and add
to save and restore the overflow flag
in a register. Combined, this will save and restore flags in the same manner as
above but using two registers rather than the stack. That is still very
expensive if slightly less expensive than pushf
and popf
in most cases.
A flag-less alternative on Haswell, Zen and newer processors¶
Starting with the BMI2 x86 instruction set extensions available on Haswell and
Zen processors, there is an instruction for shifting that does not set any
flags: shrx
. We can use this and the lea
instruction to implement analogous
code sequences to the above ones. However, these are still very marginally
slower, as there are fewer ports able to dispatch shift instructions in most
modern x86 processors than there are for or
instructions.
Fast, single register addressing mode:
...
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
shrxq %rax, %rsi, %rsi # Shift away bits if misspeculating.
movl (%rsi), %edi
This will collapse the register to zero or one, and everything but the offset
in the addressing mode to be less than or equal to 9. This means the full
address can only be guaranteed to be less than (1 << 31) + 9
. The OS may wish
to protect an extra page of the low address space to account for this
Optimizations¶
A very large portion of the cost for this approach comes from checking loads in
this way, so it is important to work to optimize this. However, beyond making
the instruction sequences to apply the checks efficient (for example by
avoiding pushfq
and popfq
sequences), the only significant optimization is
to check fewer loads without introducing a vulnerability. We apply several
techniques to accomplish that.
Don't check loads from compile-time constant stack offsets¶
We implement this optimization on x86 by skipping the checking of loads which use a fixed frame pointer offset.
The result of this optimization is that patterns like reloading a spilled register or accessing a global field don't get checked. This is a very significant performance win.
Don't check dependent loads¶
A core part of why this mitigation strategy works is that it establishes a data-flow check on the loaded address. However, this means that if the address itself was already loaded using a checked load, there is no need to check a dependent load provided it is within the same basic block as the checked load, and therefore has no additional predicates guarding it. Consider code like the following:
...
.LBB0_4: # %danger
movq (%rcx), %rdi
movl (%rdi), %edx
This will get transformed into:
...
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
orq %rax, %rcx # Mask the pointer if misspeculating.
movq (%rcx), %rdi # Hardened load.
movl (%rdi), %edx # Unhardened load due to dependent addr.
This doesn't check the load through %rdi
as that pointer is dependent on a
checked load already.
Protect large, load-heavy blocks with a single lfence¶
It may be worth using a single lfence
instruction at the start of a block
which begins with a (very) large number of loads that require independent
protection and which require hardening the address of the load. However, this
is unlikely to be profitable in practice. The latency hit of the hardening
would need to exceed that of an lfence
when correctly speculatively
executed. But in that case, the lfence
cost is a complete loss of speculative
execution (at a minimum). So far, the evidence we have of the performance cost
of using lfence
indicates few if any hot code patterns where this trade off
would make sense.
Tempting optimizations that break the security model¶
Several optimizations were considered which didn't pan out due to failure to uphold the security model. One in particular is worth discussing as many others will reduce to it.
We wondered whether only the first load in a basic block could be checked. If the check works as intended, it forms an invalid pointer that doesn't even virtual-address translate in the hardware. It should fault very early on in its processing. Maybe that would stop things in time for the misspeculated path to fail to leak any secrets. This doesn't end up working because the processor is fundamentally out-of-order, even in its speculative domain. As a consequence, the attacker could cause the initial address computation itself to stall and allow an arbitrary number of unrelated loads (including attacked loads of secret data) to pass through.
Interprocedural Checking¶
Modern x86 processors may speculate into called functions and out of functions to their return address. As a consequence, we need a way to check loads that occur after a misspeculated predicate but where the load and the misspeculated predicate are in different functions. In essence, we need some interprocedural generalization of the predicate state tracking. A primary challenge to passing the predicate state between functions is that we would like to not require a change to the ABI or calling convention in order to make this mitigation more deployable, and further would like code mitigated in this way to be easily mixed with code not mitigated in this way and without completely losing the value of the mitigation.
Embed the predicate state into the high bit(s) of the stack pointer¶
We can use the same technique that allows hardening pointers to pass the
predicate state into and out of functions. The stack pointer is trivially
passed between functions and we can test for it having the high bits set to
detect when it has been marked due to misspeculation. The callsite instruction
sequence looks like (assuming a misspeculated state value of -1
):
...
.LBB0_4: # %danger
cmovneq %r8, %rax # Conditionally update predicate state.
shlq $47, %rax
orq %rax, %rsp
callq other_function
movq %rsp, %rax
sarq 63, %rax # Sign extend the high bit to all bits.
This first puts the predicate state into the high bits of %rsp
before calling
the function and then reads it back out of high bits of %rsp
afterward. When
correctly executing (speculatively or not), these are all no-ops. When
misspeculating, the stack pointer will end up negative. We arrange for it to
remain a canonical address, but otherwise leave the low bits alone to allow
stack adjustments to proceed normally without disrupting this. Within the
called function, we can extract this predicate state and then reset it on
return:
other_function:
# prolog
callq other_function
movq %rsp, %rax
sarq 63, %rax # Sign extend the high bit to all bits.
# ...
.LBB0_N:
cmovneq %r8, %rax # Conditionally update predicate state.
shlq $47, %rax
orq %rax, %rsp
retq
This approach is effective when all code is mitigated in this fashion, and can
even survive very limited reaches into unmitigated code (the state will
round-trip in and back out of an unmitigated function, it just won't be
updated). But it does have some limitations. There is a cost to merging the
state into %rsp
and it doesn't insulate mitigated code from misspeculation in
an unmitigated caller.
There is also an advantage to using this form of interprocedural mitigation: by forming these invalid stack pointer addresses we can prevent speculative returns from successfully reading speculatively written values to the actual stack. This works first by forming a data-dependency between computing the address of the return address on the stack and our predicate state. And even when satisfied, if a misprediction causes the state to be poisoned the resulting stack pointer will be invalid.
Rewrite API of internal functions to directly propagate predicate state¶
(Not yet implemented.)
We have the option with internal functions to directly adjust their API to
accept the predicate as an argument and return it. This is likely to be
marginally cheaper than embedding into %rsp
for entering functions.
Use lfence
to guard function transitions¶
An lfence
instruction can be used to prevent subsequent loads from
speculatively executing until all prior mispredicted predicates have resolved.
We can use this broader barrier to speculative loads executing between
functions. We emit it in the entry block to handle calls, and prior to each
return. This approach also has the advantage of providing the strongest degree
of mitigation when mixed with unmitigated code by halting all misspeculation
entering a function which is mitigated, regardless of what occured in the
caller. However, such a mixture is inherently more risky. Whether this kind of
mixture is a sufficient mitigation requires careful analysis.
Unfortunately, experimental results indicate that the performance overhead of
this approach is very high for certain patterns of code. A classic example is
any form of recursive evaluation engine. The hot, rapid call and return
sequences exhibit dramatic performance loss when mitigated with lfence
. This
component alone can regress performance by 2x or more, making it an unpleasant
tradeoff even when only used in a mixture of code.
Use an internal TLS location to pass predicate state¶
We can define a special thread-local value to hold the predicate state between functions. This avoids direct ABI implications by using a side channel between callers and callees to communicate the predicate state. It also allows implicit zero-initialization of the state, which allows non-checked code to be the first code executed.
However, this requires a load from TLS in the entry block, a store to TLS
before every call and every ret, and a load from TLS after every call. As a
consequence it is expected to be substantially more expensive even than using
%rsp
and potentially lfence
within the function entry block.
Define a new ABI and/or calling convention¶
We could define a new ABI and/or calling convention to explicitly pass the predicate state in and out of functions. This may be interesting if none of the alternatives have adequate performance, but it makes deployment and adoption dramatically more complex, and potentially infeasible.
High-Level Alternative Mitigation Strategies¶
There are completely different alternative approaches to mitigating variant 1
attacks. Most
discussion so far focuses on mitigating
specific known attackable components in the Linux kernel (or other kernels) by
manually rewriting the code to contain an instruction sequence that is not
vulnerable. For x86 systems this is done by either injecting an lfence
instruction along the code path which would leak data if executed speculatively
or by rewriting memory accesses to have branch-less masking to a known safe
region. On Intel systems, lfence
will prevent the speculative load of secret
data.
On AMD systems lfence
is currently a no-op, but can be made
dispatch-serializing by setting an MSR, and thus preclude misspeculation of the
code path (mitigation G-2 +
V1-1).
However, this relies on finding and enumerating all possible points in code which could be attacked to leak information. While in some cases static analysis is effective at doing this at scale, in many cases it still relies on human judgement to evaluate whether code might be vulnerable. Especially for software systems which receive less detailed scrutiny but remain sensitive to these attacks, this seems like an impractical security model. We need an automatic and systematic mitigation strategy.
Automatic lfence
on Conditional Edges¶
A natural way to scale up the existing hand-coded mitigations is simply to
inject an lfence
instruction into both the target and fallthrough
destinations of every conditional branch. This ensures that no predicate or
bounds check can be bypassed speculatively. However, the performance overhead
of this approach is, simply put, catastrophic. Yet it remains the only truly
"secure by default" approach known prior to this effort and serves as the
baseline for performance.
One attempt to address the performance overhead of this and make it more
realistic to deploy is MSVC's /Qspectre
switch.
Their technique is to use static analysis within the compiler to only insert
lfence
instructions into conditional edges at risk of attack. However,
initial
analysis
has shown that this approach is incomplete and only catches a small and limited
subset of attackable patterns which happen to resemble very closely the initial
proofs of concept. As such, while its performance is acceptable, it does not
appear to be an adequate systematic mitigation.
Performance Overhead¶
The performance overhead of this style of comprehensive mitigation is very
high. However, it compares very favorably with previously recommended
approaches such as the lfence
instruction. Just as users can restrict the
scope of lfence
to control its performance impact, this mitigation technique
could be restricted in scope as well.
However, it is important to understand what it would cost to get a fully
mitigated baseline. Here we assume targeting a Haswell (or newer) processor and
using all of the tricks to improve performance (so leaves the low 2gb
unprotected and +/- 2gb surrounding any PC in the program). We ran both
Google's microbenchmark suite and a large highly-tuned server built using
ThinLTO and PGO. All were built with -march=haswell
to give access to BMI2
instructions, and benchmarks were run on large Haswell servers. We collected
data both with an lfence
-based mitigation and load hardening as presented
here. The summary is that mitigating with load hardening is 1.77x faster than
mitigating with lfence
, and the overhead of load hardening compared to a
normal program is likely between a 10% overhead and a 50% overhead with most
large applications seeing a 30% overhead or less.
| Benchmark | lfence
| Load Hardening | Mitigated Speedup |
| -------------------------------------- | -------: | -------------: | ----------------: |
| Google microbenchmark suite | -74.8% | -36.4% | 2.5x |
| Large server QPS (using ThinLTO & PGO) | -62% | -29% | 1.8x |
Below is a visualization of the microbenchmark suite results which helps show
the distribution of results that is somewhat lost in the summary. The y-axis is
a log-scale speedup ratio of load hardening relative to lfence
(up -> faster
-> better). Each box-and-whiskers represents one microbenchmark which may have
many different metrics measured. The red line marks the median, the box marks
the first and third quartiles, and the whiskers mark the min and max.
Microbenchmark result visualization
We don't yet have benchmark data on SPEC or the LLVM test suite, but we can work on getting that. Still, the above should give a pretty clear characterization of the performance, and specific benchmarks are unlikely to reveal especially interesting properties.
Future Work: Fine Grained Control and API-Integration¶
The performance overhead of this technique is likely to be very significant and something users wish to control or reduce. There are interesting options here that impact the implementation strategy used.
One particularly appealing option is to allow both opt-in and opt-out of this mitigation at reasonably fine granularity such as on a per-function basis, including intelligent handling of inlining decisions -- protected code can be prevented from inlining into unprotected code, and unprotected code will become protected when inlined into protected code. For systems where only a limited set of code is reachable by externally controlled inputs, it may be possible to limit the scope of mitigation through such mechanisms without compromising the application's overall security. The performance impact may also be focused in a few key functions that can be hand-mitigated in ways that have lower performance overhead while the remainder of the application receives automatic protection.
For both limiting the scope of mitigation or manually mitigating hot functions, there needs to be some support for mixing mitigated and unmitigated code without completely defeating the mitigation. For the first use case, it would be particularly desirable that mitigated code remains safe when being called during misspeculation from unmitigated code.
For the second use case, it may be important to connect the automatic mitigation technique to explicit mitigation APIs such as what is described in http://wg21.link/p0928 (or any other eventual API) so that there is a clean way to switch from automatic to manual mitigation without immediately exposing a hole. However, the design for how to do this is hard to come up with until the APIs are better established. We will revisit this as those APIs mature.


JavaScriptMVC requires Java JRE 1.6 or greater for:
But your backend server can be written in any language.
Download Java here.
There are 2 ways to get JavaScriptMVC:
We (and the community) would much prefer you to develop with git. JavaScriptMVC is built around modular development so it fits in perfectly with git development. Plus we can trade improvements really easy.
Download the latest JavaScriptMVC.
Unzip the folder on your file system or web server.
If you are using this on a webserver,
unzip in a public folder where the server hosts static content.
JavaScriptMVC is comprised of four sub projects:
You want to fork each project and add it as a submodule to your project in a public folder (where your server keeps static content). If these words mean nothing to you, or you'd like more explanation, you might want to read Developing With Git.
Forking the repos looks like:
git submodule add git@github.com:_YOU_/steal.git public/steal
git submodule add git@github.com:_YOU_/jquerymx.git public/jquery
git submodule add git@github.com:_YOU_/documentjs.git public/documentjs
git submodule add git@github.com:_YOU_/funcunit.git public/funcunit
Notice that the javascriptmvc repository is put in a jquery folder.
After installing the repository, run:
[WINDOWS] > steal\js steal\make.js
[Lin/Mac] > ./steal/js steal/make.js
In your public (or static) folder, you should have something that looks like:
static
\documentjs - DocumentJS library
\funcunit - FuncUnit testing library
\jquery - jQuery and MVC plugins
\steal - compression and build system
\js.bat - Windows Rhino shortcut
\js - Mac/Linux Rhino shortcut
Open a command line to that folder and run:
[WINDOWS] > js
[Lin/Mac] > ./js
This starts the Rhino JS engine. Type quit()
to exit.
We are constantly improving JMVC. If you're using git, you can just pull changes. Otherwise, to get the latest, most error free code, in a console, type:
C:\workspace\Cookbook>js documentjs\update
C:\workspace\Cookbook>js funcunit\update
C:\workspace\Cookbook>js jquery\update
C:\workspace\Cookbook>js steal\update
./js
and change \
to /
.


Mini super-fruit breakfast wraps
With berries & toasted seeds
Cooks in 10 minutes
Ingridients
- 1 satsuma
- 1 wholemeal tortilla wrap
- 1 teaspoon quality cocoa powder
- 2 tablespoons natural yoghurt
- 1 ripe banana
- 1 handful fresh berries , such as raspberries, bluberries
- 1 teaspoon mixed toasted seeds
Serves for 10 people
“This brilliantly quick recipe is easy to make in the morning before school,
and will fuel your body in the right way.
Blueberries and raspberries are a fantastic choice here, but feel free to swap in your favourite fruit, or whatever you have at home.
ENJOY!”
METHOD
- On a chopping board, slice the satsuma in half across the middle, then remove to a plate and pat the board dry with kitchen paper, if needed.
- Spoon the cocoa powder into a jam jar, then squeeze in half the satsuma juice (save the rest for another day).
- Put the lid securely on the jar and shake well. Add the yoghurt, pop the lid back on, and give it another shake.
- Lay the wrap flat in the middle of the chopping board, then spread the cocoa yoghurt evenly over the wrap.
- Peel and place the banana in the middle of the wrap, then gently mash with a fork, spreading it around as evenly as possible.
- Sprinkle the berries and seeds over the mashed banana.
- Cut into quarters, then tuck in, folding or wrapping up each quarter as you go.


Is Derby County v Preston North End on TV? Channel details, kick-off time & match odds
Latest Derby County news | The Rams are back in action this weekend after a two-week hiatus following the final international break of the calendar year
by Mark WakefieldDerby County resume their Sky Bet Championship campaign this weekend, as they welcome Preston North End to Pride Park Stadium.
The Rams take on the Lilywhites in their first match after the November international break, and are currently in 16th place in the league table.
Phillip Cocu and his players will be keen to improve on their last result which saw them lose 1-0 to arch rivals Nottingham Forest nearly a fortnight ago.
Preston go into Saturday’s contest in good form, winning their last three matches and are in second place in the league standings.
Ahead of the match, we’ve put together all of the key things that you need to know.
When is the game?
The game is due to kick off at 3pm on Saturday, November 23 at Pride Park Stadium.
Is it on TV?
The game is not being broadcast televised live, but you will be able to follow all the action from the contest right here at Derbyshire Live.
Form guide
Derby County - LWLWL
Preston North End – WWWDL
What are the odds?
Derby County – 17/10
Draw – 9/4
Preston North End – 6/4
*Odds courtesy of Sky Bet and are subject to change.
Derby County latest
This is your round up of all things Derby; the one-stop shop that will keep you updated on the latest goings on at Pride Park and beyond.
Transfers, injuries, match-days and managers, we’ve got you covered.
We’ll be bringing the very latest on the Rams throughout the week and around the clock.
Make sure you keep yourself updated with our handy daily catch up...
Must reads...
- January targets - this is where Derby County boss Phillip Cocu is likely to strengthen
- 'Ambition' - That Feyenoord link, Phillip Cocu and his plans for Derby County
- Euro kings hammered, Goddard and Saunders shine, and it's all smiles for Derby in Italy
- 'We have been looking' - latest on new investment plans for Derby County
- 'Wanted list' - Steve Nicholson's take on Derby County's link to Luciano Acosta
- Scottish duo set to battle for transfer of former Derby County defender - reports
For all your latest Rams news, opinion, analysis and transfer gossip, click here
You can follow our Rams reporter Steve Nicholson on Twitter, and his email address is Stephen.Nicholson@reachplc.com


{{'Lists' | translate}}
{{"LIST_TAGS."+tag | translate}}
-1"
(opened)="opened(list.$key)"
(closed)="closed(list.$key)"
(onrecipedelete)="removeRecipe($event.recipe, list, list.$key)"
(onedit)="updateAmount($event.recipe, list, list.$key, $event.amount)"
(ondelete)="delete(list)"
[authorUid]="user.uid"
[odd]="i%2>0">


---
layout: post
title: I'll have the fish please...
date: '2012-08-05T22:56:00.001-06:00'
author: Jacob .
tags:
modified_time: '2012-08-05T22:56:40.958-06:00'
blogger_id: tag:blogger.com,1999:blog-6400085873105072120.post-6101399151472714638
blogger_orig_url: http://www.svlark.com/2012/08/ill-have-fish-please.html
---
Yes, I ordered fish tacos for dinner. They were ok. Not delicious, but do-able. And that was my concrete step for today. Gotta learn to like fish...
We're in Steamboat Springs this weekend hanging out with our friend Paul from Chicago. Thus, the tiny steps. But progress is progress.
I also put a used copy of Lin and Larry Pardey's The Cost Conscious Cruiser priced at $2.50 in my cart on Amazon. I'm saving up to actually buy it. I'm cost conscious like that.


NDC Rebukes Bossman Asare For ‘Yes’ Vote Campaign
by Peace FM OnlineThe opposition National Democratic Congress (NDC) has chastised Dr Bossman Asare for his recent comment on the upcoming referendum in December.
The Deputy Commissioner of the Electoral Commission is campaigning for a 'YES' vote in the impending referendum.
However, the NDC feels it's unethical for Dr. Asare to wade into the Yes or No brouhaha since he's part of the EC.
Watch videos below
Featured Video


What Our System Does
TRACK DAILY SALES
Track daily changes and sales records.
MANAGE PERSONNEL ACCOUNTS
Create and manage inventory personnel accounts.
GENERATE PAYMENT INVOICES
Generate payment recipts and sales total.
- Making stock management efficient through automation
- Manage your attendant perfomance fairly and dilligenly
- View store perfomance at a glance on our dashboard
- Manage product stock efficiently.


Combustion
Electric
Speed consumption pairs
Speed (
km/h
)
Consumption (
kWh
l
)
Energy
Fuel
budget (
kWh
l
)
Time budget (
s
)
show details
Vehicle max speed (km/h)
Vehicle weight (kg)
Current
charge
fuel
(
kWh
l
)
Max charge (
kWh
)
Fuel energy density (
MJ/l
)
Auxiliary power (
kWh
l/h
)
Acceleration efficiency
Deceleration efficiency
Uphill efficiency
Downhill efficiency


We are glad to welcome to you to k gram.Have fun and get to meet new friends as we all documents all our precious moments.


Across 1. Complex about travelling, for example, without fear, maybe? (7) 5. How's that iron? (2,2,3) 10. Deadly, vacuous, English regiment leader (4) 11. Taverns' dirty roofs as described by Spooner (5,5) 12. Metal section replacing front part of stage (6) 13. Fervently lauded, flattered and acclaimed, essentially (8) 14. Before the end of mass, a woman, say, imbibes one sprinkling of water (9) 16. Scientific establishment reviewed a training routine (5) 17. Resurgence in Madhubani artists' school (5) 19. Once again make an announcement about leaving India ... perhaps, with son and husband? (9) 23. One who keeps nannies with kids? (8) 24. Guy leads to expansive, lavish prayer hall (6) 26. Show correct input total after deducting one fifty and adding two zeroes (5,3,2) 27. Daughter had a boyfriend (4) 28. Finally, college announces openings in Telecommunications & Electronics Engineering (M. S. - Honours) (7) 29. America twice turned back a Libyan leader , in line with expectations (2,5) Down 2. One student scooting from building ominously is named (7) 3. Old Persian dancing pairs (5) 4. Buries doctor in sculpture of stone (7) 6. Synagogues fermented these liqueurs with eggs (6) 7. Judges participating in physical training (9) 8. Many energetic men start to trek up Everest's summit (7) 9. Bill and Ram love complex job that involves charging less for cheaper items (2,7,4) 15. Old one's getting nervous, discussing life (9) 18. Port city, as we see it, is out of control (7) 20. Order extremely useful "Introduction to Carnatic Song Releases" (7) 21. Inspect rainbows - drinking in colourful patterns (7) 22. Change note on ex-queen getting divorced (6) 25. They support HIV on the radio (5)


NAME: ADEBOWALE GLORY
Slack
github
Stage1 repo
About Me: I’m from Ondo State. I’m a 200 level, Computer Engineering student of Federal University of Technology, Akure. I love cats although I have never owned one;).


By the invitation of Professor David Jaffe ROTA's founders Chris and Michael will be speaking to students at Stanford University on the topics of medical device development and commercialization.
Link to article
"The field of finalists has been narrowed to six, with each finalist making a presentation to an audience of more than 100 representatives from senior living and long-term care provider organizations on July 30, 2012. The six finalists for this year’s LTC LINK Tank are as follows:..."
Link to article
"Santa Clara University’s Leavey School of Business and Mary Furlong & Associates announced today the five business ventures, each focused on the baby boomer market, that have been chosen as finalists to compete for a $10,000 grand prize at the Silicon Valley Boomer Venture Summit."
Link to article
"At the Cool Product Expo, entrepreneurs show off everything from electric cars to personalized 3D printers to a scent production machine."
Link to article
"It's not the most orthodox approach to getting around in a wheelchair. And you're sure to get some odd looks as you row yourself down the sidewalk, minus a set of paddles. But this chair's innovative propulsion system does more than just minimize arm and joint pain."
Link to article
"Do you have an idea for a business? SJSU entrepreneurs, innovators, job-seekers and business- savvy students will see if they have what it takes to turn their business plans into reality at this year’s Silicon Valley Business Plan Competition, culminating May 26."
Link to article
By the invitation of Professor David Jaffe ROTA's founders Chris and Michael will be speaking to students at Stanford University on the topics of medical device development and commercialization.
Link to article
We are pleased to announce that after careful consideration, the judges unanimously selected ROTA as the winner of the 2010 SVBPC.""
Link to article
Silicon Valley's Business Journal features ROTA.
Link to article


Cluster analysis or clustering is the task of grouping a set of objects in such a way that objects in the same group (called a cluster) are more similar (in some sense) to each other than to those in other groups (clusters).
Related terms
Unsupervised learning
Community detection
Automatic classification
General goal
Group similar objects together
Why?
Help us find patterns in the data
Simplify the data
Types of data
When applying clustering to a Cytoscape network there are two basic approaches:
clustering based on the network topology. The idea is that nodes that are close
to each other should in the same cluster and nodes that are further away should be
in different clusters. Typically, the goal is to maximize some metric that measures
inter-cluster distance vs. intra-cluster distance. MCL and MCODE are examples
of clustering based on network toplogy.
clustering based on attributes. In this instance, the idea is that similarity is
not measured based on topology, but on the similarity of the attributes of the nodes
or edges. The best examples of attribute-based clustering are hierarchical and k-means.
Types of clustering algorithms
agglomerative:
bottom-up approach that pairs the "closest" two items, and merges that with the next closest item, etc.
centroid-based:
iteratively calculates the centroid of a set of clusters and then refines them, adding or removing items
from clusters to maximize or minimize some metric (e.g. within-cluster variances). Centroid-based approaches
typically require an initial value for the number of clusters.
modularity-based:
similar in principle to centroid-based clustering, but the goal is to optimize modularity.
topology-based:
a wide variety of algorithms that explicitly use the topology of the graph to cluster it. This might
include flow-based approaches, message passing, density metrics, or matrix measures such as eigenvalues.
Types of clustering algorithms
biclusters:
simultaneous clustering of rows and columns of a matrix, which yields a subset of rows (or columns) that
exhibit similar behavior scross a subset of columns (or rows). The result is often portrayed as a heat map
with distinctive blocks the represent the biclusters.
fuzzy clusters:
typical cluster algorithms assign each individual item to a cluster. In a fuzzy cluster, items can be assigned
to multiple clusters, usually depending on some metric of "closeness" to the cluster.
dimensionality reduction:
not really a clustering algorithm, but still extremely useful and often used as a visualization aid for grouping
values. Dimensionality reduction techniques attempt to reduce the number of dimensions of a data set and plot
them or display them in some way.
Clustering in Cytoscape
There are several Cytoscape apps that perform clustering. Some are pretty general and
some are quite specific for certain types of data. Here are some of the most popular apps:
MCODE
Clusters a given network based purely on topology to find densely connected regions. Does not support
any kind of edge weighting
clusterMaker2
App that supports attribute clustering, clustering based on topology, cluster ranking, and dimensionality reduction.
clusterMaker2 currently supports 41 different algorithms
cytoHubba
Predicts and explores important nodes and subnetworks in a given network by several topological algorithms.
TiCoNE
TiCoNE (Time Course Network Enricher) is a tool for the combined analysis of time series expression data together with biological networks.
CytoCluster
a Cytoscape app for analysis and visualization of clusters from network
Hands-on
For the hands-on section, we'll explore clusterMaker2, which is used by several different apps, is scriptable, and
provides support for several different types of clustering algorithms, and a choice of algorithms for each type. Also, I
wrote it :-).


"Coding and learning everyday."
Made with love using AngularJS and WordPress. This code is available on GitHub, licensed under MIT.


Ages on Nevada stalagmites were determined on a ThermoElectron Neptune multi-collector inductively coupled plasma mass spectrometer at the University of New Mexico Radiogenic Isotope Laboratory, and stable isotope values were determined on a Kiel IV automated carbonate preparation device at the Las Vegas Isotope Science laboratory at UNLV directly coupled to a ThermoElectron Delta V stable isotope ratio mass spectrometer in dual inlet mode 8. The time series of the vadose zone stalagmite δ 18O values were adjusted for the change in δ 18O of the ocean (denoted δ 18O ivc) using the reconstruction of 55, and for differences in the isotopic composition of precipitation falling at Lehman and Pinnacle Caves (+0.36 and −1.73‰ VPDB, respectively) relative to Leviathan Cave following 8. This adjustment results in a small change in δ 18O values that does not affect the shape or timing of the composite isotope curve. The Leviathan chronology δ 18O ivc record presented here includes a correction for the age of nine stable isotope samples (and the derivative interpolated time series) beneath a hiatus at 290.5 mm. This changes the age of the last isotope sample (291 mm) before the hiatus to 73,647 from 69,622 yr B2k. The age correction does not change any interpretations of this or previous work. We estimated age uncertainties for individual stalagmite age models using the COPRA software 56, and interpolated age uncertainties at the 95‰ level for each climate event in Table 1 in the Leviathan chronology.
Because the DH2-D record is significantly dampened relative to the Leviathan signal due to aquifer mixing and dispersion (Figure S4; see text for explanation), we corrected the measured δ 18O values by changes in δ 18O of the ocean that were scaled by a ratio of 0.4551, which is the ratio of the standard deviations of the Leviathan and DH2-D records, respectively. This ice volume correction more accurately reflects how a given precipitation isotopic signal is filtered and dampened via transit through the aquifer feedings Devils Hole better than the undampened correction 47. Because of our different ice volume correction, the timings and amplitudes of DH2-D δ 18O ivc anomalies are slightly different than previously reported.
We then fit low-pass precessional-scale 2 Butterworth filters to both δ 18O ivc records (sixth order with period of 23,000 years) with zero phase lag using the filtfilt function in Matlab. The low-pass filters were then used to constrain timings of isotopic events based on a peak and trough detection algorithm matched by correlation to June 21 st 65°N insolation for various insolation substages (numbered, 3.1, 3.2, etc.; analogous to Marine Isotope Stages and using the latter to synchronize numbering) of the Berger 1978 solution 11. The reason for using filters instead of raw data is to minimize the possible effects of noise on the choice of start and end points to provide more objective and reproducible results, though the latter approach may also be valid. Relative timings of insolation sub-stages were determined by differencing correlative ages. Phasing diagrams show the timing differences between the forcing (insolation) and the climate response in the Leviathan and DH2-D filtered records.


{% extends "pred/base_layout.html" %} {%block content_right_panel %} {% if username %} {% include "pred/user_header.html" %} {% endif %}
| Skwark MJ, Michel M, Hurtado DM, Ekeberg M, Elofsson A. "Accurate contact predictions for thousands of protein families using PconsC3." | |
| Skwark MJ, Raimondi D, Michel M, Elofsson A (2014) "Improved Contact Predictions Using the Recognition of Protein Like Contact Patterns." PLoS Computational Biology 10(11). | |
| BOCTOPUS2: Inclusion of dyad-repeat pattern improves topology prediction of transmembrane β-barrel proteins. Sikander Hayat , Christoph Peters, Nanjiang Shu, Kostas D Tsirigos, Arne Elofsson. Bioinformatics, 2016 [PubMed] | |
| BOCTOPUS: Improved topology prediction of transmembrane beta barrel proteins. Sikander Hayat and Arne Elofsson Bioinformatics, 2012 [PubMed] | |
| Ranking models of transmembrane β-barrel proteins using Z-coordinate predictions. Sikander Hayat and Arne Elofsson Bioinformatics, 2012 [PubMed] |


This is a film of very poor standard, not what I had come to expect of a director as talented as Bigas Luna.
Lola is the story of a girl (Angela Molina) who leaves Mario, her abusive alcoholic partner, and moves to Barcelona, where she meets French businessman Robert (Patrick Bauchau). They have a child (although it is not clear until later on who the father actually is), and appear to be very happy. That is, until Mario arrives four years later to track her down, claiming parentage of the child (Ana, the only likeable character in the film). Lola, who still has feelings for Mario (she misses the violence of the sex that they had) is torn between deciding to dump Robert or to return to Mario.
Unfortunately, the continuity in the film is rather poor, as is the acting. Whilst using a dubbing artist to dub young Ana is standard practice in Spanish cinema, why the director had to resort to using dubbing artists for Jeanine (Robert's ex-wife) and Lola's elderly neighbour is beyond me. The story is also rather poor, and a lot more could have been made from it. None of the characters in the film is at all likeable, with the exception of perhaps the little girl. The casting as a whole is rather poor: Robert could have been likeable -- here being the victim -- if it were not for his droning nasal voice.
I was surprised that this film was so poor, considering the originality of his earlier films (Bilbao and Caniche, for example), and the brilliance of his later films (La teta y la luna, Jamón Jamón, amongst others). Bigas must have been going through a poor patch.
ENDS
-----== Posted via Deja News, The Leader in Internet Discussion ==----- http://www.dejanews.com/rg_mkgrp.xp Create Your Own Free Member Forum
The review above was posted to the
rec.arts.movies.reviews newsgroup (de.rec.film.kritiken for German reviews).
The Internet Movie Database accepts no responsibility for the contents of the
review and has no editorial control. Unless stated otherwise, the copyright
belongs to the author.
Please direct comments/criticisms of the review to relevant newsgroups.
Broken URLs inthe reviews are the responsibility of the author.
The formatting of the review is likely to differ from the original due
to ASCII to HTML conversion.
Related links: index of all rec.arts.movies.reviews reviews


Web Performance Heatmap Generator
Visualize when key elements on your page become visible.
Read about it
or
see an example
.
URL to test:
WebPageTest server:
WebPageTest api key:
WebPageTest location:
WebPageTest browser:
Connection Speed:
Cable
Viewport Size:
Device Default
Generate heatmap!
Already got a test ID?
Use this ID


We Gurukulian,Enjoyed every breathe of GKV atmosphere and RE-UNITED here on this epic webpage. Thank you all who had trust the Owner and send there respective Wonderful snaps.Database will be updated and soon we are going to add our all batch mate please help me out.


Alerter:
Hello World
Special Alerter:
Hello World
You should get two alerts:
- "Hello World"
- "Special: Hello World"


The heart of TaffyDB and any database is running queries against your data. This is done after creation of your database by calling the root function and building Filter Objects.
// Create a new empty database var db = TAFFY(); // Run a query against the DB to return all rows db(); // Real world example - remove all records db().remove();
Every object within a TaffyDB collection has a ___id value set by TaffyDB. This value is not intended for you to know, but is useful when building dynamic applications. This can be used to lookup a record by passing it into the root function as a string.
// Looks up a record based on its id db("T000008R000002"); // Real world example - update records "status" column db("T000008R000002").update({status:"Active"});
This also works if you have a copy of the whole record.
// get the first record var firstRecord = db().first(); // look up this record again db(firstRecord); // Real world example - update records "status" column db(firstRecord).update({status:"Active"});
To give you full control over the results of your query you can always pass in a function. Just have it return true if you want the record in your final results.
// functional example, returns all records db(function () { return true; }); // Real world example - function returns records with a status of active db(function () { return (this.status == "Active") ? true : false; });
TaffyDB uses a very JavaScript centric Filter Object for looking up queries. There is no string concatenation and you can quickly compose these by hand or dynamically from within your app. The filter object is compared against each record using some business rules and if it passes the record remains in the results set.
The most common Filter Object is used simply to check if a column is equal to value.
// does a match for column and value db({column:"value"}); // Real world example - records with a status of active db({status:"Active"});
This is the short form of this
// does a match for column and value db({column:{is:"value"}}); // Real world example - records with a status of active db({status:{is:"Active"}});
The "is" part of this expressions can be swapped out for a variety of other comparisons as listed below.
For any comparison operator you can quote it and add a ! sign to reverse the meaning.
// does a match for column that is not a value db({column:{"!is":"value"}}); // Real world example - records with a status other than of active db({status:{"!is":"Active"}});
Using the almighty comma you can add additional lookups to you Filter Object.
// does a match for column that is a value and column2 is a value db({column:"value",column2:"value"}); // Real world example - records with a status of active and a role of admin db({status:"Active",role:"Admin"});
You can also pass in additional Filter Objects into the function
// does a match for column that is a value and column2 is a value db({column:"value"},{column2:"value"}); // Real world example - records with a status of active and a role of admin db({status:"Active"},{role:"Admin"});
In a database you can use "in" to pass in a collection of values to compare against. This is possible in TaffyDB via the array.
// does a match for column that is one of two values db({column:["value","value2"]); // Real world example - records with a status of active or pending db({status:["Active","Pending"]});
You can also pass in an array of Filter Objects with each one being treated as a logical OR.
// does a match for column that is one of two values db([{column:"value"},{column:"value2"}]); // Real world example - records with a status of active or pending db([{status:"Active"},{status:"Pending"}]);
A real world example of a complex query.
// return records where the role is Admin and the status is Active. // Also return records where the role is Admin, the status is Pending, and the manager_review is true db({role:"Admin"},[{status:"Active"},{status:"Pending",manager_review:true}]);
In addition to the default "is" operator there are a lot of other operators you can use to lookup records.
| is |
Example: {column:{is:value}} |
Used to see if a column is of same type and value of supplied value. |
| == |
Example: {column:{'==':value}} |
Used to see if a column matches a supplied value using JavaScript's liberal coercion rules. |
| === |
Example: {column:{'===':value}} |
Used to see if a column is of same type and value of supplied value. |
| isnocase |
Example: {column:{isnocase:value}} |
Used to see if a column value is equal to a supplied value. Ignores case of column and value. |
| left |
Example: {column:{left:value}} |
Used to see if the start of a column is the same as a supplied value. |
| leftnocase |
Example: {column:{leftnocase:value}} |
Used to see if the start of a column is the same as a supplied value. Ignores case of column and value. |
| right |
Example: {column:{right:value}} |
Used to see if the end of a column is the same as a supplied value. |
| rightnocase |
Example: {column:{rightnocase:value}} |
Used to see if the end of a column is the same as a supplied value. Ignores case of column and value |
| like |
Example: {column:{like:value}} |
Used to see if column contains a supplied value. |
| likenocase |
Example: {column:{likenocase:value}} |
Used to see if column contains a supplied value. Ignores case of column and value |
| regex |
Example: {column:{regex:value}} |
Used to see if column matches a supplied regular expression. |
| lt |
Example: {column:{lt:value}} or {column:{'<':value}} |
Used to see if column is less than a supplied value. |
| lte |
Example: {column:{lte:value}} or {column:{'<=':value}} |
Used to see if column is less than or equal to a supplied value. |
| gt |
Example: {column:{gt:value}} or {column:{'>':value}} |
Used to see if column is greater than a supplied value. |
| gte |
Example: {column:{gte:value}} or {column:{'>=':value}} |
Used to see if column is greater than or equal to a supplied value. |
| has |
Example: {column:{has:value}} |
Used to see if column that is an object has a value or object appearing in its tree. |
| hasAll |
Example: {column:{hasAll:value}} |
Used to see if column that is an object has a value or object appearing in its tree. |
| isSameArray |
Example: {column:{isSameArray:value}} |
Used to see if column is an array and is the same as a supplied array. |
| isSameObject |
Example: {column:{isSameObject:value}} |
Used to see if column is an object and is the same as a supplied object. |
| isString |
Example: {column:{isString:true}} |
Used to see if column a string. |
| isNumber |
Example: {column:{isNumber:true}} |
Used to see if column a number. |
| isArray |
Example: {column:{isArray:true}} |
Used to see if column an array. |
| isObject |
Example: {column:{isObject:true}} |
Used to see if column an object. |
| isFunction |
Example: {column:{isFunction:true}} |
Used to see if column a function. |
| isBoolean |
Example: {column:{isBoolean:true}} |
Used to see if column a boolean (true/false). |
| isNull |
Example: {column:{isNull:true}} |
Used to see if column null. |
| isUndefined |
Example: {column:{isUndefined:true}} |
Used to see if column undefined. |


reveal.js enables you to create beautiful interactive slide decks using HTML. This presentation will show you examples of what it can do.
Slides can be nested inside of each other.
Use the Space key to navigate through all slides.
Nested slides are useful for adding additional detail underneath a high level horizontal slide.
That's it, time to go back up.
Not a coder? Not a problem. There's a fully-featured visual editor for authoring these, try it out at http://slides.com.
Press ESC to enter the slide overview.
Hold down alt and click on any element to zoom in on it using zoom.js. Alt + click anywhere to zoom back out.
Presentations look great on touch devices, like mobile phones and tablets. Simply swipe through your slides.
Hit the next arrow...
... to step through ...
... a fragmented slide.
There's different types of fragments, like:
grow
shrink
fade-out
fade-up (also down, left and right!)
current-visible
Highlight red blue green
You can select from different transitions, like:
None -
Fade -
Slide -
Convex -
Concave -
Zoom
reveal.js comes with a few themes built in:
Black (default) -
White -
League -
Sky -
Beige -
Simple
Serif -
Blood -
Night -
Moon -
Solarized
Set data-background="#dddddd"
on a slide to change the background color. All CSS color formats are supported.

Different background transitions are available via the backgroundTransition option. This one's called "zoom".
Reveal.configure({ backgroundTransition: 'zoom' })
You can override background transitions per-slide.

function linkify( selector ) {
if( supports3DTransforms ) {
var nodes = document.querySelectorAll( selector );
for( var i = 0, len = nodes.length; i < len; i++ ) {
var node = nodes[i];
if( !node.className ) {
node.className += ' roll';
}
}
}
}
Code syntax highlighting courtesy of highlight.js.
| Item | Value | Quantity |
|---|---|---|
| Apples | $1 | 7 |
| Lemonade | $2 | 18 |
| Bread | $3 | 2 |
These guys come in two forms, inline:
“The nice thing about standards is that there are so many to choose from”
and block:
“For years there has been a theory that millions of monkeys typing at random on millions of typewriters would reproduce the entire works of Shakespeare. The Internet has proven this theory to be untrue.”
You can link between slides internally, like this.
There's a speaker view. It includes a timer, preview of the upcoming slide as well as your speaker notes.
Press the S key to try it out.
Presentations can be exported to PDF, here's an example:
Set data-state="something"
on a slide and "something"
will be added as a class to the document element when the slide is open.
Additionally custom events can be triggered on a per slide basis by binding to the data-state
name.
Reveal.addEventListener( 'customevent', function() {
console.log( '"customevent" has fired' );
} );
Press B or . on your keyboard to pause the presentation. This is helpful when you're on stage and want to take distracting slides off the screen.


Find and track your favorites courses.
Add Course
Wyoming, US
Phone:<PHONE_NUMBER>
Email: bethjeanlilley@gmail.com


Return to Homepage
Breakfast (7 AM- 11 AM)
Pancakes
Waffles (Contains gluten
Bacon (Contains meat)
Fruit and Yogurt (Contains dairy)
Lunch (11:15 AM- 2:15 PM)
Chicken Tenders (Contains meat, gluten)
Veggie Burgers (Buns contain gluten)
Pizza (Contains dairy, gluten, but can be made gluten-free upon request)
Dinner (5:30 PM- 10 PM)
Pasta
with:
Alfredo Sauce (Contains dairy)
Diavolo Sauce (Contains shellfish)
Meat Sauce (Contains meat)
Pesto (Contains nuts)
Quiche (Contains dairy)
Salad (Some toppings may contain meat or dairy)
Dessert
Vanilla Ice Cream (Contains dairy)
with:
Chocolate Sauce
Sprinkles
Caramel
Dairy-free Vanilla Ice Cream (Contains soy)
with:
Chocolate Sauce
Sprinkles
Caramel
Snacks (SERVED DURING HOURS 7 AM- 10 PM)
Brussel Sprouts
French Fries
Bread and Peanut Butter (Contains peanuts)
Return to Homepage